rsl10 5 (soc) - ee timessite.eet-china.com/arrow/technote/onsemi/rsl10.pdf · rsl10 5 (soc) www....
TRANSCRIPT
© Semiconductor Components Industries, LLC, 2016
August, 2017 − Rev. 11 Publication Order Number:
RSL10CN/D
RSL10
�����
�����5����(SoC)
��
RSL10�������、�������2.4 GHz���,���� ��� �������。�ARM®
Cortex® M3��� LPDSP32 DSP��,RSL10�����
���� 2.4 GHz����,�������。
� �
• Rx (��)���(�������,1 Mbps):−94 dBm
• � ��:62.5�2000 kbps
• !"��:−17�+6 dBm
• #�Rx(��)�� = 5.6 mA (1.25 V VBAT)
• #�Rx(��)�� = 3.0 mA (3 V VBAT)
• #�Tx(!")��(0 dBm) = 8.9 mA (1.25 V VBAT)
• #�Tx(!")��(0 dBm) = 4.6 mA (3 V VBAT)
• ��5��,$�LE 2M PHY��
• ARM Cortex−M3���,%���&� 48 MHz
• LPDSP32(!��"#$%&�)
• �'�'((:1.1−3.3 V
• ��)�(1.25 V VBAT):♦ *�+,,IO)-:50 nA♦ *�+,,8 kB RAM (���.� ):300 nA♦ �7 kHz"#*+��"#%: 1.8 mA RX,1.8 mA TX
• ��)�(3 V VBAT):♦ *�+,,IO)-:25 nA♦ *�+,,8 kB RAM (���.� ):100 nA♦ �7 kHz"#*+��"#%:0.9 mA RX,0.9 mA TX
• 384 kB/,
• ��0-�1�23(SoC)
• ��FOTA (Firmware Over−The−Air,4�.�/5)01
WLCSP51CASE 567MT
www.onsemi.cn
XXXXXX = Specific Device CodeA = Assembly LocationWL = Wafer LotY or YY = YearWW = Work WeekG or � = Pb−Free Package
RSL10AWLYYWWG
Device Package Shipping†
ORDERING INFORMATION
NCH−RSL10−101WC51−ABG
WLCSP51(Pb−Free)
5000 / Tape &Reel
†For information on tape and reel specifications,including part orientation and tape sizes, pleaserefer to our Tape and Reel Packaging SpecificationBrochure, BRD8011/D.
NCH−RSL10−101Q48−ABG(Note 1)
QFN48(Pb−Free)
3000 / Tape &Reel
481
QFN48CASE 485BA
1. QFN48 version: production ready: July 2017
(QFN48) (WLCSP51)
RSL10AWLYWW
�
RSL10
www.onsemi.cn2
�� �
• ARM Cortex−M3���:32���,!��2%
��,��36��47��������、�
-567�8!。
• LPDSP32:32�9Harvard DSP��,��8�
:9�"#$%&�$��;��。<RSL108!=>�?@��A,�BC$�47$%&�。
• ����:<2.4 GHz"#�!��D:�,RFFEE�������FG H���IJK�2;
�<�L。
• ����:��5��,��2 Mbps"#=>�� JK�?@。RSL10D*�8A��BMCDEN,FBMOG2PQHIRS� BC�
��JK�。
• ��� �SoC:9�TMBU�;�'J�V
W、XK�、/, RAM,Y�、DMAZK�,�[\]�^L�] �_。
• ������:<�9MND%,RSL10C`*�+,��。$�47*�+,��OP,?a:
♦ “IO)-”OP。<*�+,���,���
50 nA (1.25 V VBAT)。♦ b`�32 kHzXK�,8A�%�IcQdR
�eND。f��g��90 nA (1.25 V VBAT)。♦ h�:S,�i?@8 kB RAM,���.�
。f��g��300 nA (1.25 V VBAT)。♦ T�“�IO)-”OPc,U�j�V1��
W'Xk�,<*�+,���lm��)�
(VBAT�'Y�%)。• ����:��ln�o4Z��6p��,
((8q�r[\sr][\�^。tu���,
vw�V1���30 �A。
• �����:x�LPDSP32、ARM Cortex−M3��� "#y_:*z���,�����
H�JK�。
• ���������:RSL100-��;��`a
�,VBAT�'((�1.1�3.3 V。
• ���� !:I2C、UART、!�SPI�_、
PCM�_、��GPIO。U���{b|c�_ d
}e~�。
• "#�$%�&�(ASRC)�'( �)*+��'
$���7<"#z' "#��"f�g"#h
�����。"#��%�U$���7�ij�
uK,klRTCI�%�:#��d`%�。
• ����+,-:!"I��"#8�%,�m�
"#y_�XTAL/PLL�48 MHz�%���E
RSL10�%。<�!"/��"#8�%,RSL10�n48 MHz XTAL、�QRCXK�、32 kHzXK�IcQ%�。�#RTC%�(32 kHz)U<*�+,���#�。���QXTAL、RCXK�I�{d`op$�z'。
• ��./01:$�76 kB�SRAMq�,Y 88 kB�SRAM� ,Y。$��384 kB�/,,��,Y��� H���。ARM Cortex−M3����SRAM /I/,�D。
• IP234�:j�r%��s�KBC�/,�
�。�;tu<j~V1�,�cQvw&'�
�I,Y�。
• �54�6789:
♦ "#����:IDD < 1.8 mA @ VBAT 1.25 V(Rx��),#�QHIRS���JK"#�
,��、%& !x7 kHz*+"#���SPI�_。
♦ �o4Z��:IDD 1.3 �A,�5\�fy<:�%��zCD��(VBAT 3 V,DCDCXk�j�)。
• :;<=:?@!��ARM Cortex−M3����8!{��[FG�Eclipse H�0-8!|�(IDE)W�。#�Synopsys8!=>(�M}$�)8!LPDSP32(&。
• RoHS���>
RSL10
www.onsemi.cn3
RSL10���
RSL10V1��h�1:~。RF
Radio PHY
Baseband controllerBluetooth 5 (LE 2M) and custom protocol
Power Management
LPDSP3232−bit Dual Harvard core
ARM� Cortex�-M3
Processor
Interfaces
Oscillators
Timers
IP Protection
JTAG
SWJ−DP
DMA
RAMs andFlash
ADC
PCM
I2C
UART
ADC (4x)
DMIC(2x)
PWM(2x)
GPIO
XTAL_32 kHz
XTAL_48 MHz
Battery
OD
Figure 1. RSL10 Block Diagram
SPI(2x)
BusArbiters
Sample Rate ConverterAudio Sink Clock
Counters
Table 1. ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Min Max Unit
VBAT Power supply voltage 3.63 V
VDDO I/O supply voltage 3.63 V
VSSRF RF front−end ground −0.3 V
VSSA Analog ground −0.3 V
VSSD Digital core and I/O ground −0.3 V
Vin Voltage at any input pin VSSD − 0.3 VDDC + 0.3 V
T functional Functional temperature range −40 85 °C
T storage Storage temperature range −40 85 °C
Caution: Class 2 ESD Sensitivity, JESD22−A114−B (2000 V)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionalityshould not be assumed, damage may occur and reliability may be affected.(����) ����� �����������,�������。�������,������� �,��� !����,"#�$%。
Table 2. RECOMMENDED OPERATING CONDITIONS
Description Symbol Conditions Min Typ Max Units
Supply voltage operating range VBAT Input supply voltage on VBAT pin 1.1 1.25 3.3 V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyondthe Recommended Operating Ranges limits may affect device reliability.&'�(�)*:
+�&,(����-�.��/,����01234。5/67&,(����-�8����9���34,���"#����$%。
RSL10
www.onsemi.cn4
Table 3. ELECTRICAL PERFORMANCE SPECIFICATIONS Unless otherwise noted, the specifications mentioned in the table below are valid at 25°C at VBAT = VDDO = 1.25 V.
Description Symbol Conditions Min Typ Max Units
OVERALL
Current consumption RX,VBAT = 1.25 V
IVBAT RX Mode, ON Semiconductor propri-etary audio streaming protocol at 7 kHzaudio BW, 5.5 ms delay.
− 1.8 − mA
Current consumption TX,VBAT = 1.25 V
IVBAT TX Mode, ON Semiconductor propri-etary audio streaming protocol at 7 kHzaudio BW, 5.5 ms delay.
− 1.8 − mA
Deep sleep current,example 1, VBAT = 1.25 V
Ids1 Wake up from wake up pin. − 50 − nA
Deep sleep current,example 2, VBAT = 1.25 V
Ids2 Embedded 32 kHz oscillator runningwith interrupts from timer or external pin.
− 90 − nA
Deep sleep current,example 3, VBAT = 1.25 V
Ids3 As Ids2 but with 8 kB RAM data reten-tion.
− 300 − nA
Standby Mode current,VBAT = 1.25 V
Istb Digital blocks and memories are notclocked and are powered at a reducedvoltage.
− 30 − �A
Current consumption RX,VBAT = 3 V
IVBAT RX Mode, ON Semiconductor propri-etary audio streaming protocol at 7 kHzaudio BW, 5.5 ms delay.
− 0.9 − mA
Current consumption TX,VBAT = 3 V
IVBAT TX Mode, ON Semiconductor propri-etary audio streaming protocol at 7 kHzaudio BW, 5.5 ms delay.
− 0.9 − mA
Deep sleep current,example 1, VBAT = 3 V
Ids1 Wake up form wake up pin. − 25 − nA
Deep sleep current,example 2, VBAT = 3 V
Ids2 Embedded 32 kHz oscillator runningwith interrupts from timer or external pin.
− 40 − nA
Deep sleep current,example 3, VBAT = 3 V
Ids3 As Ids2 but with 8 kB RAM data reten-tion.
− 100 − nA
Standby Mode current,VBAT = 3 V
Istb Digital blocks and memories are notclocked and are powered at a reducedvoltage.
− 17 − �A
EEMBC CoreMark BENCHMARK for the ARM Cortex−M3 Processor and the LPDSP32 DSP
ARM Cortex−M3 processor running from RAM
At 48 MHz SYSCLKUsing the IAR 8.10.1 C compiler
159.1 CoreMark
LPDSP32 running from RAM At 48 MHz SYSCLKUsing the 2017.03 release of theSynopsys LPDSP32 C compiler
122.9 CoreMark
ARM Cortex−M3 processor andLPDSP32 running from RAM,VBAT = 1.25 V
At 48 MHz SYSCLK 104.9 CoreMark/mA
ARM Cortex−M3 processor andLPDSP32 running from RAM,VBAT = 3 V
At 48 MHz SYSCLK 248.5 CoreMark/mA
INTERNALLY GENERATED VDDC: Digital Block Supply Voltage
Supply voltage: operating range VDDC 0.9 1.15 1.32(Note 2)
V
Supply voltage: trimming range VDDCRANGE 0.75 1.38 V
Supply voltage: trimming step VDDCSTEP − 10 − mV
INTERNALLY GENERATED VDDM: Memories Supply Voltage
Supply voltage: operating range VDDM 1.08 1.15 1.32(Note 3)
V
Supply voltage: trimming range VDDMRANGE 0.75 1.38 V
Supply voltage: trimming step VDDMSTEP − 10 − mV
INTERNALLY GENERATED VDDRF: Radio Front end supply voltage
Supply voltage: operating range VDDRF 1.00 1.10 1.32 (Notes4 and 5)
V
RSL10
www.onsemi.cn5
Table 3. ELECTRICAL PERFORMANCE SPECIFICATIONS Unless otherwise noted, the specifications mentioned in the table below are valid at 25°C at VBAT = VDDO = 1.25 V.
Description UnitsMaxTypMinConditionsSymbol
INTERNALLY GENERATED VDDRF: Radio Front end supply voltage
Supply voltage: trimming range VDDRFRANGE 0.75 1.38 V
Supply voltage: trimming step VDDRFSTEP − 10 − mV
INTERNALLY GENERATED VDDPA: Optional Radio Power Amplifier Supply Voltage
Supply voltage: operating range VDDPA 1.05 1.3 1.68 V
Supply voltage: trimming range VDDPARANGE 1.05 1.68 V
Supply voltage: trimming step VDDPASTEP − 10 − mV
Supply voltage: trimming step DCDCSTEP − 10 − mV
VDDO PAD SUPPLY VOLTAGE: Digital Level High Voltage
Digital I/O supply VDDO − VBAT − V
INDUCTIVE BUCK DC−DC CONVERTER
VBAT range when the DC−DCconverter is active (Note 6)
DCDCIN_RANGE
1.4 3.3 V
VBAT range when the LDO isactive
LDOIN_RANGE
1.1 3.3 V
Output voltage: trimming range DCDCOUT_RANGE
1.0 1.2 1.32 V
Supply voltage: trimming step DCDCSTEP − 10 − mV
POWER−ON RESET
POR voltage VBATPOR 0.4 0.8 1.0 V
RADIO FRONT−END: General Specifications
RF input impedance Zin Single ended − 50 − �
Input reflection coefficient S11 All channels − − −8 dB
Data rate FSK / MSK / GFSK RFSK OQPSK as MSK 62.5 1000 3000 kbps
Data rate 4−FSK − − 4000 kbps
On−air data rate bps GFSK 250 2000 kbps
RADIO FRONT−END: Crystal and Clock Specifications
Xtal frequency FXTAL Fundamental 48 MHz
Equiv. series Res. ESRXTAL 20 − 80 �
Differential equivalent loadcapacitance
CLXTAL 6 8 10 pF
Settling time − 0.5 1.5 ms
RADIO FRONT−END: Synthesizer Specifications
Frequency range FRF Supported carrier frequencies 2360 − 2500 MHz
RX frequency step RX Mode frequency synthesizer reso-lution
− − 100 Hz
TX frequency step TX Mode frequency synthesizer reso-lution
− − 600 Hz
PLL Settling time, RX tPLL_RX RX Mode − 15 25 �s
PLL Settling time, TX tPLL_TX TX mode, BLE modulation − 5 10 �s
RADIO FRONT−END: Receive Mode Specifications
Current consumption at 1 Mbps,VBAT = 1.25 V
IBATRFRX VDDRF =1.1 V, 100% duty cycle − 5.6 − mA
Current consumption at 2 Mbps,VBAT = 1.25 V
IBATRFRX VDDRF =1.1 V, 100% duty cycle − 6.2 − mA
Current consumption at 1 Mbps,VBAT = 3 V, DC−DC
IBATRFRX VDDRF =1.1 V, 100% duty cycle − 3.0 − mA
Current consumption at 2 Mbps,VBAT = 3 V, DC−DC
IBATRFRX VDDRF =1.1 V, 100% duty cycle − 3.4 − mA
RX Sensitivity, 0.25 Mbps 0.1% BER (Note 7) − −97 − dBm
RSL10
www.onsemi.cn6
Table 3. ELECTRICAL PERFORMANCE SPECIFICATIONS Unless otherwise noted, the specifications mentioned in the table below are valid at 25°C at VBAT = VDDO = 1.25 V.
Description UnitsMaxTypMinConditionsSymbol
RADIO FRONT−END: Receive Mode Specifications
RX Sensitivity, 0.5 Mbps 0.1% BER (Note 7) − −96 − dBm
RX Sensitivity, 1 Mbps, BLE 0.1% BER (Note 7) Single−ended onchip antenna match to 50 �
− −94 − dBm
RX Sensitivity, 2 Mbps, BLE 0.1% BER (Note 7) − −92 − dBm
RSSI effective range Without AGC − 60 − dB
RSSI step size − 2.4 − dB
RX AGC range − 48 − dB
RX AGC step size Programmable − 6 − dB
Max usable signal level 0.1% BER 0 5 − dBm
RADIO FRONT−END: Transmit Mode Specifications
Tx peak power consumption atVBAT = 1.25 V (Note 8)
IBATRFTX Tx power 0 dBm, VDDRF = 1.07 V,VDDPA: off, LDO mode
− 8.9 − mA
Tx power 3 dBm, VDDRF = 1.1 V, VDDPA = 1.26 V, LDO mode
− 17.4 − mA
Tx power 6 dBm, VDDRF = 1.1 V, VDDPA = 1.65 V, LDO mode
− 25 − mA
Tx peak power consumption atVBAT = 3 V (Note 8)
IBATRFTX Tx power 0 dBm, VDDRF = 1.07 V,VDDPA: off, DC−DC mode
− 4.6 − mA
Tx power 3 dBm, VDDRF = 1.1 V, VDDPA = 1.26 V, DC−DC mode
− 8.6 − mA
Tx power 6 dBm, VDDRF = 1.1 V, VDDPA = 1.65V, DC−DC mode
− 12 − mA
Transmit power range BLE or 802.15.4 OQPSK −17 +0.5 +6 dBm
Transmit power step size Full band. − 2 − dB
Transmit power accuracy Tx power 3 dBm. Full band. Relative tothe typical value.
−1 − +1 dB
Tx power 0 dBm. Full band. Relative tothe typical value.
−1.1 − 1.5 dB
Power in 2nd harmonic 0 dBm mode. 50 � for “Typ” value. PTfor “Max” value (Note 9)
− −31 −18 dBm
Power in 3rd harmonic 0 dBm mode. 50 � for “Typ” value. PTfor “Max” value (Note 9)
− −40 −31 dBm
Power in 4th harmonic 0 dBm mode. 50 � for “Typ” value. PTfor “Max” value (Note 9)
− −49 −42 dBm
ADC
Resolution ADCRES 8 12 14 bits
Input voltage range ADCRANGE 0 − 2 V
INL ADCINL −2 − +2 mV
DNL ADCDNL −1 − +1 mV
Channel sampling frequency ADCCH_SF For the 8 channels sequentially, SLOWCLK = 1 MHz
0.0195 − 6.25 kHz
32 kHz ON−CHIP RC OSCILLATOR
Untrimmed Frequency FreqUNTR 20 32 50 kHz
Trimming steps Steps 1.5 %
3 MHz ON−CHIP RC OSCILLATOR
Untrimmed Frequency FreqUNTR 2 3 5 MHz
Trimming steps Steps 1.5 %
Hi Speed mode Fhi 10 MHz
32 kHz ON−CHIP CRYSTAL OSCILLATOR (Note 10)
Output Frequency Freq32k Depends on xtal parameters 32768 Hz
RSL10
www.onsemi.cn7
Table 3. ELECTRICAL PERFORMANCE SPECIFICATIONS Unless otherwise noted, the specifications mentioned in the table below are valid at 25°C at VBAT = VDDO = 1.25 V.
Description UnitsMaxTypMinConditionsSymbol
32 kHz ON−CHIP CRYSTAL OSCILLATOR (Note 10)
Startup time 1 3 s
Internal load trimming range Steps of 0.4 pF 0 25.2 pF
External load Capacitance Maximum external capacity allowed(package, routing, etc.)
3.5 pF
ESR 100 k�
Duty Cycle 40 50 60 %
DC CHARACTERISTICS OF THE DIGITAL PADS − With VDDO = 2.97 V – 3.3 V, nominal: 3.0 V Logic
Voltage level for high input VIH 2 VDDO+0.3 V
Voltage level for low input VIL VSSD−0.3
0.8 V
DC CHARACTERISTICS OF THE DIGITAL PADS − With VDDO = 1.1 V – 1.32 V, nominal: 1.2 V Logic
Voltage level for high Input VIH 0.65*VDDO
VDDO+0.3 V
Voltage level for low input VIL VSSD−0.3
0.35* VDDO V
DIO DRIVE STRENGTH
DIO drive strength IDIO 2 12 12 mA
FLASH SPECIFICATIONS
Endurance of the 384 kB of flash 100,000 write/erasecycles
Endurance for sections NVR1,NVR2, and NVR3 (6 kB in total)
1000 write/erasecycles
Retention 25 years
2. The maximum VDDC voltage cannot exceed the VBAT input voltage or the VCC output from the buck converter.3. The maximum VDDM voltage cannot exceed the VBAT input voltage or the VCC output from the buck converter.4. The maximum VDDRF voltage cannot exceed the VBAT input voltage or the VCC output from the buck converter.5. The VDDRF calibrated targets are:
− 1.10 V (TX power > 0 dBm, with optimal RX sensitivity)− 1.07 V (TX power = 0 dBm)− 1.26 V (TX power = 3 dBm)
The VDDPA calibrated targets are:− 1.30 V− 1.26 V (TX power = 3 dBm, assumes VDDRF = 1.10 V)− 1.65 V (TX power = 6 dBm, assumes VDDRF = 1.10 V)
6. The LDO can be used to regulate down from VBAT and generate VCC. For VBAT values higher than 1.5 V, the LDO is less efficient andit is possible to save power by activating the DC−DC converter to generate VCC.
7. Signal generated by RF tester8. All values are based on evaluation board performance at the antenna connector, including the harmonic filter loss9. Harmonics need to be filtered with an external filter (See “RF Filter” on Table 5).10.These specifications have been validated with the Epson Toyocom MC – 306 crystal
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Productperformance may not be indicated by the Electrical Characteristics if operated under different conditions. (����) :;<=>?,“�@A%”�-����B.�CDE����F%�GH。��7�IE��34,�F%����“�@A%”�-�.�%�GH��!。
RSL10
www.onsemi.cn8
Table 4. RECOMMENDED VDDC and VDDM LEVEL
Operating Frequency (MHz) Minimum VDDC Voltage (V) VDDM Voltage (V) Restriction
0 – 24 0.92 1.08 The ADC will be functional in low frequencymode and between 0 and 85°C only.
0 – 24 1 1.08 None
24 – 48 1.05 1.08 None
NOTE: The VDDC and VDDM regulators have to be trimmed at least 10 mV above the minimum voltages indicated in Table 4.
Table 5. RECOMMENDED EXTERNAL COMPONENTS
Components Function Recommended typical value Tolerance
Cap (VBAT−VSSA) VBAT decoupling 4.7 �F +100 nF + 100 pF (Note 11) ±20%
Cap (VDDO−VSSD) VDDO decoupling 1 �F ±20%
Cap (VDDRF−VSSRF) VDDRF decoupling 2.2 �F ±20%
Cap (VCC−VSSA) VCC decoupling Low ESR 2.2 �F (Note 12) or 4.7 �F ±20%
Cap (VDDA−VSSA) VDDA decoupling 1 �F ±20%
Cap (CAP0−CAP1) Pump capacitor for the charge pump 1 �F ±20%
Inductor (DC−DC) DC−DC converter inductance Low ESR 2.2 �H (See Table 6 below) ±20%
Xtal_32 kHz Xtal for 32 kHz oscillator − MC – 306, Epson− CM8V−T1A, Micro Crystal Switzerland
Xtal_48 MHz Xtal for 48 MHz oscillator 8Q−48.000MEEV−T, TXC Corporation, Taiwan
RF filter External harmonic filter 1.5 pF / 3 nH / 1.5 pF / 1.8 nH ±20%
NOTE: All capacitors used must have good RF performance.11. The recommended decoupling capacitance uses 3 capacitors with the values specified12.Example: AMK105BJ225_P, Taiyo Yuden
Table 6. RECOMMENDED DC−DC CONVERTER INDUCTANCE TABLE
Manufacturer Part Number Case Size Comments
Taiyo Yuden CKP2012N_2R2 0805 SMD withTmax = 1.0 mm
A degradation of 1 dB in the RX sensitivity is expected in DC−DC mode(Vbat = 3.3 V) versus LDO mode operation.
Taiyo Yuden CBMF1608T2R2M 0603 SMD withTmax = 1.0 mm
A degradation of <1 dB in RX sensitivity is expected in DC−DC mode(Vbat = 3.3 V) versus LDO mode operation. Also, the current drawn fromthe battery will be 4−10% higher than when the CKP2012N_2R2 is used
depending on operation mode and settings.
NOTE: Values have been measured on the QFN version of the RSL10 development board.
PCB����
1.%�����������o��P。
2.��d}��)d>�����E�。
3.���������d`��。
4.���� ��U��。
5.��PCB%���¡��,��¢�£�"#�。
6.��h��LPCB,¤<¥¦O�>�����L�P�§,�W���"#��¨©��。
7.:��'�'��8A��"#��,����H��dR%�。�*�'���+�yªP,�lª
P<��L(8APCB����V1dR����')。8.�{��)d>��¢��«�I�'。
9.!��DC−DCW��P ª¬EDC−DC����RX�������M。
JK: MNOP�Q��=�PCBOP�RS�T,UVWwww.onsemi.cnXY。
RSL10
www.onsemi.cn9
Table 7. BUMP AND COATING SPECIFICATIONS
Subject Specification
Bump metallization Sn 97.7%/Ag 2.3%
Backside coating specification Lintec Adwill LC2850
Backside coating thickness 25 �m
Figure 2. RSL10 Application Diagram, 3.3 V
NOTE: DC−DC inductance is not needed. RSL10should be configured in LDO mode and theDC−DC converter should not be used.
Figure 3. RSL10 Application Diagram, 1.25 V
RSL10
VS
SPA
VS
SA
VB
AT
VD
DC
VSSA
VD
C
100pF
VSSA
4.7uF
VS
SD
VD
DO
1.4 − 3.6V
VSSD
1uF
RF
XTAL48_P
VD
DR
F
XTAL48_N
VSSA
2.2uF
XTAL32k_IN
VD
DA
XTAL32k_OUT
VSSA
1uF
Cpump
cap0
VS
SR
F
cap1
VC
C
2.2uH
VD
DM
1uF
3nH
1.5pF 1.5pF
1.8nH
VSSA
100nF
VSSA
VS
S VD
DS
YN
_SW
VD
DR
F_S
W
4.7uF
VS
SPA
VS
SA
VB
AT
VD
DC
RSL10
VSSA
4.7uF
VS
SD
VD
DO
1.25V
VSSD
1uF
RF
XTAL48_P
VD
DR
F
XTAL48_N
VSSA
2.2uF
XTAL32k_IN
VD
DA
XTAL32k_OUT
VSSA
1uF
Cpump
cap0
VS
SR
F
VC
C
cap1 VD
DM
1uF
3nH
1.5pF 1.5pF
1.8nH
VSSA
100pF
VSSA
100nF
VSSA
VS
S VD
DS
YN
_SW
VD
DR
F_S
W
4.7uF
VBAT
VBAT
RSL10
www.onsemi.cn10
Table 8. CHIP INTERFACE SPECIFICATIONS
Pad Name DescriptionPower
Domain I/O A/D PullPad #,
WLCSPPad #,QFN48
VBAT Battery input voltage VBAT I P K5,K7,K10 9
VDC DC−DC output voltage to external LC filter O A J11 10
VCC DC−DC filtered output I P/A K11 12
XTAL32_IN Xtal input pin for 32 kHz xtal I/O A L10 14
XTAL32_OUT Xtal output pin for 32 kHz xtal I/O A L11 13
VSSA Analog ground I/O P E10 8
RES RESERVED I D D F8 11
VDDA Charge pump output for analog and flash supplies VDDA I/O P/A F11 5
VDDRF LDO’s output for radio voltage supply I/O P/A A11 48
CAP0 Pump capacitor connection O A H11 7
CAP1 Pump capacitor connection O A G10 6
AOUT Analog test pin O A L6 4
VDDRF_SW Supply pin for the RF VDDRF_SW P/A A9 47
VDDSYN_SW Supply pin for the radio synthesizer P/A B8 45
VSSRF RF analog ground I/O P B9 46
XTAL48_N Negative input for the 48 MHz xtal block I/O A A6 43
XTAL48_P Positive input for the 48 MHz xtal block I/O A A8 44
VDDPA Radio power amplifier voltage supply VDDPA I/O P/A C11 2
VSSPA Radio power amplifier ground I/O P D11 3
RF RF signal input/output (Antenna) RF I/O A B11 1
VPP Flash high voltage access VPP I/O A J6 17
RSL10
www.onsemi.cn11
Table 8. CHIP INTERFACE SPECIFICATIONS
Pad NamePad #,QFN48
Pad #,WLCSPPullA/DI/O
PowerDomainDescription
NRESET Reset pin VDDO I D U L9 16
WAKEUP Wake−up pin for power modes I A L8 15
VDDC LDO output for Core logic voltage supply I/O P H6 19
VDDM LDO output for memories voltage supply I/O P F4 21
VDDO Digital I/O voltage supply I P B4 36
VSSD Digital ground pad for I/O I/O P F3, D6, F9 28, 35
VSS (*) Substrate connection for the RF part I/O P B6 42
EXTCLK External clock input / Internal clock output I/O D U F1 31
DIO[0] Digital input output / ADC 0 I/O A/D U/D L4 18
DIO[1] Digital input output / ADC 1 I/O A/D U/D L3 20
DIO[2] Digital input output / ADC 2 I/O A/D U/D L2 23
DIO[3] Digital input output / ADC 3 I/O A/D U/D L1 25
DIO[4] Digital input output 4 I/O D U/D K2 24
DIO[5] Digital input output 5 I/O D U/D K1 27
DIO[6] Digital input output 6 I/O D U/D J1 29
DIO[7] Digital input output 7 I/O D U/D H1 30
DIO[8] Digital input output 8 I/O D U/D G2 26
DIO[9] Digital input output 9 I/O D U/D E2 22
DIO[10] Digital input output 10 I/O D U/D D1 32
DIO[11] Digital input output 11 I/O D U/D B2 38
DIO[12] Digital input output 12 I/O D U/D A1 37
DIO[13] Digital input output / CM3−JTAG Test Reset I/O D U/D A2 39
DIO[14] Digital input output / CM3−JTAG Test Data In I/O D U/D A3 41
DIO[15] Digital input output / CM3−JTAG Test Data Out I/O D U/D A4 40
JTCK CM3−JTAG Test Clock I/O D U C1 33
JTMS CM3−JTAG Test Mode State I/O D U B1 34
*VSS should be connected to VSSRF at the PCB level.
NOTE: It is recommended that the QFN package metal slug be left open/floating for optimal Rx sensitivity performance
Legend:Type: A = analog; D = digital; I = input; O = output; P = powerPull: U = pull up; D = pull downPull up: selectable between 10 k� and 250 k�Pull down: 250 k�All digital pads have a Schmitt trigger input.All DIO pads have a programmable I2C low pass filter.
RSL10
www.onsemi.cn12
���
RSL10V1TMh�4:~。
Figure 4. RSL10 Architecture
DS
S
BB_DRAM18 KB
AR
M C
orte
x−M
3P
roce
ssor DBus
JTA
G
PR
OM
4K
B
PB
us b
ridge
DRAM08 KB
PBus
DM
A8
chan
nels
UA
RT
Wat
chdo
g
DIO
&G
PIO
SP
I[0:1
]
AC
S b
ridge
TIM
ER
[0:3
]
PC
M
I2 C
LPD
SP
32
Bas
eban
dco
ntro
ller
32/4
0
40
32
SPI interface
RF
fron
t−end
Arb
iter
JTA
G
CR
C
NV
IC
Arb
iter
Loop
Cac
he
PM
EM
DM
EM
0D
ME
M1
32
Fla
sh38
4+
7K
B
Fla
sh C
opie
r
Sys
tem
Con
trol
Inte
rrup
tC
ontr
olle
r
Com
man
dG
ener
ator
CBus
DM
A a
cces
s
DS
P a
cces
s
Pro
cess
orac
cess
BB_DRAM08 KB
DSP_PRAM110 KB
DSP_PRAM010 KB
DSP_PRAM210 KB
DSP_PRAM310 KB
40
IBus
DRAM18 KB
DRAM28 KB
Aud
io S
ink
Clo
ckC
ount
ers
PR
AM
38
KB
PR
AM
28
KB
PR
AM
18
KB
PR
AM
08
KB
EC
C
Arb
iter
32/4
0
AS
RC
AC
S
DSP_DRAM58 KB
DSP_DRAM48 KB
DSP_DRAM38 KB
DSP_DRAM28 KB
DSP_DRAM18 KB
DSP_DRAM08 KB
DM
A B
US
DM
IC
Arb
iter
Arb
iter
SB
us
BB
acc
ess
AP
B b
ridge
Loop
Cac
he
32
RSL10
www.onsemi.cn13
������
���'���ND:9�J&��'%,
RSL10�'J�VWtu23�'。H$�®�h
�:
1.�Z�',¤<9M%,Q¯°�n23。
2.<±`I�T��%,tu�ERSL106-�g²。
3.<���³´�,OG<Y+��� �'((
�ND。
<���'��1.4 V%,RSL10OG#�DC−DCXk�,��¢0��;�,I�<VBAT��1.4 V%,#��QLDO。DC−DCXk�ILDO`a�d}��ERSL10�H��'`a��µ��。�*�µ
?a:
• E�{��(VDDC)���$q�'`a�
• E,Y�(VDDM)���$q�'`a�
• E���µ /,(VDDA)������
• E"#y_(VDDRF)���$q�'`a�
• E"#���¶�(VDDPA)���$q�'`a�:�`a����d}���+6 dBm�·�,I�¸,¹�+3 dBm�d}�� ��1.4 V����'d��³´。hºRSL10��<����d
�,��VDDPA`a�,-���#�
VDDRF。
�� ����
RSL10�23%�(SYSCLK)�47z':• 48 MHz«�XK�,���q=$��
• �Q»`�RCXK�,$�3–12 MHz%�,<23j~%#�
• 2%%�,��tu��,���z'��:
♦ 32 kHz RCXK�♦ 32 kHz«�XK�
♦ DIO0�DIO3H����cQd`
• JTAG%�,��`���,'�JTCKop
• cQ%�z','�EXTCLKop
<�9M%,��23�������%�。
�c,���%�p����OP��#�,&
¶ �°W�%�¼����g�。
%�¡kVW���Z23%� /I+,[tu
����RTC%�。hº%�#����J¢�,
RSL10 IC���。%�¡k�F�¢��2 kHz。��µ[H£!���¤��j�,0¥��。
����
RSL10 2.4 GHz"#y_E�������FG H
�FG、��IJK�2;�<�L。!��<
¯�Q¦�2.4 GHz ISM§¨(2.4000�2.4835 GHz)¤��:
• ��5��,$�LE 2M PHY��
• QHIRS��JK� H�JK�
RSL10"#y_?a��M�{�,����½�
:
• IEEE 802.15.4FG,�$G�FG ����<
�L,?aZigBee Thread• ���I��"#�。
2.4 GHz"#y_D���#TM,¤?@��M¾D
µ:
• ��V_"#__• *50 �"#d`�V1�¦O©ª
• �¿«、���LNA (�ÀÁ�¶�) ¬U�
• d}���+3 dBm�PA (���¶�),����
802.15.4 OQPSK��,��&� +6 dBm,-#
���PA�'• ADCXk�
• RSSI (����Â�~),>�60 dB�F��(
(,g�2.4 dB (�®¯AGC)• \¯0-����#�U-,>�Ã��°J%
f,±���{)d`K(²Ä§Å$q)• 48 MHz XTALÆ®(i`)
• \¯0-�FSK`K%`�,>�$q²Ä§Å、� �� `K�
• �{D*(DBB)>]�7=>L��,?a³~� ?��ÇÈ �g、CRC�[V´�Rx Tx 128{aFIFO
• �D ¤D�{�_
2.4 GHz"#y_?@>������\�!�:
• IEEE 802.15.4V1$& %&
• ÊËÌ�$&• � µÍ2.4 GHz"#y_?@������{D*(`K、
OK $q�¶),�:��������
�、802.15.4 OQPSK DSSS,�[���。���
62.5 kbps�2 Mbps�$q� ���[>�$q
²Ä§Å `K��FSK。
2.4 GHz"#y_U>�IEEE 802.15.4V1$& %&、ÊËÌ�$& � µÍ��。� ?��?
a:
• ³~±`ÇÈ �gÎ{• ³~� ?���q�• D5°Ï¡Ð• #�$qCRC�@�,³~CDCRC�· ¸�
• �Ñ��• 2x 128{aFIFO
RSL10
www.onsemi.cn14
!"#$% �&'
RSL10���D*ZK����"#y_。FZK
��OPRSL10�<�L,��$��������
]。Ò���"#k��±�k���(DTM)L$�
��_ ��,¤����2;�Q�=>L�[H
�ZK�L5�W�。FZK�����5¡¹�N
· � ?��。
RSL10���5���i,$�LE 2 Mbps�� �������ÓÔº5�:�?��。
RSL10�]U���������JK»��:
• ���Õ¼"#���JK"#�
• ��8A½qÖ�¾CD���"#���JK"
#�
�c,U���� JK��,。;h,8A½q
Ö�¾��"#%,�U�#��¿zZK#�F
G���������"#�]。
»��,?aOPÎ� ��q�,�����
��,�<ARM Cortex−M3�����D。��IP<»{���82;,h�5:~。
Figure 5. Bluetooth Protocol Implementation
Baseband+ RF Front-End
Link layer
L2CAP
SMP ATT
GAP, GATT
Application
Fin
d m
e
He
art
ra
te
Glu
cose
Mo
n.
Blo
od
Pre
s.
Re
zen
ce
So
ftw
are
Sta
ckHID ...
���RSL10��������OPÎ�~;。
0��×�[:$��OPÎ�\ɽÀ,Á�Â
RSL108!=>Ø�。
• Ùs¸• ��
• <Ú���
• ��• %f• Ã'• ÃÄ�k• HID over GATT (HOG)
• $-8Å• �¿$-ÆÛ• Çg��• ÈD��• ÈD��• J�=SÉ
• Rezence (AirFuel� AllianceJ>�JK�,��
���N�)
ARM Cortex−M3(�%)��
ARM Cortex−M3���Ü23?@ARM Cortex−M3���,��RSL10V1�?���。�c,U?@
��D*ZK�,�[:��_ H�^L�]。
ARM Cortex−M3(�%ARM Cortex−M3���ÝÂÞC�32���,�[
b`�@s� ALU,����vw�ZK��。
»�8!�CÊËCD。
Ò��Ì�>��Í�、��eÕ¼,�[�-5
`���。?M��9M���、Ã��e���*
Lb`���。����h��ARMTMv7−M。
E��'J�,<.�ZK������P�tu
��,<����,���%��Î��。0bØ�
eßlZK(NVIC)�ÏÐND,�<�e%j�;�
tu��。
LPDSP32LPDSP32��QHIRS�8!�32�DSP,�CÊË$q。LPDSP32����;�9Harvard DSP,��V(32�) 9i�(64�)·s。
LPDSP32�9MACVW—ÖÂ,YTMÑA�ÍB
Í,��"#��=$。�7ÞCTMU$��:
• !�72�ALU,�à�DV9i�·s ÒÓND
• !�32�É�/��@s�
• á�64�ÔÖ�,>�8�Õ}(âã�)
LPDSP328q��Q¦"#�]8��;:9�"#
$%&�。�?a(0� �)����4@�$%&
�:
• 16 kHzh��,��7 kHz*+��
(;hSBC、G.722ImSBC$%&�)• 24 kHzh��,��11 kHz*+��
(;hh�OPUSFG�G.722、CELT $%&�)
=ARM Cortex−M3����8�8A�e �D,Y
�\-。»�8!#�CÊËCD,ä Synopsys�M}$�8!=>。
RSL10
www.onsemi.cn15
*+
RSL10?@:• !�´Ö�SPI�_,<?�� ����OP。
• ��\¯OP�PCM�_
• ��FG�8�I2C�_
• ��FG�8�UART�_
• !�PWM (²Ä+�`K)e~�,<J#��
��VÌd}��
• ��98z�{b|c(DMIC)d`
• ��d}e~�,��±����×åæÁ�。
• ����ARM Cortex−M3���� SWJ−DP �_
• ����LPDSP32�JTAG�_
RSL10U�16�DIOop(�{d`/d}),pJØ�S&'�_,I�$8�DIO。
,�
RSL10?@:• á�8��%�
• ��DMA (±�,Y�vw)ZK�,��<^L�
] ,Y�f)x� ,��E����&'çè
• ��/,éÙ�,��êëÍSRAM,Y�,¤-=CRC�µ�Ú��¸�/,��
• ����s�{Xk�(ADC),8AARM Cortex−M3���vw。ADCÛì4�cQ�(DIO[0]−DIO[3])、AOUT、VDDC、VBAT/2 ADCEí�。
• !�FG�î|ïE&(CRC)�µ,��j��C
��q�(& � �\É
• ��ðgh��Xk�(ASRC)�µ "#��%�
�µ,��$��7<��=> ?u�]"f
�g"#h�����。
• ��Ü;�%�,��¡kRSL10ñݤCDò�。
• á�32�³?�~���。�*���óô�õ
23ND%f,�[���#���mARMCortex−M3���、LPDSP32 /,。�*�×E
�ÞF BÍ����ö���。
• ��IP�÷23,��j�/,���sÎr%�
�K。��<RSL10j~�,tu�cQvw
RSL10�&'��I,Y�。
• ��4����q�,Y�î|ß,,W�
RSL10��。8AßÄ<�*î|�Ûì�q�Î
{,lm/, RAM,Y��vwà�。
RSL10-.%��
À9½}�RSL10:���,Y�BM,�[4,Y
�BM�¶n +�。
Table 9. RSL10 MEMORY STRUCTURES
Memory type Data Width Memory Size Accessed by
Program memory (ROM) 32 4 kB ARM Cortex−M3 processor
Program memory (RAM) 32 4 instances of 8 kB ARM Cortex−M3 processor
Program memory (RAM) 40 4 instances of 10 kB LPDSP32 / ARM Cortex−M3 processor
Data memory (RAM) 32 1 instances of 8 kB ARM Cortex−M3 processor
Data memory (RAM) 32 2 instances of 8 kB ARM Cortex−M3 processor / LPDSP32
Data memory (RAM) 32 6 instances of 8 kB LPDSP32 / ARM Cortex−M3 processor
Data memory (RAM) 32 2 instances of 8 kB Baseband / ARM Cortex−M3 processor
Flash 32 384 kB ARM Cortex−M3 processor / Flash copier
�/�
#�23Fázá¡���23â�。E�RSL10V1,�ãFáäWå �h�:~:
• V12½:0x09
• V1º5:0x01
• V1Gæº5:0x01
��0�(ESD)12%&�?:ESD�ø��。��lç����E��
6-èHg²。¾<��、·� k�%h�!
��ESD�tùP,éú��WI��Iû。
3456
$��ÉØ\ü�=>,óô»�8!Jý\-�
êëêþ ��ÞFs®w�� �i!ª�É�A
q。
789��:�
��QHIRS��iI���0��×,Ávw
¸,�©ëwww.onsemi.cn。
;<��=>?
RSL10
www.onsemi.cn16
PACKAGE DIMENSIONS
QFN48 6x6, 0.4PCASE 485BA
ISSUE A
SEATINGNOTE 4
K
0.10 C
(A3) A
A1
D2
b
1
13
25
48
2X
2X
E2
48X
L
BOTTOM VIEW
DETAIL A
TOP VIEW
SIDE VIEW
D A B
E
0.10 C
ÉÉÉÉÉÉÉÉÉÉÉÉ
PIN ONELOCATION
0.10 C
0.08 C
C
37e
A0.07 BC
0.05 C
NOTES:1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.2. CONTROLLING DIMENSIONS: MILLIMETERS.3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN0.15 AND 0.30mm FROM TERMINAL TIP
4. COPLANARITY APPLIES TO THE EXPOSEDPAD AS WELL AS THE TERMINALS.
DIM MIN MAXMILLIMETERS
A 0.80 1.00A1 0.00 0.05A3 0.20 REFb 0.15 0.25D 6.00 BSCD2 4.40 4.60E 6.00 BSC
4.60E2 4.40e 0.40 BSC
L 0.30 0.50L1 0.00 0.15
NOTE 3
PLANE
DIMENSIONS: MILLIMETERS
0.25
4.66
0.40
4.66
48X
0.6848X
6.40
6.40
*For additional information on our Pb−Free strategy and solderingdetails, please download the ON Semiconductor Soldering andMounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
e/2
DETAIL B
L1
DETAIL A
L
ALTERNATE TERMINALCONSTRUCTIONS
L
ÉÉÉÉÉÉÉÉÉ
DETAIL B
MOLD CMPDEXPOSED Cu
ALTERNATECONSTRUCTION
K 0.20 MIN
PITCH
48X
PKGOUTLINE
RSL10
www.onsemi.cn17
PACKAGE DIMENSIONS
WLCSP51, 2.364x2.325CASE 567MT
ISSUE A
SEATINGPLANE
0.05 C
NOTES:1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.2. CONTROLLING DIMENSION: MILLIMETERS.3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.4. PACKAGE CENTER AND FOOTPRINT CENTER
ARE NOT COINCIDENT. REFER TO DIMENSION FFOR OFFSETS.
2X
DIMA
MIN NOM0.319
MILLIMETERS
A1
D 2.325 BSCE
b 0.09 0.10
e 0.252 BSC
0.350
ÈÈÈÈ
E
D
A B
PIN A1REFERENCE
0.03 C
0.08 CA1
A
C
0.060 0.075
2.364 BSC
F 0.0198 BSC
*For additional information on our Pb−Free strategy and solderingdetails, please download the ON Semiconductor Soldering andMounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.05 C2X TOP VIEW
SIDE VIEWNOTE 3
RECOMMENDED
PITCH
0.1051X
DIMENSIONS: MILLIMETERS
0.252
0.126
A1
PITCH0.252
eA0.05 BC
0.03 C
51X b
1 2 3
JHF
BOTTOM VIEW
4 6 8 9 10 11
DCBA
LK
GE
5 7
e/2
e e/2
F
NOTE 4
A3
MAX
A2 0.237 0.250A3 0.022 0.025
0.12
0.3810.0900.2630.028
0.0198
A2
RSL10
www.onsemi.cn18
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coveragemay be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liabilityarising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyeris responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless ofany support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can anddo vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’stechnical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorizedfor use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devicesintended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnifyand hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorneyfees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductorwas negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyrightlaws and is not for resale in any manner. (����)ON SemiconductorZONBSemiconductor Components Industries, LLC ([\]^ �)_�`�a7]bZ/_��bc/d��ef。[\]^ �g=Sh� 、ef、ij、e"klZ��mn�j。�o�p[\]^ ���F/� �T,UVWwww.onsemi.com/site/pdf/Patent*Marking.pdf。[\]^ �=jqr�s�.t�F#�uR,v�<4wm。[\]^ ��q�F�A�NxyN%#���、zt_{�,$�|{}MN_%N�F_�~�����,�&�q�����|{�,'�(���A���、6���_����。)cMq�%N�[\]^ ��F�MNZ�F��,'���.=��、�8Z[*��_f+,��[\]^ �Q����_MN�T。[\]^ �H��Z/_8-�Q��“,�”GH7�I�MN����&���u-,��%�$���/6&��u-。.=(�GH('�“,��”)���� �¡¢�c£q� �A�MN¤4¥�。[\]^ ��¦§�� ¨�,$�¦§��j 。[\]^ ��F�;©ª、«¬_jN��®�¯°±���²³�,_FDA 3´.µ�¶_7b9·¸�0=¹I_´12´�.µ�¶,_º34���¶。»)c¼)[\]^ ��F_��N�½´;«¬_¾jMN,)cM%[\]^ �¿�+ÀÁÂ、Â(、`�a、�Ã�aZÄÅe5�|{.=ÆÇ、ÈN、��Ç6ZÈN,�¿É�_6����ÊË�ÌÈN、�½´;«¬_¾j%N¹��4Í7�_Î8ÆÇ,Ï%½´ÆÇÐÑ[\]^ �7ÒÓ��©ª_9Ô�Õ7�Ö。[\]^ ��×:Í;G<�“ØÙk�/Øj4=ª>”。r�sÚ.=yNij�ÛÜ,�Ý�Þ�¦ß。
PUBLICATION ORDERING INFORMATIONN. American Technical Support: 800−282−9855 Toll FreeUSA/Canada
Europe, Middle East and Africa Technical Support:Phone: 421 33 790 2910
Japan Customer Focus CenterPhone: 81−3−5817−1050
RSL10CN/D
ON Semiconductor is licensed by the Philips Corporation to carry the I2C bus protocol.AirFuel is a trademark of Air Routing International Corporation.Bluetooth is a registered trademark of Bluetooth SIG.ARM and Cortex are registered trademarks of ARM Limited (or its subsidiaries).
LITERATURE FULFILLMENT:Literature Distribution Center for ON Semiconductor19521 E. 32nd Pkwy, Aurora, Colorado 80011 USAPhone: 303−675−2175 or 800−344−3860 Toll Free USA/CanadaFax: 303−675−2176 or 800−344−3867 Toll Free USA/CanadaEmail: [email protected]
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your localSales Representative
◊