F14024

Examensarbete 30 hpJuni 2014

RF High Power Amplifiers for FREIA – ESS: design, fabrication and measurements

Linus HaapalaAleksander Eriksson

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Teknisk- naturvetenskaplig fakultet UTH-enheten Besöksadress: Ångströmlaboratoriet Lägerhyddsvägen 1 Hus 4, Plan 0 Postadress: Box 536 751 21 Uppsala Telefon: 018 – 471 30 03 Telefax: 018 – 471 30 00 Hemsida: http://www.teknat.uu.se/student

Abstract

RF High Power Amplifiers for FREIA – ESS: design,fabrication and measurements

Linus Haapala, Aleksander Eriksson

The FREIA laboratory is a Facility for REsearch Instrumentation and Acceleratior development at Uppsala University, Sweden, constructed recently to test and develop superconducting accelerating cavities and their high power RF sources. FREIA's activity target initially the European Spallation Source (ESS) requirements for testing spoke cavities and RF power stations, typically 400 kW per cavity. Different power stations will be installed at the FREIA laboratory. The first one is based on vacuum tubes and the second on a combination of solid state modules. In this context, we investigate different related aspects, such as power generation and power combination. For the characterization of solid state amplifier modules in pulsed mode, at ESS specifications, we implement a Hot Sparameter measurement set-up, allowing in addition the measurement of different parameters such as gain and efficiency. Two new solid state amplifier modules are designed, constructed and measured at 352 MHz, using commercially available LDMOS transistors. Preliminary results show a drain efficiency of 71 % at 1300 W pulsed output power. The effects of changing quiescent current (IDq) and drain voltage are investigated, aswell as the possibilities to combine several modules together.

ISSN: 1401-5757, UPTEC F14 024Examinator: Tomas NybergÄmnesgranskare: Anders RydbergHandledare: Dragos Dancila

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Sammanfattning

Ett av syftena med FREIA-laboratoriet ar att utveckla teknik for partikelacceleratorer. I Lundbyggs for tillfallet varldens ljusaste neutronkalla, den kommer att anvandas for forskning inombl.a. partikelfysik och biologi vilket kan leda till forbattringar inom stralbehandling mot sjukdo-mar som cancer osv.

Traditionellt sa har acceleratorer forsetts med effekt fran klystronforstarkare, men med storaframsteg inom hogfrekvent LDMOS-teknologi har det de senaste aren blivit mojligt att anvandaSSA-forstarkare for att forse acceleratorerna med effekt. En av fordelarna med denna typ avforstarkare ar en minskad risk for att behova stanga av systemet da reperationer kan goras sam-tidigt som systemet ar operationellt, vilket inte ar mojligt med klystroner.

For att maximera effektivitet och minska elkostnader maste LDMOS transistorerna vara matchademed acceleratorns last. Detta gors med natverk som kopplas in fore och efter LDMOS-transistorerna.

I FREIA-laboratoriet finns en natverksanalysator som tillater forstarkarparametrar sa som utef-fekt, effektivitet, linjaritet och forstarkningsfaktor. For att komma upp i samma nivaer pa uteffektsom klystronerna ligger pa sa kommer flera SSA-forstarkare att behova kombineras.

Den har rapporten utreder tillvagagangssatt for att designa, tillverka, mata och kombinera SSA-forstarkare.

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Work load

During this thesis work Aleksander Eriksson have worked on design, simulation, construction andmeasurement of the R03010 amplifier design, Aleksander have also been in charge of designingand ordering the heat sinks for all the modules.

Linus Haapala have worked on design, simulation, construction and measurement of the TMM3amplifier design, Linus have also been in charge of designing and ordering the PCB’s for the com-bination measurement and the measurement setup.

The 10 kW combined module and perfecting the theory chapter in this report have been a combinedeffort from both Aleksander and Linus.

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Contents

1 Introduction 71.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71.2 Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71.3 Goal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2 Theory 82.1 Microwave Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.1.1 Impedance Matching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82.1.2 The Smith-Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.1.3 Scattering Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.2 Power Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142.2.1 Classes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142.2.2 Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152.2.3 Load/Source-Pull Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3 Simulation and Design 173.1 Transistor Level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.1.1 Max Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173.1.2 Biasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173.1.3 Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183.1.4 Load-Pull Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193.1.5 Transistor Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.2 Designing the TMM3 Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233.2.1 Smith-Chart Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233.2.2 Momentum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 253.2.3 Harmonic Balance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.3 Designing the TMM10i Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283.3.1 RO3010 - Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283.3.2 Momentum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283.3.3 Harmonic Balance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

4 Construction and Setup 304.1 Construction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

4.1.1 PCB Manufacturing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 304.1.2 Heat Sinks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 304.1.3 Amplifier Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

4.2 Hot S-parameter Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . 324.2.1 External Ports Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 324.2.2 DC Current Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

4.3 Combination Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

5 Measurements 365.1 The TMM3 Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

5.1.1 Hot S22-Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 375.1.2 Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 385.1.3 Harmonic Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 395.1.4 Different VD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

5.2 The TMM10i Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 415.2.1 Hot S22-Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 415.2.2 Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

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5.2.3 Temperatures and Harmonics . . . . . . . . . . . . . . . . . . . . . . . . . 435.3 Combination Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

5.3.1 The 1.25 kW Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 445.3.2 The 10 kW Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

6 Conclusions and Discussion 486.1 Comparing Simulations and Measurements . . . . . . . . . . . . . . . . . . . . . . 486.2 Comparing The TMM3, TMM10i and The Modified ESRF Modules . . . . . . . . 496.3 The 10 kW Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

7 Acknowledgements 50

Acronyms

ADS Advanced Design System

BALUN BALanced to UNbalanced

CST Computer Simulation Technology

CW Continuous Wave

DC Direct Current

DUT Device Under Test

ESRF European Synchrotron Radiation Facility

ESS European Spallation Source

IR Infrared

LDMOS Laterally Diffused Metal Oxide Semiconductor

MTTF Mean Time To Failure

PAE Power Added Efficiency

PCB Printed Circuit Board

PNA Power Network Analyzer

RF Radio Frequency

SSA Solid State Amplifier

UHF Ultra High Frequency

VHF Very High Frequency

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1 Introduction

1.1 Background

The FREIA laboratory serves as a preliminary evaluation facility for a RF-power system prototypefor the European Spallation Source (ESS). ESS is currently under development in Lund, Sweden.Once completed, the ESS linear accelerator will generate an average beam power of 5 MW foracceleration of protons. This proton beam will be used to create the brightest neutron sourceever built, and will provide a research aid in areas such as material science, biology and particlephysics[1]. ESS will use several stages to accelerate the beam, one being a spokes resonator cavitystage which will be tested at FREIA. The decision of how to power the spokes resonator cavitiesis still in process. The choice is between using klystron tubes or Solid State Amplifiers (SSA). TheSSA alternative consists of using many RF-modules in parallel, each delivering roughly 1 kW ata frequency of 352.2 MHz. To lower the operating costs the RF-modules will need to be reliableand operate with high efficiency.

FREIA is working in collaboration together with the European Synchrotron Radiation Facility(ESRF) which is another joint research facility. ESRF is located in France and operates a syn-chrotron using a very similar SSA system to that which FREIA is designing and testing. Thedifference with ESRF’s SSA system is that it runs in Continuous Wave (CW) and each moduledelivers 700 W output power instead of ESS’s 1.25 kW. Uppsala University has received one ofESRFs amplifier PCBs in order to use in the process of learning. The knowledge gained from thisstudy are used when designing the two in house modules.

1.2 Method

ESRF’s SSA modules operates in a load-pull configuration using NXP’s BLF578 LDMOS transis-tor, delivering 700 W per module with an efficiency slightly under 70%. ESRF have provided thePCB’s for one of their SSA modules, these PCB’s are used to reconstruct the ESRF module atFREIA. The ESRF module is modified to deliver 1.25 kW using NXP’s newer and extra ruggedLDMOS transistor, the BLF188XR.

Two new modules, that unlike the ESRF module operates in common mode are designed in house.Working in common mode makes the use of BALanaced to UNbalanced converters (BALUNs) un-necessary, which is good since BALUNs are costly to manufacture and often experience heatingproblems. These modules will be designed on Rogers TMM3 and RO3010 substrates. The maindifference between these substrates are the dielectric constant εr, which is εr = 3.27 for the TMM3substrate and εr = 11.2 for the RO3010 substrate. A higher εr value allows the design to be morecompact. These designs, will be referred to as the TMM3-design and the RO3010-design and arecompared to the modified ESRF-module.

During the process of designing a new amplifier, it is important to know the input and outputimpedances that the transistor requires for optimal performance. In order to get the transistor tothese impedances, matching networks will be designed and simulated in softwares such as Agilent’sAdvanced Design System (ADS) and Computer Simulation Technology’s (CST’s) Microwave stu-dio. In FREIA, a Power Network Analyzer (PNA) are available for hot S-parameter measurementson the modules with capabilities up to 1.5 kW.

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1.3 Goal

The scope of this thesis is to design, construct and measure the TMM3 and RO3010 designs andthen to compare them against each other as well as the modified ESRF module. To show thatcombination is possible, 4 modules using the TMM3 design are constructed and two of them arecombined and measured.

2 Theory

2.1 Microwave Theory

2.1.1 Impedance Matching

When working with high frequencies such as in the Very High Frequency (VHF) and the UltraHigh Frequency (UHF) bands (30 MHz to 3 GHz) the signal wavelength λ is about 0.1 m-10 m.This means that λ is likely to be as long or even shorter than the system itself. When working withlow frequency voltages, the assumption that the voltage is constant throughout a transmission lineis usually made. But for high frequencies this assumption is no longer valid, as the voltage signalacts as a wave as it traverses the transmission lines, see figure 1.

Figure 1: When the frequency is high enough and λ ∼ l, the voltage will not be constant throughouta transmission line. Instead the voltage signal will traverse the transmission line as a wave.

This can cause a variety of phenomenas, depending on the system. For instance, standing wavescan occur throughout the transmission lines. This is a result of the voltage signal being reflectedback from the load. This might cause trouble for any components that aren’t designed to workwith voltages flowing in the reverse direction. Having a part of the voltage reflecting back alsomeans that this part doesn’t get successfully delivered to the load, which means an overall loweringof the performance.

The amount of voltage that gets reflected is dependent on the impedance match between the loadand the source. The reflection coefficient is commonly denoted as Γ, and is defined as:

Γ =VReflectedVIncident

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It can be shown that if the load (ZL) and source (ZS) impedances are known, Γ can be calculatedby:

Γ =ZL − ZSZL + ZS

To increase efficiency it is important to make sure that as much as possible of the delivered poweris active. It can be shown that, for optimal power transfer to the load, the load impedance shouldbe ZL = Z∗

S.

It is not always possible to choose the impedance of the load. It is possible to convert the loadimpedance using a matching network, which got its name from the fact that its purpose is to matchthe load to the source. A matching network consists of components like transmission lines, stubsand lumped elements. The design process is something that has to be individually performed foreach matching network and the design process is not intuitive.

Designing a matching network with transmission lines, stubs and lumped elements requires un-derstanding of how they each individually affect the impedance. Using lumped elements is themost intuitive one, since standard electronic rules apply. Stubs are just a nickname of a shuntedtransmission line that branches off from the main transmission line.

Transmission lines however change the impedance of the load just by being there, meaning thatif one would to measure the impedance at the load without. Then measured it again on the sameload with a transmission line in between, the results may differ depending on the dimension andcharacteristics of the transmission line, see figure 2.

Figure 2: The impedance, Zin, measured at a load through a transmission line may not be thesame as the impedance measured directly at the load.

If ZL is the impedance of the load connected to one side of the transmission line, and Z0 is the trans-mission lines characteristic impedance, which can be found in the transmission line’s datasheet,or calculated using complex formulas. With the wave number β = 2π

λand the transimission line

length l the resulting Zin can be exactly calculated as:

Zin = Z0ZL + jZ0tan(βl)

Z0 + jZLtan(βl)

Knowing this, a skilled engineer can design a matching network that matches the load to anydesired source. But doing it using these formulas would prove to be tedious and time consumingtask. A better alternative when designing a matching network would be to use the Smith-chart,which gives a graphical interpretation how an impedance changes throughout a matching network.

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2.1.2 The Smith-Chart

The Smith-chart is a very useful tool when working as a microwave/RF engineer. It allows complexmatching quickly, without requiring any of the complex calculations that otherwise would benecessary. The Smith-chart might look incomprehensible at first, but it’s all about knowing whatto focus on, and what can be ignored for the moment. The Smith-chart can be seen in figure 3.

Figure 3: The Smith-chart in its full glory.

The Smith-chart can be used to calculate many different things, but for this application it issufficient to look at the reflection coefficient Γ and the normalized impedance Z. The reflectioncoefficient Γ can be plotted in a complex plane, with the Smith-chart being placed inside the unitcircle |Γ| = 1.

The impedance Z can be read using the lines inside the Smith-chart, with the real part of thenormalized impedance (Re(Z)) being represented by the circles centered on the Im(Z) = 0 axis.Starting from Re(Z) = 0 for the left part of the Smith-chart and ending with Re(Z) =∞ at theright part. The imaginary part (Im(Z)) can be found on the perpendicular semicircles, with theimaginary part being inductive (Im(Z) > 0) in the top half of the Smith-chart, and capacitive(Im(Z) < 0) for the lower half. All of this is shown more clearly in figure 4.

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Figure 4: The Smith-chart and how it can be used to interpret what reflection coefficient Γ andnormalized impedance Z that represent each other.

The Smith-chart is extremely useful for designing a matching network since the impedance seenwhen looking into a transmission line moves in a circle in the Smith-chart, centered around thetransmission line’s characteristic impedance. A half signal wavelength (λ

2) represent a complete

loop, this is shown in figure 5.

Figure 5: The Smith-chart is very handy if one wish to calculate the impedance at the end of atransmission line.

In similar fashion, the Smith-chart can be used to see how the line-width, stubs and componentschanges the impedance as the voltage is moving throughout the matching network. Once this isunderstood, it is possible to plot for example the load impedance ZL of a system and then changeit to whatever impedance that is wanted.

Lets try an example of this, say that we are faced with a load ZL = 50 − j100 Ω that we wishto match to a source that’s designed to operate optimally when the load is Z∗

s = 12.5 + j5 Ω.This means that we will need to design a matching circuit that will make ZL look like Z∗

s whenlooking from the source. First, lets find both ZL and Z∗

S in the Smith-chart. By normalizingthe Smith-chart around 50 Ω we get a normalized ZL,normalized = 1 − j2 Ω. We then locate theRe(Z) = 1 circle and the Im(Z) = 2 semicircle in the Smith-chart, ZL will then be found in thepoint where these circles intersect, see figure 6.

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Figure 6: Faced with the task to match ZL to Z∗S in the Smith-chart, the first thing to do is to

locate these two points in the Smith-chart.

As seen in figure 6, the impedance ZL is located far from the optimal point Z∗S which the source

requires to operate efficiently. First off, to get to the left side of the Smith-chart a transmissionline can be used. In this case, since we are normalized around 50 Ω and the points are at oppositesides of the Smith-chart, let’s use a transmission line with an impedance of 50 Ω.

Starting from the ZL point draw a semi circle centered around the 50 Ω point, this will let let usknow how the impedance changes depending on which length of the transmission line we choose.Lets choose a point Z close to Z∗

s . This will represent the impedance seen at the other side of thetransmission line when looking at the load. Using the Smith-chart in figure 7, we can determinethe length to be l = 0.24λ. This is done by measuring the angle we have moved on the arc andremembering that one full circle is equal to l = 0.5λ

Figure 7: Using the Smith-chart, a graphical representation of how the impedance changes whenadding a transmission line is presented. The impedance of the line determines the center of thecircle arc and the length determines how far on the arc we travel.

The impedance, Z, is much closer to the optimal impedance Z∗S than our original load impedance

ZL but it is not quite there yet. There is a couple of different ways to move radially in the Smith-chart, one of these ways is to use an inductor. This report does not explain how the inductormoves the impedance point in the Smith-chart. However, the interested reader is recommendedto do some research on the admittance circles of the Smith-chart.

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Figure 8: Using an inductor we can travel the final distance from Z to Z∗s .

In figure 8 the inductor has been added. The changes in the impedance depends on the value ofthe inductor and also how it’s connected. So, by these two steps we have designed a matchingnetwork that makes the load impedance ZL appear as Z∗

s to the source.

2.1.3 Scattering Parameters

Scattering parameters, or [S]−parameters, is a popular way of representing the characteristics of asystem. The [S]−parameters are usually represented as an [m,n]−matrix, with n = m = numberof ports to the system. The [S]−parameters is defined as the relationship between outgoing (V −

m )and incoming voltage signals (V +

n ) from the system:V −1

V −2...V −m

=

S11 S12 · · · S1n

S21 S22 · · · S2n...

.... . .

...Sm1 Sm2 · · · Smn

V +1

V +2...V +n

Each element of the [S]−parameters is separately calculated as:

Sm,n =V −m

V +n

=V oltage going out fromportm

V oltage going into port n

With V +n being the only port with an input signal, and all other ports connected to a matched

load. This is to remove any interference from other ports.

Every system can be described using [S]−parameters and they are also strongly tied to impedancesand reflection coefficients. The Snn−parameter for instance can be related to the reflection coeffi-cient at port n. In the case of a power transistor, we have a signal entering through port 1, leavingthrough port 2. This transition corresponds to S21 which can also be interpreted as the gain ofthe system. We also want to avoid any power being reflected at any point, which gives preferablyS11 = 0 and S22 = 0. Since a transistor is an unilateral device (works only in one direction),there should be no signal going through the transistor in the reverse direction (S12 = 0). So[S]−parameters for an ideal transistor is:

[S] =

[0 0S21 0

].

Balanced [S]−parameters can be introduced to differential systems by defining a differential modeand a common mode from two unbalanced ports. The differential port is defined as the difference

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between the two unbalanced ports and the common mode port is defined as the common mode ofthe two unbalanced ports, see figure 9.

Figure 9: When working with differential systems, defining balanced ports might be beneficial.

2.2 Power Amplifiers

2.2.1 Classes of Operation

Amplifiers are often divided into different classes of operation with A, AB, B, C being some ofthe more common ones. The class of an amplifier is determined from the angle of conduction Θwhich is determined by the transistors bias point, Θ is the time measured in radians for which thetransistor is turned on, see figure 10.

Figure 10: The conduction angle Θ is defined as the part of the voltage signal for which thetransistor is conducting.

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By lowering the gate bias point VG the conduction angle Θ is decreased. Smaller Θ’s results ina higher theoretical efficiency for the amplifier, but also less gain. This is because with higher Θthe longer the transistor’s channel will stay open, leading to higher gain. The losses are increasedbecause when the channel is open, a DC current related to the bias will flow through, contributingto the losses but not to the output signal. If the transistor is biased so that the gate voltagenever falls under the threshold voltage (Vth) an conduction angle Θ = 360 is achieved and thetransistor is said to operate in class A. If the gate bias VG is set to be exactly Vth the transistoronly conducts during the positive half of the gate voltage signal, in this case Θ = 180 and weoperate in class B. An in between of these two is 180 < Θ < 360 which is called class AB, thisis what we see in figure 10. If VG < Vth we have Θ < 180 and this is class C.

Class B amplifiers have an interesting dynamic where two transistors with reverse polarity canbe used in parallel to complement each other. So each of the two transistors is conducting onehalf of the full period each, this is called a push-pull configuration, see figure 11. This is howmany SSA modules operate today , including the ESRF and NXP’s demoboard. This is widelyused because a push-pull configuration obtain the full original wave signal back at the output,yielding a lower harmonic distortion than a normal class B amplifier. The TMM3 and RO3010designs that are designed in house doesn’t operate in push-pull, they instead have both transistorsconducting during the same half period. In these designs, harmonic distortion can be a problem,but if designed correctly, the harmonics can be suppressed in the amplifier’s output network.

Figure 11: Two transistors each operating with close to Θ = 180 can complement each very well,this is known as push-pull configuration.

2.2.2 Stability

A transistor is an active device, which means that it can add power to a signal. Ideally thereshouldn’t be any feedback in a LDMOS transistor, but this isn’t always the truth. Since a tran-sistor have a high forward gain, having just a small feedback can cause harmful oscillations. Thiscan potentially damage the transistor or any equipment around it. It is therefore very importantto check for stability when working with any active device.

There are two types of stable devices, conditionally stable and unconditionally stable. A transistoris said to be unconditionally stable if it’s stable for all load/source impedances where the real partis positive[3]. When the transistor’s stability depends on the load/source impedances it is said tobe conditionally stable. The transistor is unconditionally stable if K > 1 and |∆| < 1, where Kand |∆| are defined by the transistors S-parameters:

K =1− |S11|2 − |S22|2 + |∆|2

2|S21S12|

∆ = S11S22 − S21S12

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Note that K and |∆| needs to be calculated for all frequencies where an oscillation could occur. Ifthese criteria aren’t meet for a frequency, the device is conditionally stable for that frequency andfurther investigation need to be done to determine which load or source impedances an oscillationmay happen. For a load and source with reflection coefficients ΓS and ΓL the stable area for aconditionally stable device can be calculated as the load/source impedances for which |Γin| < 1and |Γout| < 1, where Γin and Γout is defined by:

Γin = S11 +S12S21ρL1− S22ΓL

Γout = S22 +S12S21ρs1− S11Γs

This is usually done by calculating the boarder between the stable and unstable regions, |Γin| = 1and |Γout| = 1 and determining which region is which by calculation the stability for one impedancein one or the other. The impedance points that give |Γin| = 1 and |Γout| = 1 will always form acircle in the Smith-chart, with radius rL for |Γin| = 1 and rs for |Γout| = 1 centered around cL andcs:

rL =∣∣∣ S12S21

|S22|2 − |∆|2∣∣∣

cL =(S22 −∆S∗

11)∗

|S22|2 − |∆|2

and:

rs =∣∣∣ S12S21

|S11|2 − |∆|2∣∣∣

cs =(S11 −∆S∗

22)∗

|S11|2 − |∆|2

2.2.3 Load/Source-Pull Analysis

A LDMOS transistor’s characteristics such as gain, efficiency and linearity is highly dependent onwhich load (ZL) and source (Zs) impedances it is connected to, see figure 12.

Figure 12: A transistors performance will depend on what load and source impedances of the loadand source networks it is connected to.

The load impedance that corresponds to the most beneficial operation conditions (regarding gain orefficiency e.g.), can be found by sweeping a complex load impedance and then for each impedance,record the gain, efficiency and other parameters. This process is called a load-pull, the same canbe done by sweeping a complex source impedance, it is then called a source-pull. In power am-plifiers the load impedance (ZL) is often the biggest factor to the amplifiers performance, hencemore effort should be given towards the load-pull analysis.

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Often the load-pull will show that the transistor e.g. will operate with optimal gain for one loadimpedance, and optimal efficiency at another load impedance. In this case the engineer shouldconsider what weight the two performance parameters require for his or hers specific design goal,then pick a impedance that is suitable for the application.

3 Simulation and Design

Agilent’s Advanced Design System (ADS) is capable of simulating microwave structures. By usingthe encrypted BLF188XR transistor model provided by NXP, simulations on the transistor’s be-havior is possible[5]. Computer Simulation Technology (CST) are used to simulate more complexstructures such as the BALUNs on the ESRF module. One advantage of using CST is that theS-parameters that you get from CST can be exported to ADS, and then perform simulations onamplifier level.

3.1 Transistor Level

3.1.1 Max Gain

For S-parameter simulations, ADS comes with a predefined MaxGain tool, which calculates themaximum gain that can be achieved from the transistors S-parameters. The max gain at 352MHz are simulated as the total quiescent drain current is swept, see figure 13. As expected thetransistor can operate with a higher gain when the quiescent drain current is increased, explainedin section 2.2.1.

Figure 13: The maximum gain of the transistor is dependent of the quiescent drain current. TheBLF188XR contains two transistors, the IV-characteristics for one of them are plotted above.

3.1.2 Biasing

In order to find good working conditions for the BLF188XR, a study of the biasing is needed.According to the data sheet, a drain current of 40 mA per drain is recommended, which add up to80 mA for the whole BLF188XR. In the IV-characteristic of the transistor this current is achieved

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very close to the threshold voltage, which means the BLF188XR will operate in class B. In figure13, the maximum gain for this quiescent drain current is found to be roughly 22 dB. In order tofind the gate voltage needed to achieve this, the model of the transistor was studied in ADS. Infigure 14, the drain current IDS is plotted against the gate voltage VGS.

Figure 14: The drain current plotted against the gate voltage with using drain voltage VDS = 50V .Here the quiescent drain current is probed for the whole module, with half of that for each drain.

As seen in the figure 14 a gate voltage of 1.508 V is needed to get 40 mA drain current forthe simulations. However when it comes to the physical transistor, this voltage will probably bedifferent due to the fact that these transistor models often does not include thermal effects. Andof course, there are always deviations in each component.

3.1.3 Stability

The K and |∆| stability factors are simulated in ADS and presented in figure 15. We see thatK > 1 and |∆| < 1 for high frequencies. Lower frequencies below 15 MHz, does not satisfy thesecriterias, making the transistor conditionally stable for these frequencies.

Figure 15: The BLF188XR is unconditionally stable for all frequencies higher than 15 MHz.

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The input and output stability circles are simulated for the conditionally stable region 0-15 MHzto determine what load and source impedances might cause oscillations, see figure 16.

Figure 16: The stability circles are plotted in a Smith-chart normalized to 50 Ohm for the fre-quencies for which the transistor is conditionally stable. The largest circles are 1 MHz and thesmallest ones are 16 MHz, the stable region are the one outside the circles. The two curves in thelower part of the Smith-chart are the simulated impedances of the TMM3 design, located far intothe stable region. The RO3010 have similar impedance values.

Because the change in impedance for a transmission line and capacitor is proportional to 1λ

thematching networks of the TMM3 and RO3010 designs will not transform these low frequenciesfar from the outer 50 Ω impedance. Since the characteristic impedance of the transmission linesis less than 50 Ω the impedance will travel downwards in the Smith-chart, the same goes for thecapacitors. This brings the transistor far into its stable region. The load and source impedancespresented to the transistor are simulated using the TMM3 design, which is plotted as the two curvesin the lower half of the Smith-chart in figure 16, the RO3010 design have similar impedance values.

3.1.4 Load-Pull Analysis

In order to find the source and load impedances that needs to be presented to the transistor foroptimal working conditions load-pull and source-pull simulations are performed. In later versionsof ADS (v2011 or higher) pre made setups are available for these simulations, documentations onhow to use these setups can be found at Agilent’s support center[6].

In LoadPull ConstPdel the delivered power is kept constant, this is done by finding the inputpower required for each separate load impedance. This proves to be very useful in our case, sincewe aren’t limited to a specific input power and may fine tune it using the pre-amplifier. For aschematic view of the constant output power load-pull setup, see figure 17.

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Figure 17: The constant output power load-pull setup determines the optimal load impedance withthe transistor operating in unbalanced mode.

Since the RF-power of the amplifier is higher after the transistor, a well matched output is moreimportant than a well matched input. Less time will therefor be spent on finding the optimalmatch for the input, instead the focus from now on will be on the load side. A rough source-pullsimulation showed that the input impedance of the transistor is roughly ZIN = 0.36 − j0.72 Ω,this value was later used in the load-pull simulations, the result can be seen in figure 18.

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Figure 18: The simulation shows the constant Power Added Efficiency (PAE) and constant gaincircles in the Smith-chart for 61 dBm delivered power. From this it is seen that the load impedancefor optimal efficiency at 61 dBm (1.3 kW) delivered power is 0.389+j0.411 Ω, which yields slightlyabove 78 % PAE.

In this application, efficiency is valued higher than gain, so the optimal PAE impedance is selectedas our design impedance. When the amplifiers are being constructed and matched, small changescan be made to find a preferable impedance with both high gain and efficiency. The optimalsource and load impedances for the BLF188XR for maximum PAE, as well as the PAE at theseloads for a range of output powers according to the simulations can be found in table 1.

PDelivered [W] Optimal ZSource [Ω] Optimal ZLoad [Ω] Maximum PAE [%]600 0.376 + j0.709 0.271 + j0.599 74.43700 0.361 + j0.709 0.250 + j0.534 75.78800 0.329 + j0.712 0.329 + j0.554 76.78900 0.365 + j0.714 0.338 + j0.509 77.701000 0.363 + j0.716 0.341 + j0.464 78.351100 0.361 + j0.718 0.338 + j0.419 78.801200 0.360 + j0.719 0.336 + j0.397 78.901350 0.362 + j0.720 0.353 + j0.368 79.201500 0.363 + j0.721 0.457 + j0.338 79.40

Table 1: The optimal load and source impedances for maximum PAE using the BLF188XR inADS at different output powers.

The entire process are remade using differential mode operation for the transistor, see table 2. Indifferential mode the signal is divided into two transmission lines and the signals are phase shifted

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by 180 degrees. In this way the two transistors that are in the BLF188XR work one half periodeach. One advantage of the differential mode is that the harmonic distortion is lowered by thefact that even harmonics are canceled which is not the case in a common mode setup. If harmonicdistortions are too high, a harmonic filter could be applied.

Pdelivered [W] Optimal ZSource [Ω] Optimal ZLoad [Ω] Maximum PAE [%]600 0.729 + j1.413 0.976 + j2.340 74.73700 0.735 + j1.418 1.150 + j2.296 76.34800 0.729 + j1.422 1.168 + j2.134 77.42900 0.726 + j1.425 1.150 + j1.972 78.231000 0.731 + j1.430 1.335 + j1.939 78.811100 0.728 + j1.434 1.261 + j1.761 79.391200 0.724 + j1.436 1.284 + j1.640 79.571350 0.723 + j1.439 1.397 + j1.455 79.931500 0.727 + j1.440 1.592 + j1.309 79.95

Table 2: The optimal load and source impedances for maximum PAE using a differential setupsimulated using the BLF188XR in ADS at different output powers.

Note that the differential output impedances are roughly four times as large as the one for thecommon mode case. This is an expected relationship between differential/common mode that canbe derived using Ohm’s laws.

Most of the times it’s easier to match two impedances if they are close to each other in magnitudeand phase. This could lead one to think that differential mode is better since the load is usually50 Ω. However, since common mode is so much simpler because a BALUN isn’t needed, it iscommonly preferred. Another advantage is that the use of only one transmission line allows thematching network to fit on a smaller Printed Circuit Board (PCB) area.

3.1.5 Transistor Waveforms

A harmonic balance simulation was performed on an amplifiers operation at high power. This isused to simulate the transistor’s voltage and current waveforms when operating at 1 kW outputpower directly after the transistor’s drains, in figure 19 simulation results are presented.

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Figure 19: The voltage and current waveforms simulated at the transistor’s drains.

Since the transistor is operating in class B, the voltage waveform is expected to take the shape ofthe upper half of the sinusoidal input signal. However, since transistors are very non linear devicessomething else is observed. The voltage signal in figure 19 have a big third harmonic componentwhich distorts the expected upper half sinusoidal waveform. The current is a clean sinusoidal. Theinstantaneous current can reach negative values because of stored charges in parasitic inductancesand capacitances, which make the current flow in opposite direction when they are discharging.

3.2 Designing the TMM3 Module

The TMM3 module are designed on Roger corp’s TMM3 substrate which has a dielectric processconstant of 3.27, dielectric design constant of 3.45, substrate thickness 0.76 mm and copper thick-ness 70 µm[7]. The design operate in common mode and the biasing are applied via an inductorwhich are handmade from copper wire.

3.2.1 Smith-Chart Design

From the impedances that are found in the load-pull analysis, matching networks can be designedin several ways. As mentioned earlier, the Smith-chart and especially the Smith-chart tool inADS is an excellent help when performing this. The impedances that have to be matched arenormalized and plotted in the Smith-chart, and with various components like stubs, inductors andcapacitors, the impedances are matched. In figure 20, the Smith-chart tool in ADS is shown withan rough version of the output matching network for the TMM3.

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Figure 20: The Smith-chart in ADS is great when a rough network design is wanted.

However this isn’t very exact and further tuning to the dimensions will be done in later simulations.The Smith-chart tool should only serve to check what overall structure and dimensions. Once thisis done the networks are rebuilt in an ADS schematic where the dimensions are optimized. Thisoptimization process can be very time consuming, as it requires many iterations. Luckily, in newerversions of ADS, there is a optimization tool that addresses this issue. With the optimization tool,ADS iteratively finds a solution for you, given user specified constraints and goals. In figure 21 aoptimizations setup is shown.

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Figure 21: Once a rough network design is found by using the Smith-chart tool, the dimensionsare optimized iteratively in a ADS schematic using the optimize tool.

In figure 21, the optimization tool (Optim) is setup to adjust the dimensions of the matching net-works to achieve the best match (low reflection coefficient S11) at a narrow band around the centerfrequency (OptimGoal4). A constraint (OptimGoal3) was made for the total length (L1+L2+L4)to stay under 100 mm. Once the dimensions have been optimized it is recommended to also trythe performance in a harmonic balance simulation, before going any further.

3.2.2 Momentum

In order to validate the networks and its dimensions given by the optimizations, it is realized andsimulated in ADS’s Momentum. Here the micro strips are drawn piece by piece, substrate layersare defined, and ports are placed. This gives a more realistic simulation of the network thanif transmission line components such as ”MLIN” in figure 21 are used. When the simulation isdone, the network can be exported as a component back to an ADS schematic in order to performharmonic balance again, which can be seen in figure 22.

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Figure 22: After the design has been implemented and simulated in ADS’s momentum, it can beexported back to an ADS schematic as a component for final harmonic balance simulation. Thefigure shows the layout of the new design using the TMM3 substrate.

3.2.3 Harmonic Balance

In the momentum simulations, the feeding networks and DC-blocking capacitors are taken intoaccount. If they affect the matching network notably, minor adjustments to the dimensions canbe made in a iterative fashion. In figure 23 the harmonic balance simulation results are shown forthe design in figure 22. Simulations show that a PAE = 75.7% is achieved for 1250 W deliveredpower.

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Figure 23: The final designs were simulated in the harmonic balance setup, the new amplifierdesigns all simulated more 75 % PAE at 1250 W.

A disadvantage of using lower dielectric constant is that the effective wavelength in the microstrip becomes large and thus the PCB’s will be larger then with a substrate of higher dielectricconstant. Another way to achieve smaller area is to use lumped components in the matching net-work. Components however are always in the risk of failure due to heating, which can cause verycostly downtime. The Mean Time To Failure (MTTF) is proportional to the temperature, and arule of thumb is that a decrease in the temperature by 10C doubles the MTTF. It is preferredthat the components in the module operate at a temperature of at most 100C.

With a harmonic balance simulation, the voltage and current waveforms at different points in thedesign can be plotted. Examples of this behaviour is presented in figure 24.

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Figure 24: The voltage and current waveforms at the load are in phase with each other when thedesign are simulated at 1250 W output power. As the matching network transforms the impedance,the voltages and currents are also transformed, much like a transformer. This explains why wesee higher voltages than are supplied.

3.3 Designing the TMM10i Module

The RO30130 laminate was used since it has εr = 11.2 which is really high. This gives theopportunity to make really small matching networks which is useful if space is a constraint. Thesubstrate is provided by Roger Corporation. However, the RO3010 substrate is very soft and sincethe PCBs are made by hand, it is hard to construct it without bending it somehow. So after a fewfailed attempts of creating an amplifier from the RO3010 substrate, the substrate was changed toa more stiff substrate. The TMM10i is another Rogers Corporation substrate, it has εr = 9.9 andis very rigid.

3.3.1 RO3010 - Design

The idea behind the design is to have a single transmission line that transforms the impedancewithout the use of lumped components. The dimension of the transmission line was found throughusing the tuning and optimization tools in ADS. When the optimal dimension where found, thelength and width of the transmission line was rounded to millimeter precision. It was also necessaryto include a DC-block, the transmission line was cut and three DC-block capacitors was put thereso that RF could pass while DC was blocked.

3.3.2 Momentum

The matching network was implemented in Momentum to get more realistic results. The trans-mission line was widened on one the side closest to the transistor so that the transistor could besoldered, see figure 25.

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Figure 25: The RO3010 design of the input and output matching network. The output network isslightly wider and the input network is longer.

3.3.3 Harmonic Balance

The simulated network from momentum is exported back to ADS and the harmonic balancesimulation gives the following results, see figure 26. The efficiency is 73 % at 1250 W.

Figure 26: A harmonic balance simulation using the RO3010 substrate. The matching networksare taken from the momentum simulations.

However, since the accordance of simulation and reality isn’t very good, the design was in realitymatching the transistor for too low frequencies and the whole design had to be shortened. Themain fault is probably from the encrypted model of the transistor. And because of the problems ofconstructing the matching networks with the RO3010 substrate the TMM10i substrate was used

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instead.

Because of time constraints, only the output matching network was made with the TMM10isubstrate. For input matching the input network from the TMM3 design is used since this wasknown to work properly.

4 Construction and Setup

4.1 Construction

4.1.1 PCB Manufacturing

The costs of ordering a PCB is rather high and and takes a long time to receive an order, insteada simple technique is used to prototype the designs. First the design is printed on photo paperwhich then is laminated onto the substrate. It is is important to clean the substrate thoroughlyin order to get the ink from the photo paper to stick. When the ink is stuck on the substrate, theremaining photo paper is removed by soaking it in water and soap.

After this is done, the PCB is put into a iron-chloride-liquid which dissolves the copper that isn’tprotected by the ink. When this is done, the ink is removed by using acetone. The remaining partof the PCB construction is then to make via connections to the ground planes and to add holesfor screws that will be used to attatch the PCB to a heat sink.

4.1.2 Heat Sinks

The PCBs that are constructed needs a heat sink in order to test them. The amplifiers are sim-ulated to operate with 70-75 % efficiency at 1250 W. During operation they will work with aduty cycle of 5 %, implying that there is at most 20 W of power dissipated in the amplifier whilerunning. So in order to keep the temperature of the amplifier at a reasonable level the dissipatedpower is cooled off by the water flowing trough the heat sink.

The heat sink also act as a support structure for the PCB so that screws and other components canbe firmly attached where needed. In order to try many different PCB designs without having tomake a new heat sink every time, the heat sink for the TMM3 and R03010 designs is constructedin a way that allows different sizes of PCBs to be attached. In figure 27 the heat sink is displayed.

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Figure 27: The heat sink is designed so that different PCBs can be tested.

For the combination measurements, a special heat sink is ordered so that eight amplifiers can beattached to the same heat sink. The heat sink is constructed so that walls can be added on inthe future to the sides and in between the modules to shield the EM-waves radiating from theamplifiers, see figure 28.

Figure 28: The 10 kW heat sink is designed to hold 4 modules on each side. With the possiblityto add walls between the modules for EM-sheilding.

The heat sinks are constructed by the mechanical workshop at Angstrom and at Dione KullagerAB in Uppsala.

4.1.3 Amplifier Modules

Screws are used to attach the PCBs and transistor to the heat sink. The lumped components onthe amplifier is soldered by hand using regular soldering equipment. Screws are used since it iseasy to remove or change parts of the amplifier which is not the case if the PCBs and transistorsare soldered onto the heat sink.

Once the transistor and PCB have been firmly attached to the heat sink with screws, connectorsfor the input and output, biasing and as well as the water hoses are attached to the module. Thetwo complete amplifier modules can be seen in figure 29 and figure 30.

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Figure 29: The TMM3 module once everything is mounted together.

Figure 30: The TMM10i design. For the input part it’s utilizing a copy of the TMM3’s inputnetwork.

4.2 Hot S-parameter Measurement Setup

4.2.1 External Ports Setup

To measure S-parameters a Power Network Analyzer (PNA) is used, this is a sensitive equipmentwhich would brake from the high power it would receive if its ports would be directly connected tothe amplifier modules. To circumvent this, external ports are used, adding plenty of attenuationto any power signal before it enters the PNA’s ports. The setup used to achieve this is presentedin figure 31.

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Figure 31: A network of passive components forms external ports which are used to measure highpower signals.

The network utilizes three different kinds of passives: the Directional Coupler are used to createexternal ports and allows measurement of the power entering and exiting the amplifier ports,Circulators are used as protection to make sure that reflections do not go back and destroy anysensitive components such as the pre-amplifier. Attenuators are used to lower the power of anyhigh power signal before it enters the PNA’s ports.

In figure 31, S3 supplies through the pre-amplifier the desired input power at the drive frequency352 MHz. S1 and S2 is attached at the amplifier input and output such that the S-parameters S12

and S22 can be measured between 340 and 365 MHz. The network analyzers (R1) measures thepower going into the amplifier, (A) measures the reflection back from the amplifier. (B) measuresthe power out from the amplifier and port 4 (R2) measures the power going into the amplifier(from the alternative source). The four physically measured ports can then be combined to calcu-late the S-parameters of the amplifier, with R1 & A representing port 1, and B & R2 representingport 2.

Before any high power measurements were made all the passive component’s S-parameters weremeasured and imported into ADS. Simulations on the output and input passives networks wereperformed as confirm that no more than <0 dBm enters the network analyzers ports. Figure 32dispalys the input passive network with the applied port definitions.

Figure 32: The port placement that was used during the simulations of the input passives network.

Given the port definitions in figure 32, the simulation results in figure 33 can be interpreted.

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Figure 33: The vital S-parameters of the input passives network.

The S-parameters at 352 MHz in figure 33 show that there is very little losses going through thenetwork (S11 close to 0 dB), which is a good sign. But more interesting is the S31 and S42, whichboth simulate to be -55 dB. Since the total input power used will be roughly 40 dBm, we canconclude that p3 and p4 (which goes to the network analyzers ports 1 & 2) will at most receive-15 dBm. Since S41 and S32 are negligible small (<-80 dB) we know that the directional coupleris doing its intended purpose, and making sure that p3 and p4 only measures the powers in theintended directions.

The same investigation were also made for the output passives circuit, in this case the portdefinitions in figure 34 were used.

Figure 34: The port placement that was used during the simulations of the output passives network.

Simulations were made and the S-parameters are presented in figure 35. The most importantS-parameters are the SX1 ones, this is because there will be a lot of power at the amplifier output(port 1), which could easily cause harm if misdirected. The SX1 parameters are presented in aseparate graph in figure 35.

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Figure 35: The interesting S-parameters of the output passives network is presented. S21 is closeto 0 dB while the SX1 parameters are less than -60 dB.

The S-parameters at 352 MHz in figure 33 shows that most of the power entering at p1 will bedelivered to p2. This is favorable, since we want the power coming from the amplifier to getdelivered to the load, and the reason we have the alternative source attached at p5 is for S22

measurements. There will be roughly 60 dBm at the amplifier output (port 1), and with at least60 dB attenuation to all PNA ports, at most 0 dBm, or 1 mW of power will be entering its ports.Which is low enough for the PNA not to take any damage.

4.2.2 DC Current Measurement

To get an accurate reading of the drain efficiency, an accurate measurement of the DC-currentat the drain(s) are needed. Two 60 A/60 mV current shunts are connected in series on each ofthe drain voltage cables (only one is used for the modules operating in common mode). A pair oftabletop multimeter are used to measure the average voltage drop over the shunts, see figure 36.

Figure 36: A picture of the current shunts on the left and the table top multimeters used to measurethe voltage drop over each of them in the right most picture.

The voltage drop over the shunts are then used to calculate the currents flowing through themusing Ohm’s law.

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The drain efficiency ηD inside the pulse is calculated from the measured DC currents by

ηD =100× PLoad[

IDC−IDq

D+ IDq

]VD

,

where D is the duty cycle, VD the drain voltage, IDq the total quiescent drain current for bothtransistor drains, and PLoad the power delivered to the load. This formula only works whenthe drain currents are equal to each other in magnitude, which they are for the AN10967 mod-ule. If the two drain currents differ more than a couple of percent (5-10 %) from each other theamplifier probably isn’t very well balanced, which will decrease the amplifiers overall performance.

4.3 Combination Measurement Setup

An alternative setup is used for measuring combination of the modules. Instead of using thePNA’s internal source, a signal generator is used. Power meters are connected before and afterthe amplifier to measure input and output power. A big attenuator of 30 dB attenuation isconnected at the output to lower the power level before the output power meter, see figure 37.The input signal is split equally just before the amplifiers and similarly combined just after theamplifiers. The components that splits and combine were bought online since it would have beento time consuming too build our own.

Figure 37: An alternative measurement setup are used for the combined measurements.

It was noted that the power splitters and combiners that are used have a lot of losses, roughly30 % power loss when measuring through it without the amplifier modules. The measurementsdone are only to show that combination of the modules is possible, for any practical applicationan improvement in the splitter and combiner is recommended.

5 Measurements

5.1 The TMM3 Module

The first measurements of the TMM3 module are far from the simulation results. Changes hadto be made on the matching networks, mainly the matching capacitors. The simulations are still

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usable for understanding and to find trends, but any value and position in this simulated networkmay not be an accurate representation of its real life counterpart. The output matching networkfor instance, had 2x20 pF located 48 mm from the transistor during simulations. For real mea-surements however, this had to be changed to a single capacitor of 27 pF roughly 18 mm fromthe transistor, measuring to the center point of the capacitor. The cause of these differences isprobably due to the encrypted BLF188XR transistor model that are used in the simulations.

5.1.1 Hot S22-Parameters

The hot S22 and S11 are measured with a 25 MHz frequency sweep around the drive frequency foreach of the output powers, see figure 5.1.1.

Figure 38: A frequency sweep of the hot S22 and S11 parameters of the TMM3 design when it’sdelivering 600 W, 1050 W and 1250 W to the load plotted into the Smith-chart. In the bottomright Smith-chart, the S22-parameter at 352 MHz is plotted for every measured power, as to presentits path through the Smith-chart.

The input S11 parameter is well matched with a input reflection coefficient of roughly -18 dB forall measured powers. The input impedance of the transistor does not vary much with the outputpower, which is seen by the fact that S11 only changes slightly, staying matched for all outputpowers. The S22-parameter however changes alot when power is increased. It starts close to theouter circle Re(Z) = 0 in the Smith-chart for low powers, when the power is increased S22 starts

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moving through the Smith-chart, passing through the center. As it passes through the center ofthe Smith-chart the amplifier starts entering compression, this is when the amplifier is operatingat its highest efficiency.

If the matching capacitor in the output matching network is moved away from the transistor, theS22-parameter will move quicker through the Smith-chart and the amplifier will reach compressionfor lower output powers. In a similar manner the amplifier will be matched for even higher outputpowers if the matching capacitor is instead moved towards the transistor. This can be used totune the amplifier to a desired output power.

5.1.2 Performance

The TMM3 module are measured with output powers up to 1300 W. In figure 5.1.2 the measuredgain and efficiency are presented for all measured power levels.

Figure 39: The efficiency and gain as a function of output power for the TMM3 module. Itoperates at 71 % efficiency with 2 dB gain compression at 1250 W output power.

The amplifier’s temperature is measured using an IR camera[8]. This showed that the tempera-tures only increases by a couple degrees celsius higher than room temperature, reaching 30 C.A water flow of roughly 8 l/min are used to keep the heat sink from heating up. The thermalresistance is calculated to roughly Rth = 0.25 C/W. An IR-image of the TMM3 module at 1250W output power with IDq = 40 mA is presented in figure 5.1.2.

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Figure 40: An IR camera are used to monitor the temperatures of the transistor, bias inductorand the matching capacitors. For the TMM3 module, temperatures due to heating peaked at 30 Cat the transistor.

5.1.3 Harmonic Distortion

If the amplifier has a high harmonic distortion in the output signal, a big part of the power islost to the higher harmonic which lowers the overall efficiency of the amplifier. This is highlynoticeable while the final fine tuning of the output matching capacitor are being made, as a smallchange in position/capacitance will not affect matching of the fundamental 352 MHz tone. Alarger difference will be made for the matching of higher frequencies, and when these becomeunmatched the efficiency is observed to increase. In figure 5.1.3 the spectrum of the TMM3’soutput power signal is presented.

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Figure 41: A picture of the spectrum of the output power signal shows a low second harmonic 38dB below the fundamental.

Normally the first harmonics are the strongest ones, meaning usually only the first and secondharmonics are taken into consideration. The spectrum analyzer only provide the spectrum upto 1 GHz, so only the power of the first harmonic are measured to 38 dBr. But given the highefficiency of the device, the third harmonic (at 1056 MHz) should be very low as well.

5.1.4 Different VD

Measurements are also made using alternative drain voltages VD. 50, 52 and 55 V are measuredup to 1300 W output power, in figure 5.1.4 the gain and efficiency of these measurements arepresented.

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Figure 42: The TMM3 module are measured with VD set to 50, 52 and 55 V.

The module reaches higher powers before entering compression when higher VD’s are used. Thisalso lowers the efficiency slightly for lower powers. This characteristic can be understood by re-membering that the output power can be written as Pout = VDID, which makes it clear that if VDis increased, Pout will increase proportionally.

Possible usages for this could be to implement a variable VD, which would allow the amplifier tooperate at high efficiency for a wider range of output powers. This would be a big advantage forsystems with a big peak-to-average ratio, as the amplifier will operate with highest efficiency onlywhen pushed into saturation. A variable VD would allow the system to change for which outputpower the amplifier reaches saturation. However, what effects this might have on the transistor isunknown and further investigation would have to be done before any conclusions can be drawn.

5.2 The TMM10i Module

The TMM10i module was designed to use without lumped components but since simulationsdidn’t match reality, two capacitors had to be used in order to match the amplifier. The sizes ofthe capacitors are 33 and 8.2 pF, and the brand is ATC800B.

5.2.1 Hot S22-Parameters

The hot S-parameters were measured with an IDq of 40 mA. In figure 5.2.1, the hot S11 and S22

parameters are plotted in the Smith chart for different output powers of the module. Note howmuch the biasing affect the S-parameters. With the drain voltage on, impedance travels almost λ

4

in the Smith chart.

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Figure 43: A frequency sweep of the hot S22 and S11 parameters when the amplifier is delivering700 W, 1100 W and 1250 W plotted into the Smith-chart. The effect of biasing on the S-parametersis also shown in the upper Smith charts. In the lower right Smith chart, S22’s movement for 352.2MHz is plotted. As S22 passes close to the matched middle the gain reaches maximum and whenit passes the amplifier starts to go into gain compression.

When the amplifier reaches the 1 kW level the S22 passes trough the middle of the Smith chart.S11 is a fairly good match for lower output powers and at 1250 W it reaches -30 dB return loss.

5.2.2 Performance

The TMM10i design achieved an output power of 1250 W with an efficiency of 69.1 % at IDq =40mA. This result together with the effects of changing IDq is presented in figure 5.2.2. The gainincreases and efficiency decreases if IDq is increased, with a gain compression of roughly 2 dB at

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1250 W output power.

Figure 44: The performance of the TMM10i design with different IDq values.

The decrease in efficiency is because of the fact that the amplifier moves closer to class A whenthe IDq is increased since the conduction angle is increased.

5.2.3 Temperatures and Harmonics

It is important that the amplifier does not get too hot during operation. The temperatures ofthe amplifier is studied with a IR-camera and an IR picture of the amplifier can be seen in figure 45.

Figure 45: An IR-picture of the TMM10i amplifier, the part that gets most heated are the capacitorsin the output matching network.

The capacitors in the output matching network are the components that get most heated, reach-ing a temperature of 58 C. This temperature is higher than expected since the amplifier is only

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running at a duty cycle of 5 %. However, the capacitors are rated for more than 100 C so forthis pulsed application the temperature is acceptable.

With a spectrum analyzer, the power in the second harmonic can be studied. The second har-monic is at 704 MHz and is preferably very low since efficiency is lost otherwise. According to thespectrum analyzer that was used, the second harmonic was at -50 dB relative to the first harmonicwhich is enough for not affecting the efficiency.

5.3 Combination Measurement

5.3.1 The 1.25 kW Modules

For the combination measurements to work, a requirement is that all amplifier modules have closeto the same gain and phase, which practically means you can not mix different amplifier designs.Instead of the TMM3 substrate, the more common RO4350B substrate by Rogers is used. Theonly difference is the increase in the drain voltage to 55 V instead of 50 V. The combinationmeasurements starts with two modules, although 9 are manufactured. PCB’s are manufacturedby Cogra Pro and the components are soldered by hand at FREIA and attached to the heat sink,see figure 5.3.1.

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Figure 46: The combination measurement PCB’s are manufactured by Cogra Pro, heat sink byDione, while soldering and mounting is done by hand in FREIA.

Before any combination measurements are done, each amplifier module are measured separatelyto check the performance of the four best modules. The modules differ roughly 2 % -units fromeach other in efficiency and roughly 0.6 dB in gain, see figure 5.3.1.

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Figure 47: Four 1.25 kW modules are constructed and mounted onto the 10 kW heat sink. Theyare measured separately and the variations regarding gain, efficiency and phase is monitored.

The phase of S21 now needs to be taken into consideration. Even if the modules use an identicaldesign, variations are still possible. These variations are compensated for by adding cable lengthto add phase for some of the modules. The measured phase of the four modules is presented infigure 5.3.1.

Figure 48: The phase difference of the four best amplifier that were constructed for combination.

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The four module differ with less then 5 at full power, which is better than expected. But thereis more variance for lower output powers, with as much as 15 phase difference. This will causea slight decrease in output power and therefore an overall decrease in efficiency at these powerlevels.

5.3.2 The 10 kW Module

The heat sink have capabilities to hold 8 amplifiers, which together should be able to reach 10kW output power. To run the module at full power a pre-amplifier that can provide 100-150 Wis needed to supply the input power. Low loss eight way power splitters and combiners will bedeveloped in the future to maximize the modules efficiency, for this first combined measurementonly a two way power splitter and one two way power combiner were available. The power splittercombiner are measured using the PNA and they have roughly 1.5 dB insertion loss, meaningroughly 30 % of all power will be lost in the combination. The power splitter and combinerare only used to show that the amplifier modules can be combined to reach higher power. Thecombination result of module 8 and 9 is shown in figure 5.3.2.

Figure 49: Module 8 and 9 are combined and the gain and efficiency are measured up to 1700 W.The high losses in the combination is the main cause for the low efficiency and power.

In figure 5.3.2 the modules are measured together up to 1700 W output power with an efficiencyof slightly below 50 %. The main reason for this low output power and efficiency is the very highinsertion loss in the power combiner. If you account for these losses and calculate the expectedresults using an ideal combiner you get 2.4 kW output power with 70 % efficiency, which is whattwo modules is expected to deliver.

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6 Conclusions and Discussion

It has been presented to be possible to eliminate the even harmonics which was one of the concernswhen using single ended designs. The advantage of having single ended designs is the simplicitythat is obtained, neither BALUNs and few lumped components are needed. The BLF188XR hasdemonstrated to be able to deliver more than 1300 W of power while maintaining roughly 70 %efficiency.

6.1 Comparing Simulations and Measurements

Simulations and reality never yield the same results, in this case the difference is big enough thatthe matching capacitors in the input and output matching network needs to be changed bothin size and position. The culprit for this inaccuracy is assumed to be the encrypted BLF188XRmodel, which seems not to be very accurate for these powers and frequency. However, once thematching capacitors are adjusted similar performance is seen, see figure 6.1 for a comparison ingain and efficiency between simulations and reality for the TMM3 design.

Figure 50: Measurements of the TMM3 module compared to the harmonic balance simulation.

In simulations, slightly higher efficiency is achieved at full power, roughly 75 % compared tothe measured 72 %. The simulations also show roughly 2 dB lower gain. This pattern canbe explained by observing the constant gain and constant efficiency circles in figure 18. In thesimulations, the load impedance presented by the output matching network is probably slightlycloser to the efficiency maximum, hence further away from the maximum gain.

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6.2 Comparing The TMM3, TMM10i and The Modified ESRF Mod-ules

The two in house amplifiers are compared to the modified ESRF amplifier in figure 6.2. TheTMM3 amplifier achieved the best efficiency and also had low temperatures when operated at fullpower. The TMM10i amplifier had a reasonable efficiency at 69.1 % at full power, however theoperating temperatures are more than wanted. One advantage of the TMM10i amplifier is thatit’s much smaller than the rest.

Figure 51: The two in house designed amplifiers are compared to the modified ESRF amplifiers.

6.3 The 10 kW Module

In figure 5.3.2 two modules are combined and measured up to 1700 W combined output power.For the combination a combiner with very high insertion loss are used (1.5 dB or 30 %). Newpower combiners will be designed by FREIA, aiming towards 0.1-0.2 dB (or 5 %) insertion loss.Once the improved combiner have been developed the 10 kW module will be able to deliver itsfull 10 kW output power.

In the future, even higher power measurements can be foreseen as multiple 10 kW modules thatcan be combined to 400 kW which will be the full power of one of the RF-towers at ESS onceconstruction is complete. The effects of running the amplifiers a long time will also have to beexamined as there are possibilities the performance will change over time.

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7 Acknowledgements

We would like to take this space to thank the people involved. Vitaliy Goryashko, Maja Olvegard,Roger Ruber, Anders Rydberg, Rolf Wedberg, Lars Hermansson and everyone else at the FREIAgroup for the support and help received while working with this project as well as allowing usaccess to their facilities. ESRF’s Michel Langlois and Jorn Jacob for providing the ESRF module’sPCB as well as some feedback. A big thanks to Sone Sodergren at the Angstrom workshop forall of his help during the heat sink construction. We want to thank Uwe Zimmermann for all thehelp with pcb-construction and much more, and of course a special thanks goes out to DragosDancila who provided us with excellent support during this project.

References

[1] S. Peggs, “Conceptual Design Report, ESS-2012-001, 2012.

[2] http://europeanspallationsource.se/30-times-brighter-today

[3] http://www.microwaves101.com/encyclopedia/kfactor.cfm

[4] Anritsu, “Hot S22 and Hot K-factor Measurements”, Application Note 11410-00295.

[5] http://www.nxp.com/products/mosfets/rf_power_transistors_ldmos/broadcast_ism/

0_500_mhz_hf_vhf_ism/BLF188XR.html

[6] http://edocs.soco.agilent.com/display/ads2011/About+Load+Pull+DesignGuide

[7] http://rogerscorp.com/documents/728/acm

[8] FLIR, “FLIR i-Series”http://www.flir.com/uploadedFiles/Thermography_USA/Products/Product_

Literature/flir-i-series-datasheet.pdf

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