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Recent progress in high performance and reliable n-type transition metal oxide-based thin film

transistors

View the table of contents for this issue, or go to the journal homepage for more

2015 Semicond. Sci. Technol. 30 024002

(http://iopscience.iop.org/0268-1242/30/2/024002)

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Invited Review

Recent progress in high performance andreliable n-type transition metal oxide-basedthin film transistors

Jang Yeon Kwon1 and Jae Kyeong Jeong2

1 School of Integrated Technology, Yonsei University, Incheon, Korea2Department of Materials Science and Engineering, Inha Univerity, 253 Yonghyun-Dong, Nam-Gu,Incheon 402-751, Korea

E-mail: jkjeong@inha.ac.kr

Received 1 July 2014, revised 8 August 2014Accepted for publication 11 August 2014Published 19 January 2015

AbstractThis review gives an overview of the recent progress in vacuum-based n-type transition metaloxide (TMO) thin film transistors (TFTs). Several excellent review papers regarding metal oxideTFTs in terms of fundamental electron structure, device process and reliability have beenpublished. In particular, the required field-effect mobility of TMO TFTs has been increasingrapidly to meet the demands of the ultra-high-resolution, large panel size and three dimensionalvisual effects as a megatrend of flat panel displays, such as liquid crystal displays, organic lightemitting diodes and flexible displays. In this regard, the effects of the TMO composition on theperformance of the resulting oxide TFTs has been reviewed, and classified into binary, ternaryand quaternary composition systems. In addition, the new strategic approaches including zincoxynitride materials, double channel structures, and composite structures have been proposedrecently, and were not covered in detail in previous review papers. Special attention is given tothe advanced device architecture of TMO TFTs, such as back-channel-etch and self-alignedcoplanar structure, which is a key technology because of their advantages including low costfabrication, high driving speed and unwanted visual artifact-free high quality imaging. Theintegration process and related issues, such as etching, post treatment, low ohmic contact and Cuinterconnection, required for realizing these advanced architectures are also discussed.

Keywords: field-effect transistors, metal oxide, high performance

(Some figures may appear in colour only in the online journal)

1. Introduction

Transition metal oxide (TMO) semiconductors with n-typeconductivity have attracted enormous attention as a channellayer of pixel switching transistors in the area of active matrixdevices, such as liquid crystal displays (LCDs) and organiclight-emitting diodes (OLEDs), because they offer intriguingproperties, such as high mobility, good transparency to visiblelight, low temperature process capability and relatively lowfabrication cost compared to silicon-based semiconductors[1, 2]. In particular, the conduction band of TMO materials is

associated with overlap of the ns orbitals of transition cations,such as zinc, indium and tin. Their non-directionality allowsdisordering-independent carrier mobility, low trap state den-sity and good uniformity of the resulting TMO TFTs [3, 4].The applications of flat-panel AM displays include mobiletelephones, tablets, monitors, and televisions according to thepanel size. Traditional amorphous Si (a-Si) and low tem-perature polycrystalline silicon (LPTS) backplanes are stillthe mainstream for such products. In the case of mobile tel-ephones, the LPTS thin film transistors (TFTs) array is rapidlypenetrating the high-end LCD and OLED products because

Semiconductor Science and Technology

Semicond. Sci. Technol. 30 (2015) 024002 (16pp) doi:10.1088/0268-1242/30/2/024002

0268-1242/15/024002+16$33.00 © 2015 IOP Publishing Ltd Printed in the UK1

they exhibit very high mobility (>80 cm2 Vs−1), excellentelectrical stability and good form factor. On the other hand,televisions, which have the largest market volume among thevarious applications, is driven by a-Si TFT arrays. This is dueto the large size uniformity, scalability and low fabricationcost of a-Si backplane technology [5, 6]. The application ofTMO electronics to practical products depends on the designspecifications of each panel. For mobile applications, TMOTFTs with high mobility compatible to the LTPS counterpartneed to be developed. Considering that the typical mobility ofIn2Ga2ZnO7 TFTs is approximately 10 cm2 Vs−1 in the

manufacturing line, it is imperative to develop an advancedcomposition and device structure of TMO TFTs with highfield-effect mobility (>30 cm2 Vs−1), as shown in figure 1.Although higher mobility (>20 cm2 Vs−1) can be achieved forIn-rich IGZO films [7–9], the reliable and production gradecomposition of the IGZO channel layer for TFTs is limited inthe flat panel display industry. For the large size televisionapplications, the most important aspect is the low fabricationcost. TMO TFTs can be fabricated without an intentionalcrystallization and ion doping process, which are essentialprocesses for LPTS TFTs. Therefore, TMO TFTs are poten-tially attractive for low cost fabrication. The overall panel costof flat panels is determined by the architecture of the TFTs,which can be classified as a bottom gate, top gate or coplanarstructure. The most popular architecture of a-Si TFTs is abottom gate structure (figures 2(a) and (b)), where the source/drain electrode is formed on the semiconducting layer. Inparticular, the back-channel-etch (BCE) type is preferred dueto the simplicity of the process and the lowest use of photo-mask steps (figure 2(b)). On the other hand, TMO TFTs,which have been studied thus far, are the etch stopper (ES)type because the TMO channel is attacked easily by S/Dpatterning damage (figure 2(a)). Therefore, the developmentof TMO TFTs with a BCE type is essential for reducing thefabrication cost.

High resolution (⩾200 ppi) and high frequency frame(⩾240 Hz) driving have become a megatrend for the nextgeneration active-matrix (AM) displays, which enable a vividimage and a natural motion picture in the resulting display.On the other hand, these requirements shorten the scan lineselection time, leading to insufficient charging (image error)in the storage capacitor of each pixel. To resolve this problem,

Figure 1. Required field-effect mobility to meet the trend towardsultra-high-definition and high frame rate driving in the nextgeneration FPDs.

Figure 2. Schematic device architectures of (a) ES type bottom gate, (b) BCE type bottom gate and (c) self-aligned coplanar device structure,which are used to fabricate the TMO TFTs.

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Semicond. Sci. Technol. 30 (2015) 024002 J Yeon Kwon and J Kyeong Jeong

extensive efforts are needed including high mobility, lowresistance and low capacitance with the aim to reduce theresistive-capacitive (RC) delay (figure 1). In addition, unde-sirable visual artifacts, such as flicker and image sticking, etc,can be aggravated by the displacement current caused byparasitic capacitive coupling. In particular, the kick-backeffect due to the parasitic capacitance of TFTs is the origin forthe flicker and image sticking problem in AMLCD andAMOLED panels, respectively [10]. Therefore, the designand fabrication of TFT arrays with a low parasitic capaci-tance, such as a self-aligned coplanar structure, is also atechnically important issue (figure 2(c)).

Several excellent review papers on TMO TFTs in termsof the fundamental electron structure, device process andreliability have been published [11–14]. In this review, thenovel channel composition and channel structure reportedrecently focused on the In-Zn-Sn-O (IZTO), zinc oxynitride(ZnON) semiconductor, double channel and hybrid compositechannel. The sputtering technique is the most commonly usedmethod for preparing TMO films because of its higher per-formance and superior electrical or photo stability comparedto the counterpart of the solution-based processing. Kim et alrecently reviewed solution processed TMO and related devi-ces, which have the advantages of a simple process, low costand high throughput [15]. Beside the traditional ES typedevice, BCE type TMO TFTs with the merit of processsimplicity and short channel device are also addressed interms of the etching, treatment, passivation and copper (Cu)line processes. Finally, the fabrication process and issues ofTMO TFTs with a self-aligned coplanar structure arereviewed, which enables realization of a visual artifact-freeimage in the resulting AM displays.

2. Compositional approach for highperformance TFT

2.1. Binary TMO semiconductor

Binary oxides, such as ZnO, In2O3 and SnO2, have a wideband gap (>3.0 eV) and high electrical conductivity, whichcan be attributed to native defects, such as oxygen vacancies,cation interstitials, hydrogen, which act as shallow donors[16–18]. These oxides have high electron mobility even whenthey are amorphous, which originates from the intercalationof the ns orbital of the cations [19, 20]. For these reasons,these oxides have been considered widely as the base mate-rials for amorphous semiconductors. Since the first report ofZnO TFTs by Hoffman et al [21], the performance of ZnOTFTs have been improved steadily by optimizing the sput-tering process or solution process [22–25]. Recently, mod-ification of the device structure, such as the vertical channel[26] and dual gate [27], has been also reported using a ZnOsemiconductor. On the other hand, ZnO is a polycrystallinematerial that is unsuitable as a channel material for TFTsbecause of its non-uniformity [1, 17, 28]. Therefore, the keyissue for ZnO semiconductors is to obtain grain boundary-freeuniform properties, which should not be compromised by any

degradation of the high electron mobility, via a simple pro-cess. The extraordinary mobility of ∼120 cm2 Vs−1 was pre-viously reported for InOx TFTs with an organic dielectric.Despite this, these devices suffer from a large off-state currentand low Ion/off ratio of ∼105 presumably due to the highleakage current of the organic dielectric and/or the highconductivity of the InOx channel layer itself [29].

2.2. Ternary TMO semiconductor

With the viewpoint of large area uniformity, the ternary TMOsemiconductor would be promising because a multi-compo-nent cation system is immune to crystallization under a givenprocessing condition. InZnO (IZO) is the representativeternary system. In2O3 and ZnO have the bixbyite and wurtzitecrystal structure, respectively. Owing to the different geo-metrical hindrances, the two components have also differentcation coordination numbers, which allow the resulting IZOalloy to be an amorphous phase. In addition, the resistivity ofIZO films varies dynamically from 10−4 to 108Ωcm bycontrolling the cation composition and cation/oxygen non-stoichiometry. This means that the IZO film can be used aseither a transparent conducting electrode or channel layer ofTFTs for FPD application [30–33]. On the other hand, theIZO film exhibits a high free electron density (Ne) because ofthe easy formation of oxygen vacancy defects, which dete-riorates the off-state current and photobias stability of theresulting IZO TFTs. For example, a high mobility of>100 cm2 Vs−1 was reported for the IZO TFTs with a goodIon/off ratio of 10

7 [34], but the NBIS stability of the IZO TFTswas not studied. Recently, IZO TFTs with high mobility(>30 cm2 Vs−1) have been reported (figure 3), where thephotobias stability was reinforced by oxygen high pressureannealing [35].

ZnSnO (ZTO) is another ternary class material that easilyforms an amorphous phase. In contrast, the ZTO system is

Figure 3. Transfer characteristics of a-IZO TFT with high mobilityof >30 cm2 Vs−1. The evolution of the transfer characteristics as afunction of the PBS time are also shown. Adapted from [35].

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Semicond. Sci. Technol. 30 (2015) 024002 J Yeon Kwon and J Kyeong Jeong

much cheaper than the IZO system. Therefore, there havebeen many reports regarding the promising performance ofTFTs with a ZTO channel layer [36–43]. The stability of ZTOTFTs was improved by either optimizing the Zn/Sn ratio [38]or controlling the passivation process [41]. On the other hand,it is difficult to pattern tin-rich ZTO by wet etching. More-over, the device instability of ZTO TFTs under bias thermalstress (BTS), light illumination or negative bias illuminationstress (NBIS) conditions require further improvement.

2.3. Quaternary TMO semiconductor

A low Ne (<1017 cm3) is a key technical parameter forachieving highly stable TMO TFTs. In the case of binary orternary TMO systems, moderate n-type doping can be con-trolled by the cation/anion non-stoichiometry or process opti-mization. An alternative approach is to introduce an extracomponent, which is called a carrier suppressor. Gallium (Ga)is a representative carrier suppressor for the IZO system.Nomura et al reported high performance TFTs with an IGZOchannel, where Ne was reduced by the Ga fraction [1]. Thisreduction of Ne can be explained by the high ionic fieldstrength of the Ga ion, which allows oxygen to be boundtightly and prevents the formation of oxygen vacancies[1, 20, 28, 44]. In the IGZO TFTs, the carrier mobility gen-erally increased with increasing In content (decreasing Gacontent), which can be explained by the increasing Ne.Therefore, high mobility (>20 cm2 Vs−1) can be achieved forTFTs with an In-rich IGZO channel composition [7–9]. Manyother carrier suppressors, which are similar to the Ga ion, havebeen suggested for IZO and ZTO. Hafnium (Hf) was proposedas an effective carrier suppressor for the IZO semiconductor[45]. The fabricated HIZO TFTs exhibited reasonable deviceperformance with a field-effect mobility of ∼10 cm2 Vs−1, andhigh Ion/off ratio of >108. The photobias stability of the HIZOTFTs was improved further by either choosing a SiO2 dielectricas a gate insulator [46] or adopting a double etch stop layer[47]. Park et al reported highly stable Zr-doped IZO (ZIZO)TFTs, where the ZrO2 was introduced as a carrier suppressor[48]. The Ne in the ZIZO films decreased from 4×1016 cm−3 to1 × 1014 cm−3 with increasing Zr fraction. The ZIZO TFTsannealed at 350 °C for 2 h. exhibited a field-effect mobility of3.9 cm2 Vs−1, SS factor of 0.98 V/decade, Vth of 1.6 V, and anIon/Ioff ratio of ∼107. The constant current stress (IDS= 3 μA,VDS= 10V, 60 h.) stability (ΔVth = 1.0 V) of the ZIZO TFTswas superior to that (ΔVth = 3.4 V) of IGZO TFTs. Titanium[49, 50], aluminium [51, 52], tantalum [53], strontium [54],barium [54], scandium [55], magnesium [56], lanthanum [57],and gadolinium [58] exhibit similar carrier suppressor behaviorin the IZO-based system, as shown in figure 4.

One promising composition toward high mobility inquaternary TMO materials is the IZTO semiconductor [59].The role of the Sn cation is controversial. Sn4+ acts as amobility enhancer, which is similar to In3+. Therefore, theobserved high mobility in the IZTO transistor can beexplained by the efficient cooperative intercalation of the nsorbital of In3+ and Sn4+ cations. On the other hand, the meta-stable Sn2+ ion can trap the carrier as tailing states in the

forbidden band-gap of the IZTO semiconductor [60]. Hightemperature annealing under an oxidizing atmosphere favorsthe Sn2+ to Sn4+ transition in the TMO film. Figures 5(a) and(b) shows the transfer characteristics and mobility variationsof the representative IZTO TFTs with the atomic ratio of In:Zn: Sn = 40: 36: 24. A high mobility of 52.4 cm2 Vs−1 andlow SS factor of 0.2 V/decade were observed without adeterioration of the off-state drain current and Vth value (Ion/offratio > 2 × 108, Vth∼ 0.1 V) [61]. On the other hand, theintroduction of a carrier suppressor in the IZO system tendedto reduce the mobility of the TFTs (so called percolationconduction), even though it improved substantially theresistance of the TFTs against an external gate bias stress andphotobias stability. The strong trade-off between the mobilityand stability of TMO TFTs will be described in the nextsection.

2.4. Oxynitride semiconductor

The cation composition has been modified mainly to improvethe stability of TMO TFTs under bias and illumination stress.An entirely different approach was proposed using ZnON as achannel layer [62, 63]. The substitution of an oxygen anionwith a nitrogen anion in ZnO reduces the energy band gap ofZnON to 1.3 eV, which eliminates the oxygen deficient-

Figure 4. (a) Schematic structure of Ti-doped IZO TFTs. (b)Variation of the transfer characteristics for TIZO TFTs as a functionof the Ti cation fraction. The channel width (W) and length (L) of theTFTs were 640 and 50 μm, respectively. Reproduced with permis-sion from [49].

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Semicond. Sci. Technol. 30 (2015) 024002 J Yeon Kwon and J Kyeong Jeong

related deep levels near the valence band maximum. There-fore, the photobias stability of the resulting ZnON TFTsbecomes comparable to that of the LTPS TFTs (figure 6) [63].Simultaneously, a high mobility of >40 cm2 Vs−1 can beachieved due to the effective small electron mass in ZnONfilms. On the other hand, the severe stretch-out of the sub-threshold drain current suggests the existence of huge tailingtrap states that need to be resolved.

3. Advanced architecture for high performance TFTs

3.1. Double channel structure

In a-IGZO system, the wave function of the ns orbital of In3+

overlaps first and forms delocalized states in the conductionband because the indium ion has the largest ionic size amongthe various cations. The increasing In content in the a-IGZO

Figure 5. (a) Representative transfer characteristics of the a-IZTO TFTs with an ES bottom gate structure (W/L = 270/15 μm). The fabricateda-IZTO TFT exhibited a high mobility of 52.4 cm2 Vs−1, low SS of 0.2 V dec−1, Vth∼ 0.1 V and Ion/off ratio of >2 × 108. Adapted from [61].

Figure 6. (a) Transfer characteristics of the TFTs both in the dark and under illumination (15 400 lux). The inset shows the IDS as a functionof time as the TFTs are subjected to illumination at an intensity of 15 400 lux, turned on and off with a time interval of 60 s. (b) Parallelnegative shifts in the transfer characteristics of TFTs under illumination (445 lux). (c) Vth shift (ΔVth) as a function of the stress time underdark and illumination (445 lux). (d) ΔVth as a function of the light intensity illuminating the TFTs. The inset presents an enlargedgraph showing ΔVth under weak illumination <500 lux. Reproduced with permission from [63].

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Semicond. Sci. Technol. 30 (2015) 024002 J Yeon Kwon and J Kyeong Jeong

film gives rise to a simultaneous increase in Hall mobility andNe, which can be explained by the formation of shallowoxygen vacancies that is facilitated by increasing the coor-dination number of In ions around a given oxygen atom. Inparticular, the proportional relationship between the carrierdensity and mobility can be understood by a so-called per-colation conduction mechanism. This means that theenhancement in the field-effect mobility by increasing Incontent normally accompanies the serious degradation in bothoff-state drain current and Ion/off ratio in the IGZO TFTs. Thistradeoff relation limits the use of the In fraction to achievehigh mobility. The photo bias stability of metal oxide TFTscan also be aggravated seriously by the increasing In fraction.Most oxygen vacancies except for a few oxygen vacancyspecies were calculated to be an inactive and deep state in theforbidden energy gap of IGZO materials [2]. The exposure ofphotons (>2.2 eV) on the IGZO material causes the photo-ionization of neutral oxygen vacancies (VO) to meta-stablepositively-charged oxygen vacancies (VO

2+). During the photo-ionization process, the two electrons (VO→VO

2+ + 2e−)released gives rise to photon-induced electron doping, whichresults in a negative shift of Vth in the IGZO TFTs [11].Therefore, achieving a high field-effect mobility without thedegradation of photobias stability is a challenge. As analternative approach, the double-channel structure can pro-vide a solution to the adverse tradeoff between the field-effectmobility and photo-bias stability [64–68].

All double-channel devices studied had a bottom gateand top contact configuration. The channel layer consisted ofa front layer and back layer. The front channel layer insertedbetween the gate dielectric film and back channel layer playsthe role of the mobility booster, whereas the back channellayer strengthens the resistance of the TFTs to external gatebias and light stress. Therefore, the physical thickness (tint)and Ne of the interfacial front layer is a critical factor fordetermining the overall device performance of the doublechannel TFTs. A reasonable window for the interfacial layerin terms of the tint and Ne values can be expected, which doesnot cause any degradation of the Vth and Ioff parameters.Given that the Ne of the interfacial channel layer is muchlarger than that of the back channel layer, it can be assumedthat the Vth and Ioff values for the double channel TFTs aredetermined by the conducting front layer. First, to sustain thelow Ioff value, the tint value should be smaller than thedepletion thickness (xdepl = (2ε0Ksϕs/qNd)

1/2, where ε0 is thevacuum permittivity, Ks is the relative dielectric constant of asemiconductor, ϕs is the channel surface bending and q is theelementary charge), which corresponds to guide line (i)in figure 7. Second, the total number (q(tint)Ne) of free elec-trons in the channel must be less than the number of chargecarriers (QG) induced by the gate dielectric capacitor(QG =CiVGS = ε0KGIVGS∣tGI, where Ks is the relative dielectricconstant of the gate insulator, and tGI is the gate insulatorthickness), which determines guide line (ii). The tint-depen-dent Ne values should belong to the shaded area for the sui-table operation of transistors. Otherwise, the device wouldsuffer from either a large negative Vth value and/or a large Ioffcurrent. Kim et al reported high performance TFTs with a

double-channel structure consisting of a thick back IGZO andthin front IZO (or ITO) layer, as shown in figure 8 [64]. TFTswith a single 70 nm thick IGZO channel exhibited a moderatemobility of 19.2 cm2 Vs−1, Vth of −0.6 V and an Ioff value of5.7 × 10−13 A. A substantially higher mobility of55.2 cm2 Vs−1 was obtained for TFTs with a single 30 nmthick IZO channel layer. The Vth value of the IZO TFTs,however, degraded to − 8.2 V. The improved mobility anddegraded Vth value of the IZO FETs was attributed to the highNe of the IZO channel layer, even though the actual Ne valuesof the IZO films were not characterized. In contrast, thedouble channel TFTs with a back IGZO(70 nm)/front IZO(5 nm) showed a high mobility of 51.3 cm2 Vs−1 and a low Ioffof 4.7 × 10−13 A without sacrificing the Vth value (∼0.3 V).

Figure 7. Relationship between Ne and tint. The double-channeldevice operates only under the shaded region. The thick devices(tint > tcrit) suffered from both a negative Vth value and NBISinstability compared to those of single channel ZTO device. Adaptedfrom [67, 69].

10-3

10-5

10-7

10-9

10-11

10-13-40 -35 -30 -25 -20 -15 -10 -5 0 5 10 15

VGS (V)

I DS (A

)

W/L=10/10Vds=1V

IGZOITOIGZO/ITO

Figure 8. Comparison of the transfer characteristics of TFTs withsingle IGZO, single ITO and double IGZO/ITO channel layer.

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Semicond. Sci. Technol. 30 (2015) 024002 J Yeon Kwon and J Kyeong Jeong

This suggests that the conducting interfacial IZO or ITObetween IGZO and the SiO2 film induces the high mobility ofthe resulting TFTs. The thickness of the conducting IZO orITO layer should be controlled carefully because the thickIZO or ITO layer (>8 nm) in the double channel TFTs cancause a huge negative Vth value [64]. The concept of a con-ducting channel path as an enabler of high mobility wasconfirmed in the IGZO TFTs with a buried channel of theGZO film [65]. The insertion of a conducting GZO film witha carrier density of 3.9 × 1019 cm−3 between the semi-conducting IGZO and SiO2 dielectric film allowed enhancedmobility and better positive bias stress (PBS) stability of theresulting TFTs compared to those of the TFTs with a singleIGZO channel. The result of a device simulation indicatedthat the screening length of the buried channel device wassmaller than that of the single IGZO device when the positivegate voltage was applied. The insensitive surface potentialvariation near the channel region of the buried channel deviceresulted in less trapping of the charge carriers, which allowedbetter PBS stability of the resulting TFTs.

The thickness effect of the thin front ITO film on thetransporting property and PBS/negative gate bias stress(NBS) induced instability in the double-channel Zn0.7Sn0.3O(ZTO)/In0.9Sn0.1O(ITO) TFTs was investigated in detail. ThePBS and NBS stability as well as the mobility of the ZTO/ITO TFTs were improved with increasing tint (⩽3.5 nm)compared to those of the single channel ZTO device, whichwas attributed to a decrease in the effective interfacial trapdensity. The ZTO/ITO(4.5 nm) TFTs, however, suffered frominferior NBS stability to that of single channel ZTO TFTs,whereas their mobility was enhanced further to 45.0 cm2 Vs−1

[67]. The density-of-state (DOS)-based design concept wasproposed for the double-channel TMO TFTs. The DOS-basedoptimized Hf0.10In0.35Zn0.55O(HIZO)/In0.85Zn0.15O(IZO)TFTs exhibited superior BTS stability as well as a highermobility of 48.0 cm2 Vs−1 compared to those of the singlechannel HIZO or IZO TFTs [68]. On the other hand, thefundamental and puzzling question is why the optimal frontchannel thickness (tint) for high performance TFTs without anaccompanying deterioration of the BTS stability was

Figure 9. (a) Change in Vth for various double channel ZTO/IZO devices with a different tint. The empty and filled symbols denote the PBSand NBS induced variations, respectively. (b) Calculated density-of-states distribution as a function of (E—EC) for the devices examined. (c)Amorphous structure of ITZO, including eight formula units of In2Zn2Sn2O9 and the calculated formation energies of VO as a function of thenumber of neighboring Sn atoms. Reproduced with permission from [69].

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Semicond. Sci. Technol. 30 (2015) 024002 J Yeon Kwon and J Kyeong Jeong

approximately 3∼ 5 nm (see figures 9(a) and (b)). The in-depth theoretical calculation indicated that Sn-dopedIn0.74Zn0.26O (IZO) has a ∼0.3 eV larger formation energy ofoxygen vacancies than IZO. Therefore, the in-diffusion of Snions to the front IZO layer during thermal annealing can allowthe high resistance of the resulting TFT against NBIS.Nevertheless, the double channel device with a thick frontIZO layer would exhibit inferior NBIS stability due to thelimited diffusion length of Sn (3∼ 5 nm) [69]. This doublechannel approach can be a solution to resolving the tradeoffbetween the high mobility and stability. On the other hand,the optimal thickness of the front indium-rich TMO layer is sosmall that it would be a challenge to secure the thicknessuniformity of the front layer over the large size glass sub-strate. In this regard, the development of a novel depositiontechnique, such as atomic layer deposition, should beconsidered.

TFTs with a multiple channel structure consisting of 7pairs of In2O3/Ga2O3 showed high mobility (51.3 cm2 Vs−1)and Ion/off ratio (108), which was attributed to the reduction inthe subgap states [70]. The TFT with a superlattice channelconsisting of a ZnO/Al2O3 stack was reported to exhibit bettertransporting and gate bias stress stability than those with asingle ZnO channel, as shown in figure 10. The superiorperformance of the ZnO/Al2O3 superlattice TFTs was attrib-uted to the quantum confinement effect, improved crystal-linity of the ZnO channel and passivation effect of the Al2O3

film [71].The electrical properties of the TMO semiconductor can

be tailored by adopting a composite structure. The hybridchannel structure consisting of sol-gel processedIn0.50Zn0.50O/single-walled carbon nanotube (SWNT) wasused to produce high performance, flexible TFTs. Thiscomposite channel device exhibited a high mobility of140 cm2 Vs−1, whereas a high Ion/off ratio of ∼107 wasmaintained [72]. The reason for the high mobility is that theSWNTs in a composite channel provide a fast carrier pathowing to their ballistic transporting properties. Similar to thecomposite approach, nanometer dot doping (NDD) in theIn1/3Ga1/3Zn1/3O film allowed an increase in the conductivityof the channel layer and thus the carrier mobility of theresulting IGZO TFTs [73]. The coating of a self-organizedpolystyrene sphere and subsequent etching of the IGZOchannel allowed a porous gate structure, which was used forthe mask. The structure was treated with Ar plasma through aporous gate mask to increase the conductivity of the IGZOchannel layer. This NDD on the IGZO channel region ren-dered a high mobility of 79.0 cm2 Vs−1 in the resulting TFTs,which can be attributed to the NDD-induced barrier loweringeffect on the percolation conduction mechanism.

The tailing states near conduction band minimum ofIGZO are believed to originate mainly from atomic dis-ordering. The excess oxygen or loosely bound oxygen speciesin the IGZO material can give rise to a substantial increase inthe tailing state distribution. Zan et al reported an excep-tionally high mobility of ∼100 cm2 Vs−1 in amorphousIn1/3Ga1/3Zn1/3O TFTs by capping the Ca/Al layer withsubsequent stabilization in air [74]. The strong reduction

power of the Ca film on the IGZO surface caused the elim-ination of interstitial oxygen defects in the IGZO channel,leading to a decrease in the tailing defect states. Interestingly,this high mobility in IGZO TFTs was achieved withoutcompromising the SS factor or the Ion/off ratio. The devicestored for 50 days in air exhibited a mobility of105.7 cm2 Vs−1, SS factor of 0.12 V/decade and Ion/off ratio of9 × 108, corresponding to the state-of-art characteristics in anyTMO TFT (figure 11). Figure 12 shows the benchmark plotbetween the field-effect mobility and Ion/off ratio for variousTMO TFTs. Because the values of the higher field-effectmobility would be compromised somewhat by the lower Ion/off ratios for various TMO TFTs, the regions of the TFTssatisfying the high mobility (>30 cm2 Vs−1) and Ion/off ratio(⩾108) are still limited.

Note that some of the TMO TFTs referred in this sectionwere not properly passivated. The adoption of a high qualitypassivation layer on the bare channel layer would furtherimprove the PBS, NBS and NBIS stability of the resultingTMO TFTs [11, 75, 76].

3.2. BCE architecture for low fabrication cost

Bottom gate and ES type TMO TFTs exhibited good uni-formity and stability as well as reasonable field-effect mobilitybecause the electrical degradation of the channel properties,which is caused by physical and/or chemical damage duringpatterning of the source/drain (S/D) data line, can be preventedby the existing ES layer beneath the S/D metal film. This EStype device, however, has the drawback of relatively highprocessing cost and the difficulty in fabricating a short channeldevice. Compared to the BCE type structure, the ES typedevice requires additional deposition of an ES layer by PECVDas well as patterning by photo-mask lithography and etching.In addition, the existence of an ES layer on TMO semi-conductor layer limits the definition of a short channel devicedue to the misalignment margin of the gate-to-ES or the source/drain-to-ES. The panel design with a bezel-free good formfactor necessitates the addition of driver integration on thecircuit peripheral region of the same panel, which requires thedesign of short channel (<2 μm) TFTs. For two main reasons,there is strong demand for BCE type TMO TFTs.

The S/D metal film on the channel layer should be over-etched during the patterning process of the S/D electrode line.The fabricated device showed simple conducting behaviorbecause of the residual metallic components on the channelback surface. Dry etching or/and wet etching methods areused to pattern the S/D metal line. For a high-resolution AMdisplay, dry etching would be preferred due to the ability ofan anisotropic etching profile with good overlay accuracy.The first BCE IGZO TFTs-driven four inch AMOLED panelwas fabricated by dry etching of the Mo S/D film on theIGZO contact layer using fluorine-based plasma [77]. On theother hand, the effects of plasma-based dry etching on thedegradation of the resulting BCE IGZO TFTs was notaddressed in detail. Park et al reported the effects of a N2Oplasma treatment and passivation layer on the device perfor-mance of the BCE IGZO TFTs [78]. The Mo S/D electrode

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Semicond. Sci. Technol. 30 (2015) 024002 J Yeon Kwon and J Kyeong Jeong

was patterned by dry etching using a SF6/O2 gas mixture. Thetransfer characteristics of the BCE IGZO TFTs wereadversely affected by etching-induced damage. The SS factorand Ioff value were degraded to 1.0 V/decade and 10−11 A,respectively. This deterioration was attributed to the forma-tion of oxygen loss and 3 nm thick in segregation, whichmight result from the selective removal of oxygen ions withthe larger coordination number of the In cation. The deviceperformance of the IGZO TFTs is also strongly dependent onthe deposition conditions of the SiO2 passivation layer. Ahuge hydrogen concentration, originating from the SiH4

precursor, can be incorporated into the PECVD-derived SiO2

film. Because hydrogen often acts as a shallow donor centerin IGZO films, the thermal diffusion of hydrogen to the IGZOchannel layer during post annealing results in metallic beha-vior of the resulting TFTs, as shown in figure 13(a). Theswitching property of the TFTs was improved substantially by

the post treatment of N2O plasma on the damaged channelsurface, which supplied oxygen species near the IGZO backsurface region and prevented the invasion of hydrogen fromthe SiO2 passivation layer. Therefore, the N2O treated deviceexhibited a high mobility of 37.0 cm2 Vs−1, low SS of 0.25 V/decade and low Ioff of 10

−13 A (figure 12(b)). The switchingproperty and BTS induced stability of dry etching-based BCEIGZO TFTs can be improved further by optimizing the N2Oplasma treatment, deposition conditions and post annealing ofthe SiO2 passivation layer [79].

The wet etching technique has the merits of low pro-cessing cost and relatively high throughput compared to dryetching. The selection and formulation of the wet etchant is ofprime importance because ZnO-based oxide materials areetched too easily in weak acid. The effects of a HNO3-basedetchant and H2O2-based etchant on the performance of theIGZO TFTs with a Mo S/D electrode were compared [80].

Figure 10. (a) Schematic diagram showing the structure and band diagram of the ZnO/Al2O3 superlattice TFT. Transfer characteristics ofTFTs with (b) single ZnO channel and (c) ZnO/Al2O3 superlattice channel. Reproduced with permission from [71].

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Semicond. Sci. Technol. 30 (2015) 024002 J Yeon Kwon and J Kyeong Jeong

The BCE IGZO TFTs using the HNO3-based etchant showedan inferior SS factor (1.22 V/decade) and more negative Vth

value (1.8 V), indicating the formation of substantial etching-induced trap states near the IGZO back surface. From the O1sXP spectra, the oxygen-deficient region on the IGZO backsurface was confirmed to have been created, which can beattributed to the surface reaction of IGZO films with a strongreducing agent containing H+ ions (pH< 1). In contrast, theH2O2-based etchant-patterned BCE IGZO device exhibitedbetter switching characteristics: reasonable mobility of13 cm2 Vs−1, lower SS value of 0.74 V/decade and higher Vth

of 2.6 V. The comparable performance using the H2O2-basedetchant was previously reported for BCE IZO TFTs [81].Therefore, the use of a H2O2-based etchant for patterning the

S/D line in the BCE TMO TFTs would be a better choice thanthat of the HNO3-based etchant.

Recently, wet etching using a H2O2-based etchant andsubsequent SF6 plasma treatment to remove the wet-etchingresidues was attempted for BCE IZO TFTs with the Mo S/Delectrode. The resulting BCE-type IZO TFTs exhibited stablebehavior against external BTS applications: the Vth shift wasonly 0.25 and −0.2 V under PBS and NBS conditions(VGS = ±30 V, VDS = 0 V @60 C, 12 h), respectively [82, 83].

Although the TMO TFTs with Mo film as the S/Delectrode have been studied intensively, there are a paucity ofreports regarding the BCE processing for the Cu-contactedTMO TFTs. This needs to be investigated in the near future.Furthermore, the photo-bias instability of Cu contacted BCETMO TFTs should be compared with its ES TMO TFTcounterpart [84]. A future study should examine whether thereliability of BCE type TMO TFTs can be comparable to thatof ES type TMO TFTs. Because TMO materials are vulner-able to various wet etchants and solvents as well as to ionicbombardment under a plasma ambient, the in-depth degra-dation chemistry of the underlying TMO materials during S/Dpatterning needs to be understood clearly. Obviously, thestoichiometry deviation and unwanted impurities near theback surface of the TMO films should be either eliminated orinactivated by developing novel post treatments or processingprior to the formation of a passivation layer, which wouldallow the ES type compatible reliability of the resulting EStype TMO TFTs.

3.3. Self-aligned coplanar architecture

Figure 14(a) shows the equivalent unit pixel circuit forAMLCD. When the scan signal switches from the turn-onstate to the turn-off state, the pixel suffers from a certainvoltage drop (ΔVP) due to capacitive coupling caused by theparasitic gate-to-source capacitance (CGS) (figure 14(b)). The

Figure 11. (a) Loosely bonded oxygen atoms change their bindings to nearby calcium and form calcium oxide. (b) Comparison of the transfercharacteristics of standard and Ca/Al capped IGZO TFT during 50 days stored in air. Reproduced with permission from [74].

Figure 12. Benchmark plot of the field-effect mobility versus Ion/offratio for various TMO TFTs. The mobility values for somereferences can be overestimated due to the fringing effect of thechannel layer, which comes from the poor definition of the channelwidth (W). The figures in parenthesis denote the reference number.

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Semicond. Sci. Technol. 30 (2015) 024002 J Yeon Kwon and J Kyeong Jeong

transient voltage drop can be given by the following equation:

Δ Δ=+ +

VC

C C CV ,P

GS

LC SC GSG

where CLC is the capacitance of the liquid crystal, CSC is thecapacitance of the storage capacitor and ΔVG is the voltageswing of the scanning line. The imbalance in VP with frameinversion driving gives rise to flicker or image sticking, whichis called the ‘kickback effect’ [85]. The kickback effectinduces a similar image sticking problem in the panel drivingof AMOLEDs. To reduce the kickback effect, the storagecapacitance in one pixel should be increased. On the otherhand, the higher resolution design renders a smaller unit pixelarea, which limits the maximum storage capacitance.

The best way to eliminate the kickback effect is to adopta self-aligned coplanar architecture. Although many studies ofthe staggered or inverted staggered structures of TMO TFTshave been reported, there are only a few reports of TMOTFTs with a self-aligned coplanar device. Morosawa et alreported the fabrication of IGZO TFTs with a self-alignedcoplanar device for the first time [86]. Figure 2(c) shows aschematic cross-section of a self-aligned coplanar TFT. Interms of device operation, the modulation of the gate field-induced conductance in metal-insulator-semiconductor (MIS)capacitors is similar to that of the bottom gate configurations,such as BCE and ES structure. On the other hand, the chargecarrier injection from the source to channel layer is limiteddue to a lack of overlap of the gate electrode and sourceelectrode. Therefore, a key process in the self-aligned struc-ture is to form a metal access layer, which is denoted by thepink color in figure 2(c). Although selective ion doping viathe gate electrode and subsequent activation process are wellestablished for coplanar LPTS TFTs, ion doping is unavail-able for TMO TFTs. The authors introduced a metal reactionmethod to form a metallic IGZO access region (figure 15).The underlying mechanism is based on the thermodynamicequilibrium reaction between the capping metal layer andunderlying IGZO layer. Two types of 5 nm thick cappinglayers, such as Ti and Al, were deposited by dc magnetronsputtering after patterning the gate line (see figure 15(b)).Subsequent thermal annealing in oxygen ambient at 300 °Ccaused the conversion from a metallic Al (Ti) film to anAl2O3 (TiO2) film. During the metal reaction, the formation ofAl2O3 near the Al/IGZO interface consumed the oxygenspecies from the back surface IGZO film, which gives rise tothe creation of metallic IGZO due to an oxygen deficiency.The resulting self-aligned coplanar IGZO TFTs with a Mo/Al/IGZO contact stack exhibited a high mobility of21.4 cm2 Vs−1 and a low contact resistance (RC) of 2Ωcm,indicating good ohmic contact. The RC value of 2Ωcm wasmuch smaller than those (20∼ 100Ωcm) reported for thebottom gate IGZO TFTs [87, 88].

Figure 13. (a) Transfer curve of a BCE type IGZO TFT after the S/D patterning and passivation patterning. (b) Transfer curve of a BCE typeIGZO TFT after N2O plasma treatment. Reproduced with permission from [78].

Figure 14. (a) Equivalent unit pixel circuit of AMLCD (b) scan andpixel voltage variation during typical pixel driving in AMLCD.

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Semicond. Sci. Technol. 30 (2015) 024002 J Yeon Kwon and J Kyeong Jeong

Hydrogen doping of the TMO layer can be used to form ametallic access layer. SiO2 or SiNx containing a large con-centration of hydrogen species was deposited after patterningthe gate bus line. During post deposition annealing, hydrogendiffuses in the S/D contact region of the IGZO layer, wherethe hydrogen incorporated in IGZO acts as a shallow donor.Therefore, the S/D contact region of IGZO converts to themetallic state, leading to ohmic contact between IGZO andthe S/D electrode [89, 90]. The switching speed of theinverters based on the self-aligned coplanar a-IGZO TFTswas quite high (∼1.25MHz), which was attributed to thesmall parasitic capacitance and high mobility of23.3 cm2 Vs−1 [90]. Finally, a plasma treatment, such as Ar,NH3 etc, can be used for the formation of a metallic accessregion. As mentioned earlier, energetic ion bombardment,such as Ar radicals during plasma treatment, causes an oxy-gen-deficient region near the back channel surface of theTMO film, which results in a metallic region, presumably dueto VO-induced free electron generation [91].

Self-aligned coplanar TFTs with a channel layer of a-IZOelectrode instead of a-IGZO was reported to have a highmobility of 157 cm2 Vs−1, low SS factor of 0.19 V/decade andgood electrical reliability (figure 16) [92]. The N2O plasmatreatment facilitated a transition from the conducting IZO filmto a semiconducting IZO due to the elimination of oxygenvacancies near the IZO back surface. Ohmic contact betweenthe Mo S/D electrode and IZO channel layer was achieved byan Ar plasma treatment on the S/D contact region of the IZO

film. Remarkably, the Vth shift of the fabricated self-aligneddevice was ∼0 and 1.0 V under severe NBIS and PBIS con-ditions (∼3000 cd m−2, VGS,ST = ±20 V, VDS,ST = 10 V @60 °C, 11 000 s), respectively.

The first self-aligned coplanar IGZO-driven AMOLEDpanel was demonstrated by Sony Inc., where a metallic accessregion was formed using an Al metal reaction method.(figure 17(a)) [86]. The 9.9 inch quarter high definition(960 × 540) AMOLED panel exhibited a brightness of200 cd m−2, a contrast ratio of 1 000 000:1 and a color gamutof 96%. In 2013, Bae and coworkers from LG display Inc.demonstrated a prototype of a 13.1 inch AMOLED panel thatwas driven by self-aligned coplanar IGZO TFTs(figure 17(b)). Metallic IGZO was formed by an Ar plasmatreatment. The mobility, SS and Vth values of the IGZO TFTsobtained in the OLED panel were 11.1 cm2 Vs−1, 0.12 V/decade and 0.92 V, respectively [93].

3.4. Cu process for low resistance S/D data line

The charging error in the storage capacitor of each pixelduring the selection time increased with increasing resolution,frame rate and panel size, which gives rise to the shadingeffect and image distortion in the resulting display. To reducethis RC delay, the development of the gate and S/D inter-connection process with a low resistivity as well as highmobility TFTs is essential. In this regard, the Cu metallizationprocess in conjunction with the IGZO or non-IGZO semi-conductor has been studied. In the case of the Cu gate line, thetransitional process consisting of a Cu film, adhesion and/ordiffusion barrier can be adopted in a straightforward mannerbecause the Cu gate process is well proven in a-Si and LPTStechnology. On the other hand, the application of a Cu film asthe S/D data line satisfies the following requirementsincluding good adhesion, excellent diffusion barrier proper-ties and low ohmic contact between the TMO channel andCu film.

The directly contacted device between the Cu electrodeand IGZO channel suffers from the well-known Cu diffusionproblem during elevated thermal annealing [94]. The hump-like behavior in the transfer characteristics of the Cu TFTsbecame dominant with increasing VDS, which is believed tohave originated from the electro-migration of Cu impuritiesalong the channel length direction. The Cu impurity in theIGZO channel causes the creation of tailing trap states anddeep states. From a comparative study of IGZO TFTs with anAl, Mo and Cu S/D electrode, the Cu contacted TFTsexhibited an inferior SS factor (∼1.0 V/decade) to those(∼0.5 V/decade) of Al or Mo contacted TFTs [95]. This canbe explained by the inter-diffusion of Cu impurities into theIGZO channel region, which was confirmed by TOF-SIMSanalysis. Therefore, the common feature of Cu-contaminatedTFTs was the phenomena of severe stretch-out in the sub-threshold drain current due to the additional creation ofCu-related tailing states and deep states in the IGZO channelregion [96]. Therefore, the diffusion barrier to prevent

Figure 15. Process flow of the S/D formation in the self-alignedcoplanar IGZO TFTs. Reproduced with permission from [86].

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Semicond. Sci. Technol. 30 (2015) 024002 J Yeon Kwon and J Kyeong Jeong

Cu diffusion should be inserted between the Cu electrode andTMO channel layer.

Refractory metals, such as Ti, Mo, Cr, Ta or Mo-Ti alloy,can be used as a potential diffusion barrier and adhesionpromoter for Cu-contacted TMO TFTs [97]. For example, theintroduction of a Ta-diffusion barrier between the Cu elec-trode and ZTO channel layer can suppress the inter-diffusionof Cu impurities into the channel region during thermalannealing. The resulting Ta-inserted ZTO TFTs showed betterswitching properties than that of the Cu TFTs without a dif-fusion barrier: the mobility and SS factor were improved from13.2 cm2 Vs−1 and 1.1 V/decade (control device) to18.7 cm2 Vs−1 and 0.48 V/decade, respectively [98]. Yun andKoike reported the fabrication of IGZO TFTs with a Cu–Mnalloy as the S/D electrode [99]. The good ohmic contact(1.2 × 10−4Ωcm2) between the Cu–Mn and IGZO filmafter annealing at 250 °C for 1 h was attributed to the for-mation of a metallic IGZO layer with a Ne of 1.4 × 10

20 cm−3,which allowed reasonable performance of the IGZO TFTswith the Cu–Mn S/D electrode: the mobility, SS and Vth

were 10.8 cm2 Vs−1, 0.44 V/decade and 5.5 V, respectively.The Ti/Si stack barrier for the S/D Cu interconnectionwas examined. The good diffusion barrier propertiesand the contact resistance between IGZO and Cu metalresulted in reasonable performance of the resulting IGZOTFTs [100].

4. Conclusions

Vacuum-based n-type TMO TFTs have begun to penetrate asthe backplane technology in commercial flat panel displays,such as AMLCD and AMOLED displays owing to theirsuperior device properties and low fabrication cost, which iscomparable to those of their silicon-based counterparts. Toaccelerate the implementation of TMO TFTs, a high mobility(>30 cm2 Vs−1) and low parasitic capacitance device archi-tecture should be developed to compete with LPTS TFTs.Recently, various channel compositions, double channels orcomposite structures as approaches to achieving high mobilityhave been proposed. These approaches showed LPTS-com-patible high mobility. On the other hand, the electrical relia-bility including the PBS, NBS, NBIS and hot carrier effect etcare not completely understood, which should be addressed inthe near future. In terms of the device architecture, the currentES type bottom gate TMO TFTs is expected to be replaced bythe BCE-type bottom gate and/or the self-aligned coplanarstructure with a Cu interconnection because these structureshave the merit of low cost fabrication, short channel deviceand low parasitic capacitance. Because the TMO compositionand structure for high mobility (>30 cm2 Vs−1) should becompatible with advanced architectures, the issues related tothe unit process and device integration for this purpose willbecome a major research topic.

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Figure 16. Transfer curves of self-aligned coplanar TFTs with (a) 30 nm thick and (b) 50 nm thick a-IZO channel layer. Variation of thetransfer curves as a function of (c) NBIS and (d) PBIS time, respectively. Reproduced with permission from [92].

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Semicond. Sci. Technol. 30 (2015) 024002 J Yeon Kwon and J Kyeong Jeong

Acknowledgment

This study was supported by a Korea Science and Engi-neering Foundation (KOSEF) grant funded by the Koreangovernment (MEST) (No. 2012R1A2A2A02005854), theindustrial strategic technology development program(10041041) funded by MKE/KEIT.

References

[1] Nomura K, Ohta H, Takagi A, Kamiya T, Hirano H andHosono H 2004 Room-temperature fabrication oftransparent flexible thin-film transistors using amorphousoxide semiconductors Nature 432 488

[2] Kamiya T, Nomura K and Hosono H 2010 Present status ofamorphous in-Ga-Zn-O thin-film transistors Sci. Technol.Adv. Mater. 11 044305

[3] Hosono H 2006 Ionic amorphous oxide semiconductors:material design, carrier transport J. Non-Cryst. Solids352 851

[4] Martins R, Barquinha P, Pereira L, Ferreira I and Fortunato E2007 Role of order and disorder in covalent semiconductorsand ionic oxides used to produce thin film transistors Appl.Phys. A 89 37

[5] Lee H, Yoo J, Kim C, Kang I and Kanicki K 2008 Hexagonala-Si: H TFTs: a new advanced technology for flat-paneldisplays IEEE Trans. Electron. Devices 55 329

[6] Indluru A, Venugopal S M, Allee D R and Alford T L 2011Effect of anneal time on the enhanced performance of a-Si:HTFTs for future display technology J. Disp. Technol. 7 306

[7] Barquinha P, Pereira L, Goncalves G, Martins R andFortunato E 2008 The effect of deposition conditions andannealing on the performance of high-mobility GIZO TFTsElectrochem. Solid-State Lett. 11 H248

[8] Olziersky A, Barquinha P, Vila A, Magana C, Fortunato E,Morante J R and Martins R 2011 Role of Ga2O3-In2O3-ZnOchannel composition on the electrical performance of thin-film transistors. Mater. Chem. Phys. 131 512

[9] Jeong J K, Jeong J H, Yang H W, Park J, Mo Y G andKim H D 2008 High performance thin film transistors withcosputtered amorphous indium gallium zinc oxide channelAppl. Phys. Lett. 91 113505

[10] Choi B D 2009 Line-time extension driving method withimage quality enhancement for LCD monitors and TVsIEEE Trans. Consum. Electron. 50 2257

[11] Jeong J K 2013 Photo-bias instability of metal oxide thin filmtransistors for advanced active matrix displays J. Mater. Res.28 2071

[12] Fortunato E, Barquinha P and Martins R 2012 Oxidesemiconductor thin-film transistors: a review of recentadvances Adv. Mater. 24 2945

[13] Park J S, Maeng W J, Kim H S and Park J S 2012 Review ofrecent developments in amorphous oxide semiconductorthin-film transistor devices Thin Solid Films 520 1679

[14] Jeong J K 2011 The status and perspectives of metal oxidethin film transistors for active matrix displays Semicond. Sci.Technol. 26 034008

[15] Kim S J, Yoon S and Kim H J 2014 Review of solution-processed oxide thin-film transistors Japan. J. Appl. Phys.53 02BA02

[16] Tahar R B H, Ban T, Ohya Y and Takahashi Y 1998 Tindoped indium oxide thin films: electrical properties J. Appl.Phys. 83 2631

[17] Ellmer K 2001 Resistivity of polycrystalline zinc oxide films:current status and physical limit J. Phys. D: Appl. Phys.34 3097

[18] Van de Walle C G 2000 Hydrogen as a cause of doping inzinc oxide Phys. Rev. Lett. 85 1012

[19] Bellingham J R, Philips W A and Adkins C J 1991Amorphous indium oxide Thin Solid Films 195 23

[20] Hosono H 2006 Ionic amorphous oxide semiconductor:material design, carrier transport, and device applicationJ. Non-Cryst. Solids 352 851

[21] Hoffman R L, Norris B J and Wager J F 2003 ZnO-basedtransparent thin-film transistors Appl. Phys. Lett. 82 733

[22] Nishii J et al 2003 Japan. J. Appl. Phys. 42 L347[23] Fortunato E M C, Barquinha P M C, Pimentel A C M B G,

Goncalves A M F, Marques A J S, Martins R F P andPereira L M N 2004 Wide-bandgap high-mobility ZnO thin-film transistors produced at room temperature Appl. Phys.Lett. 85 2541

[24] Fortunato E M C, Barquinha P M C, Pimentel A C M B G,Goncalves A M F, Marques A J S, Pereira L M N andMartins R F P 2005 Fully transparent ZnO thin-filmtransistor produced at room temperature Adv. Mater.17 590

[25] Morris B J, Anderson J, Wager J F and Keszler D F 2003Spin-coated zinc oxide transparent transistors J. Phys. D:Appl. Phys. 36 L105

[26] Hwang C S, Park S H K, Oh H, Ryu M K, Cho K I andYoon S M 2014 Vertical channel ZnO thin-film transistorsusing an atomic layer deposition method IEEE Electron.Device Lett. 35 360

[27] Yun H J, Kim Y S, Jeong K S, Kim Y M, Yang S D,Lee H D and Lee G W 2014 Analysis of stabilityimprovement in ZnO thin film transistor with dual-gate

Figure 17. (a) Image of a 9.9 inch AMOLED panel driven by self-aligned coplanar IGZO TFTs. Reproduced with permission from[86]. (b) Image of a 13.3 inch AMOLED panel driven by self-aligned coplanar IGZO TFTs. Reproduced with permissionfrom [93].

14

Semicond. Sci. Technol. 30 (2015) 024002 J Yeon Kwon and J Kyeong Jeong

structure under negative bias stress Japan. J. Appl. Phys. 5304EF11

[28] Nomura K, Ohta H, Ueda K, Kamiya T, Hirano M andHosono H 2003 Thin-film transistor fabricated in single-crystalline transparent oxide semiconductor Science300 1269

[29] Wang L, Yoon M, Lu G, Yang Y, Facchetti A and Marks T J2006 High-performance transparent inorganic/organichybrid thin-film n-type transistors Nat. Mater. 5 893

[30] Minami T, Kakumu T and Takata S 1996 Preparation oftransparent and conductive In2O3–ZnO films by radiofrequency magnetron sputtering J. Vac. Sci. Technol. A14 1706

[31] Yaglioglu B, Yeom H Y, Beresford R and Paine D C 2006High-mobility amorphous In2O3–10 wt%ZnO thin filmtransistors Appl. Phys. Lett. 89 062103

[32] Song J I, Park J S, Kim H, Heo Y W, Lee J H, Kim J J,Kim G M and Choi B D 2007 Transparent amorphousindium zinc oxide thin-film transistors fabricated at roomtemperature Appl. Phys. Lett. 90 022106

[33] Banger K K, Yamashita Y, Mori K, Peterson R L,Leedham T, Rickard J and Sirringhaus H 2011 Low-temperature, high-performance solution-processed metaloxide thin-film transistors formed by a ‘sol–gel on chip’process Nat. Mater. 10 45

[34] Fortunato E, Barquinha P, Pimentel A, Pereira L,Goncalves G and Martins R 2007 Amorphous IZO TTFTswith saturation mobilities exceeding 100 cm2 Vs−1 Phys.Status Solid RRL 1 R34

[35] Park S Y et al 2013 Improvement in photo-bias stability ofhigh-mobility indium zinc oxide thin-film transistors byoxygen high-pressure annealing IEEE Electron. Device Lett.34 894

[36] Oh S J, Han C J, Kim J W, Kim Y H, Park S K, Han J I,Kang J W and Oh M S 2011 Improving the electricalproperties of zinc tin oxide thin film transistors usingatmospheric plasma treatment Electrochem. Solid-State Lett.14 H354

[37] Heo J Y, Kim S B and Gorden R G 2012 Atomic layerdeposited zinc tin oxide channel for amorphous oxide thinfilm transistors Appl. Phys. Lett. 101 113507

[38] Cheong W S, Shin J H, Chung S M, Hwang C S, Lee J M andLee J H 2012 Current stress induced electrical instability intransparent zinc tin oxide thin-film transistors J. Nanosci.Nanotechnology 12 3421

[39] Kim Y H, Han J I and Park S K 2012 Effect of zinc/tincomposition ratio on the operational stability of solution-processed zinc–tin–oxide thin-film transistors IEEEElectron. Device Lett. 33 50

[40] Zhao Y, Duan L, Dong G, Zhang D, Qiao J, Wang L andQiu Y 2012 High-performance transistors based on zinc tinoxides by single spin-coating process Langmuir 29 151

[41] Rajachidambaram M S, Pandey A, Vilayurganapathy S,Nachimuthu P, Thevuthasan S and Herman G S 2013Improved stability of amorphous zinc tin oxide thin filmtransistors using molecular passivation Appl. Phys. Lett. 103171602

[42] Ha T J and Dodabalapur A 2013 Photo stability of solution-processed low-voltage high mobility zinc-tin-oxide/ZrO2

thin-film transistors for transparent display applicationsAppl. Phys. Lett. 102 123506

[43] Triska J, Conley J F, Presley R and Wager J F 2010 Biasstress stability of zinc-tin-oxide thin-film transistors withAl2O3 gate dielectrics. J. Vac. Sci. Technol. 28 C5I1

[44] Kamiya T, Nomura K and Hosono H 2009 Electronicstructures above mobility edges in crystalline andamorphous In-Ga-Zn-O: percolation conduction examinedby analytical model J. Disp. Technol. 5 462

[45] Kim C J et al 2009 Amorphous hafnium-indium-zinc oxidesemiconductor thin film transistors Appl. Phys. Lett. 95252103

[46] Kwon J Y et al 2010 The impact of gate dielectric materialson the light-induced bias instability in Hf–In–Zn–O thin filmtransistor Appl. Phys. Lett. 97 18350

[47] Park J S et al 2010 High-performance and stable transparentHf–In–Zn–O thin-film transistors with a double-etch-stopperlayer IEEE Electron. Device Lett. 31 1248

[48] Park J S, Kim K S, Par Y G, Mo Y G, Kim H D and Jeong J K2009 Novel ZrInZnO thin-film transistor with excellentstability Adv. Mater. 21 329

[49] Chong H Y, Han K W, No Y S and Kim T W 2011 Effect ofthe Ti molar ratio on the electrical characteristics oftitanium-indium-zincoxide thin-film transistors fabricated byusing a solution process Appl. Phys. Lett. 99 161908

[50] Do J C, Ahn C H, Cho H K and Lee H S 2012 Effect of Tiaddition on the characteristics of titanium-zinc-tin-oxidethin-film transistors film transistors fabricated via a solutionprocess J. Phys. D: Appl. Phys. 45 225103

[51] Park S M, Lee D H, Lim Y S, Kim D K and Yi M S 2013Effect of aluminum addition to solution-derived amorphousindium zinc oxide thin film for an oxide thin film transistorMicroelectron. Eng. 109 189

[52] Cho D H, Yang S, Byun C, Shin J, Ryu M K, Park S H K,Hwang C S, Chung S M, Cheong W S, Yoon S M andChu H 2008 Transparent Al-Zn-Sn-O thin film transistorsprepared at low temperature Appl. Phys. Lett. 93 142111

[53] Lan L, Xiong N, Xiao P, Li M, Xu H, Yao R, Wen S andPeng J 2013 Enhancement of bias and illumination stabilityin thin-film transistors by doping InZnO with wide-band-gapTa2O5 Appl. Phys. Lett. 102 242102

[54] Banger K K, Peterson R L, Mori K, Yamashita Y,Leedham T and Sirringhaus H 2013 High performance, lowtemperature solution-processed barium and strontium dopedoxide thin film transistors Chem. Mater. 26 1195

[55] Choi Y R, Kim G H, Jeong W H, Bae J H, Kim H J,Hong J M and Yu J W 2010 Carrier-suppressing effect ofscandium in InZnO systems for solution-processed thin filmtransistors Appl. Phys. Lett. 97 162102

[56] Kim G H, Jeong W H, Ahn B D, Shin H S, Kim H J,Ryu M K, Park K B, Seon J B and Lee S Y 2010Investigation of the effects of Mg incorporation into InZnOfor high-performance and high-stability solution-processedthin film transistors Appl. Phys. Lett. 96 163506

[57] Park J C, Kim S W, Kim C J and Lee H N 2012 Low-temperature fabrication and characteristics of lanthanumindium zinc oxide thin-film transistors IEEE Electron.Device Lett. 33 685

[58] Park J C, Kim S W, Kim C J and Lee H N 2012 The effects ofgadolinium incorporation into indium-zinc-oxide thin-filmtransistors IEEE Electron. Device Lett. 33 809

[59] Ryu M K, Yang S, Park S H K, Hwang C S and Jeong J K2009 High performance thin film transistor with cosputteredamorphous Zn-In-Sn-O channel: combinatorial approachAppl. Phys. Lett. 95 072104

[60] Saji K J, Jayaraj M K, Nomura K, Kamiya T and Hosono H2008 Optical and carrier transport properties of cosputteredZn-In-Sn-O films and their application to TFTsJ. Electrochem. Soc. 155 H390

[61] Song J H, Kim K S, Mo Y G, Choi R and Jeong J K 2014Achieving high field-effect mobility exceeding 50 cm2 Vs−1

in In-Zn-Sn-O thin-film transistor IEEE Electron. DeviceLett. 35 853

[62] Ye Y, Lim R and White J M 2009 High mobility amorphouszinc oxynitride semiconductor material for thin filmtransistors J. Appl. Phys. 106 074512

15

Semicond. Sci. Technol. 30 (2015) 024002 J Yeon Kwon and J Kyeong Jeong

[63] Kim H S et al 2013 Anion control as a strategy to achievehigh-mobility and high-stability oxide thin-film transistorsSci. Rep. 3 1459

[64] Kim S I, Kim C J, Park J C, Song I, Kim S W, Yin H, Lee E,Lee J C and Park Y 2008 High performance oxide thin filmtransistors with double active layers IEDM Tech. Dig. 173–6

[65] Chong E, Jeon Y W, Chun Y S, Kim D H and Lee S Y 2011Localization effect of a current-path in amorphous In-Ga-Zn-O thin film transistors with a highly doped buried-layerThin Solid Films 519 4347

[66] Park J C, Kim S, Kim S, Kim C, Song I, Park Y, Jung U,Kim D H and Lee J 2010 Highly stable transparentamorphous oxide semiconductor thin-film transistors havingdouble-stacked active layers Adv. Mater. 22 5512

[67] Kim J et al 2011 Improvement in both mobility and biasstability of ZnSnO transistors by inserting ultra-thin InSnOlayer at the gate insulator/channel interface Appl. Phys. Lett.99 122102

[68] Kim H et al 2012 Density of states-based design of metaloxide thin-film transistors for high mobility and superiorphotostability ACS Appl. Mater. Interfaces 4 5416

[69] Jung H Y, Kang Y, Hwang A Y, Lee C K, Han S, Kim D,Bae J, Shin W and Jeong J K 2014 Origin of the improvedmobility and photo-bias stability in a double-channel metaloxide transistor Sci. Rep. 4 3765

[70] Wang S L, Yu J W, Yeh P C, Kuo H W, Peng L H,Fedyanin A A, Mishina E D and Sigov A S 2012 Highmobility thin film transistors with indium oxide/galliumoxide bi-layer structures Appl. Phys. Lett. 100 063506

[71] Ahn C H, Senthil K, Cho H K and Lee S Y 2013 Artificialsemiconductor/insulator superlattice channel structure forhigh-performance oxide thin-film transistors Sci. Rep.3 2737

[72] Liu X, Wang C, Cai B, Xiao X, Guo S, Fan Z, Li J,Duan X and Liao L 2012 Rational design of amorphousindium zinc oxide/carbon nanotube hybrid film for uniqueperformance transistor Nano Lett. 12 3596

[73] Zan H W, Tsai W W, Chen C H and Tsai C C 2011 Effectivemobility enhancement by using nanometer dot doping inamorphous IGZO thin-film transistors Adv. Mater. 23 4237

[74] Zan H, Yeh c.c., Meng H F, Tsai c.c. and Chen L H 2012Achieving high field-effect mobility in amorphous indium-gallium-zinc oxide by capping a strong reduction layer Adv.Mater. 24 3509

[75] Olziersky A, Barquinha P, Vila A, Pereira L, Goncalves G,Fortunato E, Martins R and Morante J R 2010 Insight on theSU-8 resist as passivation layer for transparent Ga2O3-In2O3-ZnO thin-film transistors J. Appl. Phys. 108 064505

[76] Jeong J K, Yang H W, Jeong J H, Mo Y G and Kim H D 2008Origin of threshold voltage instability in indium-gallium-zinc oxide thin film transistors Appl. Phys. Lett. 93 123508

[77] Kwon J Y et al 2008 Bottom-gate gallium indium zinc oxidethin-film transistor array for high resolution AMOLEDdisplay IEEE Electron. Device Lett. 29 1309

[78] Park J et al 2008 High-performance amorphous galliumindium zinc oxide thin-film transistors through N2O plasmapassivation Appl. Phys. Lett. 93 053505

[79] Park J C, Ahn S E and Lee H N 2013 High-performance low-cost back-channel-etch amorphous gallium-indium-zincoxide thin-film transistors by curing and passivation of thedamaged back channel ACS Appl. Mater. Interfaces 5 12262

[80] Ryu S H, Park Y C, Mativenga M, Kang D H and Jin J 2012Amorphous-InGaZnO4 thin-film transistors with damage-free back channel wet-etch process ECS Solid State Lett.1 Q17

[81] Xu H., Lan L, Xu M, Zou J, Wang L, Wang D and Peng J2011 High performance indium-zinc-oxide thin-film

transistors fabricated with a back-channel-etch-techniqueAppl. Phys. Lett. 99 253501

[82] Luo D, Li M, Xu M, Pang J, Zhang Y, Wang L, Tao H,Wang L, Zou J and Peng J 2014 Highly stable amorphousindium-zinc-oxide thin-film transistors with back-channelwet-etch process Physica Status Solidi RRL 8 1176

[83] Luo D, Xu H., Li M, Tao H, Wang L, Peng J and Xu M 2014Effect of etching residue on positive shift of thresholdvoltage in amorphous inium-zinc-oxide thin-film transistorsbased on back-channel-etch structure IEEE Trans. Electron.Device Lett. 61 92

[84] Kwon J et al 2010 The impact of device configuration on thephoton-enhanced negative bias thermal instability of GaInZnOthin film transistors Electrochem. Solid-State Lett. 13 H213

[85] Suzuki K 1987 Compensative addressing for switchingdistortion in an a-Si TFT LCD Proc. Eurodisp. 107

[86] Morosawa N, Ohshima Y, Morooka M, Arai T and Sasaoka T2011 A novel self-aligned top-gate oxide TFT for AM-OLED displays Soc. Inf. Disp. Int. Dig. Tech. Pap. 42 479

[87] Kim M, Jeong J H, Lee H J, Ahn T K, Shin H S, Park J S,Jeong J K, Mo Y G and Kim H D 2007 High mobilitybottom gate InGaZnO thin-film transistors with SiOx etchstopper Appl. Phys. Lett. 90 4212114

[88] Jeong J K, Chung H J, Mo Y G and Kim H D 2008Comprehensive studies on the transport mechanism ofamorphous InGaZnO transistors J. Electrochem. Soc.155 H873

[89] Wu C H, Hsieh H H, Chien C W and Wu c.c. 2009 Self-aligned top-gate coplanar In-Ga-Zn-O thin-film transistorsJ. Disp. Technol. 5 515

[90] Kang D H, Kang I, Ryu S H and Jang J 2011 Self-alignedcoplanar a-IGZO TFTs and application to high-speed circuitIEEE Electron. Devices Lett. 32 1385

[91] Kim W, Park J C, Kim C J, Song I H, Kim S I, Park S H,Yin H, Lee H I, Lee E H and Park Y S 2009 Source/drainformation of self-aligned top-gate amorphous GaInZnO thin-film transistors by NH3 plasma treatment IEEE Electron.Device Lett. 30 374

[92] Park J C, Lee H N and Im S 2013 Self-aligned top-gateamorphous indium zinc oxide thin-film transistors exceedinglow-temperature poly-Si transistor performance ACS Appl.Mater. Interfaces 5 6990

[93] Bae J U, Kim D H, Kim K, Jung K, Shin W, Kang I andYeo S 2013 Development of oxide TFT’s structures Soc. Inf.Disp. Int. Dig. Tech. Pap. 44 89

[94] Jeong J, Lee G J, Kim J and Choi B 2012 Electricalcharacterization of a-InGaZnO thin-film transistors with Cusource/drain electrodes Appl. Phys. Lett. 100 112109

[95] Yim J, Jung S, Yeon H, Kwon J., Lee Y, Lee J and Joo Y2012 Effect of metal electrode on the electrical performanceof amorphous In-Ga-Zn-O thin film transistor Japan. J.Appl. Phys. 51 011401

[96] Tai Y, Chiu H and Chou L 2012 The deterioration of a-IGZOTFTs owing to the copper diffusion after the process of thesource/drain metal formation J. Electrochem. Soc. 159 J200

[97] Kanicki J 1988 Contact resistance to undoped andphosphorus-doped hydrogenated amorphous silicon filmsAppl. Phys. Lett. 53 1943

[98] Lee C, Park S Y, Jung H Y, Lee C, Son B, Kim H J, Lee Y,Joo Y and Jeong J K 2013 High performance Zn-Sn-O thinfilm transistors with Cu source/drain electrode Phys. StatusSolid RRL 7 485

[99] Yun P S and Koike J 2011 Metal reaction doping and ohmiccontact with Cu-Mn electrode on amorphous In-Ga-Zn-Osemiconductor J. Electrochem. Soc. 158 H1034

[100] Hino A, Maeda T, Morita S and Kugimiya T 2012 Facilitationof the four-mask process by the double-layered Ti/Si barriermetal for oxide semiconductor TFTs J. Inf. Disp. 13 61

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Semicond. Sci. Technol. 30 (2015) 024002 J Yeon Kwon and J Kyeong Jeong