predictive control of ac–ac modular

2832 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 59, NO. 7, JULY 2012

Predictive Control of AC–AC ModularMultilevel Converters

Marcelo A. Perez, Member, IEEE, Jose Rodriguez, Fellow, IEEE, Esteban J. Fuentes, and Felix Kammerer

Abstract—Multilevel converters can reach medium-voltageoperation increasing the efficiency of high-power applications.Among the existing multilevel converter topologies, the modu-lar multilevel converter (MMC) provides the advantages of highmodularity, availability, and high power quality. Moreover, themain advantage compared to cascaded multilevel converters isthe lack of an input transformer which results in a reduction ofcooling requirements, size, and cost. One of the drawbacks of thistopology when used as an ac–ac converter is the input and outputfrequency components in the control loop, resulting in a more com-plex controller design. In this paper, a single-phase ac–ac MMCpredictive control approach is proposed. The controller minimizesthe input, output, and circulating current errors and balances thedc voltages. Experimental results show the performance of theproposed predictive control scheme.

Index Terms—Modular multilevel converter (MMC), powerelectronics, predictive control.

I. INTRODUCTION

MULTILEVEL converters have been established as thestandard solution in high-power electrical drive ap-

plications [1], [2]. They provide high efficiency, availability,reliability, and a high power quality both in the load side andthe grid side [3].

Three multilevel converter topologies are available today inthe market: neutral point clamped [4], flying capacitor (FC) [5],and cascaded H-bridge (CHB) [6]. The last two converters, FCand CHB, are also called multicell converters because they arecomposed by several cells with identical power topology. Thisfeature allows the use of standard semiconductor devices andwell-known converter structures. One of the major drawbacksof the CHB converter is the requirement of isolated dc sourceswhich are obtained from several three-phase rectifiers and a

Manuscript received December 21, 2009; revised October 15, 2010,February 1, 2011, and May 10, 2011; accepted May 23, 2011. Date ofpublication June 13, 2011; date of current version February 17, 2012. Thiswork was supported in part by the Chilean Research Fund Comision Nacionalde Investigacion Cientifica y Tecnologica under Grant Fondecyt 11090253, bythe Basal Project FB0821 Centro Cientifico Tecnologico de Valparaiso, and bythe Universidad Tecnica Federico Santa Maria.

M. Perez and J. Rodriguez are with the Department of Electronics,Universidad Tecnica Federico Santa Maria, Valparaiso 110, Chile (e-mail:[email protected]; [email protected]).

E. Fuentes is with the Department of Electrical Drives and Power Elec-tronics, Technical University of Munich, 80333 Munich, Germany (e-mail:[email protected]).

F. Kammerer is with the Institute of Electrical Engineering (ETI),Karlsruhe Institute of Technology, 76187 Karlsruhe, Germany (e-mail: [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TIE.2011.2159349

multipulse transformer. Although this transformer could reducethe input current harmonics by a proper phase angle amongsecondary windings [7], [8], it usually requires a separatedcooling system, which increases the converter cost and size.

Recently, a multilevel converter topology based on cascadedmodular cells that do not require a multipulse transformer hasbeen proposed [9]. This topology, called the modular multilevelconverter (MMC), uses series-connected modular cells fed byfloating dc capacitors and can manage dc or ac input voltages,generating controlled output currents [10]. Applications of thiskind of converter in traction [11], HVDC [12], [13], powerquality [14], and high-power drives [9] have been reported.

One of the main challenges of the MMC control system is thesimultaneous control of the output currents, the generation of aproper input current reference to provide the power requiredby the load and also keep the dc voltages at the referencevalue, and the balance of the capacitor voltage among cells.Several control systems [15], [16] and modulation techniques[17], [18] have been developed for this converter, mainly basedon the linear control of the dc voltages and multicarrier modu-lations [19].

When a dc–ac operation is required, each cell of the MMC isjust a boost converter with a floating dc capacitor and no load.The currents in the branches are composed by a dc componentwhich can be controlled using a linear proportional-integral (PI)controller and a sinusoidal component which is generated bythe output loop control. Strategies based on logical functionsare used to balance the dc voltages [20]. If the converter worksin symmetric operation, it can be controlled by simply using alookup table [21] or even operated in an open loop [22].

The MMC could also be used as a direct ac–ac converterreplacing the boost converter in each power cell by an H-bridge.In this case, the source provides a single-phase ac voltage,and the MMC features similar characteristics with a directac–ac converter [23] or a matrix converter [24] providing three-phase voltages from an ac source. In ac–ac operation mode, thecurrent through the branches has no dc component but has twodifferent frequency components [11], increasing the complexityof the control system because linear PI controllers cannot bedirectly used.

Predictive control has been widely applied to power convert-ers [25], achieving high dynamic performance, simple imple-mentation, and high flexibility because it can include severalterms in the objective function [26], [27]. Moreover, this controldoes not require frequency transformations, being capable todirectly manage ac signals [28], [29]. Those features makepredictive control suitable to be applied to the MMC using asimple and straightforward implementation.

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PEREZ et al.: PREDICTIVE CONTROL OF AC–AC MODULAR MULTILEVEL CONVERTERS 2833

Fig. 1. MMC topology.

This paper proposes a predictive control of a single-phaseac–ac MMC which follows precisely the output and inputcurrent references and also balances the dc capacitor voltages.An outer PI controller is designed to control the averagevoltage value by generating the amplitude reference of theinput current. A steady-state analysis is performed in orderto obtain guidelines for the converter and controller design.Several approaches to control the dc voltages and circulatingcurrent are proposed and validated experimentally.

Although multilevel converters used in medium-voltage op-eration are usually three phased, this paper corresponds to a firstapproach to apply predictive control to the MMC, and also, thesingle-phase results can be directly compared to the previousliterature [20].

II. AC–AC MMC TOPOLOGY

The structure of the single-phase ac–ac MMC is shown inFig. 1. Each power cell is composed by an ac reactor, a single-phase H-bridge, and a floating dc capacitor. A total numberof 2N cells are connected in series to form an output phase,where the load is connected to the midpoints (a and b) andthe ac source is connected to the upper (p) and lower (n)nodes. As can be seen in Fig. 1, each phase has an upper and alower branch composed by N cells each. The input and outputcurrents are controlled by the combination of the upper andlower branch currents as shown in the next section.

A. Mathematical Modeling

To obtain the MMC model, all the power cells per branchare modeled as only one controllable voltage source vi in serieswith a reactor l which is the sum of all the inductances in thebranch and a parasitic resistance r which models the losses inthe reactors and power semiconductors. The model of a single-phase ac–ac MMC is shown in Fig. 2.

Considering the currents and the voltages in the branchesas i = [i1 i2 i3 i4]T and v = [v1 v2 v3 v4]T , respectively, thedynamic behavior of the system is described by

2ld

dti + Ai = Ivs + Bv. (1)

Fig. 2. MMC model.

Fig. 3. Current analysis in MMC. (a) Input current is. (b) Output current io.(c) Circulating current ic.

The matrices A and B are defined by

B =

⎡⎢⎣−1 − kl −1 + kl kl −kl

−1 + kl −1 − kl −kl kl

kl −kl −1 − kl −1 + kl

−kl kl −1 + kl −1 − kl

⎤⎥⎦ (2)

A =

⎡⎢⎣

kp kn 0 0kn kp 0 00 0 kp kn

0 0 kn kp

⎤⎥⎦ (3)

where

kl =l

2(l + Lo)

kp = r + 2kl(r + Ro) and kn = r − 2kl(r + Ro).

It is possible to define three currents flowing through theconverter which determine its complete behavior: the inputcurrent is, the output current io, and the circulating currentic. The branch currents are different combinations of thesethree currents as can be seen in Fig. 3. The input current isgiven by the sum of the current of the two upper or the twolower branches is = i1 + i3 = i2 + i4. The output current isthe difference between the upper branch and the lower branch ineach phase leg io = i1 − i2 = i4 − i3. The circulating currentcan be defined by

ic2

= i1 −io2− is

2= i1 −

i12

+i22− i1

2− i3

2

=i2 − i3

2. (4)

Using all the currents, it gives ic = i1 − i4 = i2 − i3.


Using the previous relationships and the model given in (1),it is possible to calculate the model of each current

ldisdt

+ ris = vs −12(v1+v2+ v3+v4) (5)

(l + Lo)diodt

+ (r + Ro)io =12(−v1 + v2 + v3 − v4) (6)

ldicdt

+ ric =12(−v1 − v2 + v3 + v4). (7)

Although circulating current does not appear in neither theinput nor the output current, as shown in Fig. 3, it increasesthe branch currents and, consequently, the losses, reducing alsothe controllability. The circulating current appears naturallycaused by parameter mismatch, switching transients, and dcvoltage fluctuations.

The branch controlled voltages vi are the sum of the outputvoltages of the N H-bridges connected in series

vi =N∑

j=1

sijvdcij i = 1 to 4 (8)

where sij ∈ {−1, 0, 1} is the switching function of the corre-sponding ij cell.

The dynamic behavior of each ij dc voltage is given by

Cdcd

dtvdcij +

1Rdc

vdcij = sijiii = 1 to 4j = 1 to N.

(9)

The H-bridge model uses a parasitic resistor Rdc in parallelwith the dc link capacitor to model losses and resistive sensors.

B. Steady-State Analysis

In order to give design guidelines to both the converterand control system, a steady-state analysis is performed in thecurrent section. This analysis is based on the single-phase ac–acMMC topology and considers a symmetric operation, a unitaryinput power factor, and no circulating currents in the branches(ic = 0).

The operating output current is defined as a sinusoidal cur-rent with amplitude Io and frequency ωo. The branch currentsto produce the required output current are

i1o,2o = ±Io

2sin(ωot) i3o = i2o, i4o = i1o. (10)

Similarly, considering a sinusoidal input current given byis = Is sin(ωst), the input current component in each branchis given by

i1s = i2s = i3s = i4s =Is

2sin(ωst). (11)

Therefore, the total branch currents are

i1,2 =Is

2sin(ωst) ±

Io

2sin(ωot) i3 = i2, i4 = i1. (12)

To calculate the branch voltages, the impedances at outputand input frequencies are required. These impedances are de-fined as follows: Zo = Ro + jωoLo is the load impedance at

output frequency, and zo = r + jωol and zs = r + jωsl are thebranch impedances at output and input frequencies, respec-tively. The output voltage can be calculated by vo = Zoio, andthe output frequency components of branch voltages in eachbranch are

v1o,2o = −zoi1o ∓ Zoio/2 v3o = v2o, v4o = v1o. (13)

The input frequency component of the branch voltages is

v1s = v2s = v3s = v4s = vs/2 − zsi1s (14)

where vs = Vs sin(ωst). Replacing the branch currents, thetotal branch voltages are

v1,2 =(Vs − Iszs)

2sin(ωst) ∓

Io(Zo + zo)2

sin(ωot) (15)

v3 = v2, and v4 = v1. The voltage in each branch is composedby components at input and output frequencies. The minimumamplitude of the required controlled voltage is calculated whenthe maximum values of both components are in phase

Vimin =Vs

2+

IoZo

2+

Iozo − Iszs

2. (16)

The H-bridge dc voltages must be designed to producea voltage higher than this limit. Considering each H-bridgeworking with equal dc voltages and the maximum amplitude ofthe fundamental component of the modulating signal sij = 1,the dc voltage in each cell must accomplish with

Vdc ≥ Vs

2N+

IoZo

2N+

Iozo − Iszs

2N. (17)

The operating condition of the MMC requires a constant dcvoltage. To achieve this voltage, the input current must fulfillthe power requirement of the load and compensate the lossesin the parasitic components. The mean power in the cascadedH-bridges is

Pi =12π

2π∫0

12π

2π∫0

vi(t)ii(t) dωst dωot

= VsIs − zsI2s − I2

o (Zo + zo). (18)

To keep a constant voltage in the dc links, the power in thevoltage source must be equal to the power dissipated in the dcparasitic resistance, and therefore, the power in the dc voltagesource is

V 2dc

Rdc=

1N

(VsIs − zsI

2s − I2

o (Zo + zo)). (19)

From the previous equation, the input current amplitude canbe calculated as

Is =Vs

2zs−

√(Vs

2zs

)2

− Zo + zo

zsI2o − 8NV 2

dc

zsRdc. (20)

There exists a quadratic relationship between the input cur-rent amplitude and the average dc voltages. A linear approxima-tion can be done in order to design an external PI control of the


dc voltages. If the circulating current is not zero, the previousrelationship is different in each branch, making the use of theinput current amplitude to control the average dc voltages andbalancing them difficult.

III. PREDICTIVE CONTROL OF MMC

Predictive control strategies work in discrete time, evaluatingin each sample time all the possible switching states of theconverter by using the MMC model obtained in the previoussections and selecting the switching state that minimizes a givenobjective function.

The control scheme of the MMC requires to manage theinput, output, and circulating currents and also keeps the dcvoltage balanced in each cell. To include all these objectivesin predictive control, a step-by-step algorithm is developed inthis section.

A. Input and Output Currents

The input and output currents can be directly controlled,including their errors in the cost function. As shown earlier, ineach sample time k, the branch voltages can be calculated as

vi(k) =N∑

j=1

sij(k)vdcij(k) i = 1 to 4. (21)

Using these voltages and the sampled input voltage vs(k),a first-order forward discrete approximation of the input andoutput current model is calculated using

is(k + 1) =(1 − h

r

l

)is(k) +

h

lvs(k)

− h

2l(v1(k) + v2(k) + v3(k) + v4(k)) (22)

io(k + 1) =(

1 − hr + Ro

l + Lo

)io(k)

− h

2l(v1(k) − v2(k) − v3(k) + v4(k)) . (23)

The input–output current cost function is

g1 =(isref (k+1)−is(k+1))2+ko (ioref (k+1)−io(k+1))2

(24)

where ioref and ioref are the current references and ko is aweighting factor for the output current.

B. Circulating Current Minimization

The circulating current needs to be minimized in order toreduce the branch losses and ensure a proper control of theaverage dc voltages.

The discrete model of the circulating current is

ic(k + 1) =(1 − h

r

l

)ic(k)

− h

2l(v1(k) + v2(k) − v3(k) − v4(k)) . (25)

Adding the circulating current into the cost function, itbecomes

g2 = g1 + kc (ic(k + 1))2 (26)

where kc is the weighting factor for the circulating current.

C. Reduced Subset of Switching States

Each cell can generate three possible states (1, 0, and −1);therefore, considering a total of eight cells, i.e., two cells perbranch, the number of possible states to be evaluated in thepredictive algorithm is nsw = 38 = 6561. This large number ofswitching states increases the processing time.

A reduced subset of allowable switching states can be appliedconsidering equal dc voltages. In this case, the switching statesthat accomplish with

N∑j=1

s1j + s2j − s3j − s4j = 0 (27)

do not affect the calculation of the circulating current becausethey produce ic = 0. Additionally, when the redundancies ineach branch are considered, the number of allowable switchingstates is nswr = 361. Hence, the algorithm requires to evaluatethe current models only in the allowable switching states,greatly reducing the processing time.

D. DC Voltage Control

The dc voltage control strategy is separated into two stages:balancing control and average control. The first stage is imple-mented in the predictive control algorithm using the model ofthe dc voltages and adding another term to the cost function.The second stage is implemented outside the predictive algo-rithm by a linear PI controller which acts over the average volt-age error, generating the appropriated input current amplitude.

1) Predictive Control of DC Voltage Distribution: The volt-age distribution is controlled using the discrete model of eachdc voltage given by

vdcij(k+1)=(

1 − h

CdcRdc

)vdcij(k)+

h

Cdcsij(k)ii(k)

(28)

for i = 1 to 4 and j = 1 to N . Adding this term to the costfunction

g = g2 + kv

4∑i=1

(vdcrefb(k) − vi(k))2

where vdcrefb is the balancing voltage reference and kv is thevoltage weighting factor. The last term of the cost functionevaluates the weighted variance of the dc voltages. The voltagereference is calculated as the average value of the dc voltages atinstant k using

vdcrefb(k) =1N

N∑j=1

vdcj(k). (29)


Fig. 4. Control scheme of the single-phase ac–ac MMC.

TABLE IEXPERIMENTAL SETUP PARAMETERS

It is worth to note that no dc voltage reference is requiredfrom outside the predictive algorithm.

2) Control of Average DC Voltage: The reference of theinput current amplitude must be adjusted to match the inputpower with the power required by the load and parasitic effectsin order to keep the dc capacitor voltages at the reference level.The outer control loop adjusts this amplitude using a linear PIcontroller

Isref (s) = kτs + 1

s(vdcrefa(s) − vdcrefb(s)) . (30)

The current amplitude reference is multiplied by the nor-malized input voltage to generate a sinusoidal in-phase inputcurrent reference to feed the predictive algorithm

isref = Isrefvs

Vs. (31)

The complete control scheme is shown in Fig. 4.

IV. EXPERIMENTAL RESULTS

In this section, experimental waveforms that show the perfor-mance of the proposed control are given. In Table I are shownthe parameters of the experimental setup.

A. Setup Description

The experimental setup of the single-phase ac–ac MMC iscomposed by eight cells. Each cell includes the H-bridge, inputreactor, dc capacitor, and measurements as shown in Fig. 5.

The control algorithm is implemented on a Spartan-3EStarter Kit Board with an XC3S1600E field programmable

Fig. 5. Picture of the MMC setup.

Fig. 6. Flow diagram of the predictive control algorithm.

gate array using a 50-MHz clock. Fig. 6 presents a flow dia-gram of the complete algorithm which is implemented usinga state machine structure. The algorithm applies the optimalstate calculated in the previous sample time, performs the dataacquisition, calculates the PI and phase-locked loop (PLL)routines, and enters the optimization cycle. During this cycle,the algorithm evaluates the next step model xp based on theactual measurements x and the jth switching state sj andthen evaluates the cost function g for the reduced set of 361switching states, selecting the switching state that minimizesthe cost function to be applied in the next sample time.

A total of 14 measurements (ten voltages and four currents)are performed at each sampling time and converted to a 12-bdigital format using high-speed AD7322 analog to digitalconverter (ADC). Each optimization cycle shown in Fig. 6takes four clock cycles, and the complete algorithm takes1616 clock cycles, i.e., 32.32 μs, which gives an equivalentsampling frequency of approximately 31 kHz. The completealgorithm, including the ADC driver, has been implemented inVerilog.

B. Experimental Results

The experimental test consists on a step change of the outputcurrent reference from a magnitude of 0.9 A at 90 Hz to 0.4 A at60 Hz and vice versa. These changes are continuously repeatedto simplify the waveform capture.


Fig. 7. Output current dynamical response. (a) Output current and its refer-ence. (b) Zoom to the step change.

Fig. 8. (a) Input current and reference. (b) Input current amplitude reference.

The output current and its reference are shown in Fig. 7.The current follows precisely the current reference as shown inFig. 7(a), achieving a high dynamic response of approximately1 ms as shown in detail in Fig. 7(b).

On the other hand, the input current also follows its refer-ence as shown in Fig. 8(a). The external PI controller designmust take into account the compromise between the dynamicalresponse of the voltages and the ripple generated in the currentamplitude. In this case, the current amplitude reference isshown in Fig. 8(b) where a dynamical response of 100 ms isachieved, but a small ripple can be seen. It is worth to note thatthe input current is always in phase with the input voltage as canbe seen in Fig. 9(a). The spectra of the input voltage and currentfor both conditions are shown in Fig. 9(b) and (c), respectively.Both figures show the fundamental component at 50 Hz and avery small amount of fifth harmonic in the voltage.

The load voltage and current are shown in Fig. 10(a). Thevoltage waveform has a peak value of 80 V which correspondsto the sum of all the dc voltages in one phase. The spectraof load voltage and current for both operating conditions areshown in Fig. 10(b) and (c), respectively. In both cases, thefundamental component is located at the frequency references

Fig. 9. Input voltage and input current.

Fig. 10. Load voltage and current.

of 90 and 60 Hz, respectively. In Fig. 10(d), an extendedspectrum of the output voltage is shown where two groups ofharmonic components appear at 2.5 and 4.5 kHz.

As expected, branch currents have two frequency compo-nents given by the input and output frequencies. The branchcurrent i1 is shown in Fig. 11(a) during the step change. InFig. 11(b), before the step change, the frequency componentsare in 50 and 90 Hz, and in Fig. 11(c), the branch current afterthe step change shows two frequency components at 50 and60 Hz.

The dc voltages of the first cells in branches 1 and 2 areshown in Fig. 12. The average value of these voltages is kept


Fig. 11. Branch current i1. (a) During the step change. (b) Frequency spec-trum before the change. (c) Frequency spectrum after the change.

Fig. 12. DC voltages of cells 11 and 12.

Fig. 13. Circulating current.

constant at 20 V; however, a ripple component, which dependsmainly on the output current, is also present.

Finally, the circulating current using the proposed reducedset of inputs is shown in Fig. 13. It presents a mean value ofzero and an average ripple of 0.025 A. The circulating currentwithout the reduced set is not implemented due to lack ofprocessing capability.

V. CONCLUSION

A predictive control scheme to be applied to the single-phase ac–ac MMC is proposed in this paper. Discrete modelsof the input, output, and circulating current are developed.The proposed predictive control algorithm uses a cost functionwhich includes error terms related to the input, output, andcirculating currents and also the dc voltage balance. As thisapproach uses the information of the complete converter, thereference tracking can be improved, particularly the voltagebalancing, compared to the existing approaches.

The proposed algorithm also features high flexibility becauseit can be directly applied to ac–ac MMC configuration wherelinear controllers will produce phase and amplitude errors inthe steady state.

The average dc voltage control loop is performed using alinear PI controller which gives the input current reference. Thislinear controller is designed taking into account the compro-mise between the dynamic response of the dc voltages and theinput current distortion.

The developed algorithm has a simple implementation andcould be used in standard digital controller platforms. Addition-ally, to improve the online digital implementation, a reducedsubset of the switching states is used, reducing drastically theprocessing time.

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[26] P. Cortes, M. Kazmierkowski, R. Kennel, D. Quevedo, and J. Rodriguez,“Predictive control in power electronics and drives,” IEEE Trans. Ind.Electron., vol. 55, no. 12, pp. 4312–4324, Dec. 2008.

[27] K. Ahmed, A. Massoud, S. Finney, and B. Williams, “A modified station-ary reference frame-based predictive current control with zero steady-stateerror for LCL coupled inverter-based distributed generation systems,”IEEE Trans. Ind. Electron., vol. 58, no. 4, pp. 1359–1370, Apr. 2011.

[28] M. A. Perez, P. Cortes, and J. Rodriguez, “Predictive control algorithmtechnique for multilevel asymmetric cascaded H-bridge inverters,” IEEETrans. Ind. Electron., vol. 55, no. 12, pp. 4354–4361, Dec. 2008.

[29] P. Cortes, A. Wilson, S. Kouro, J. Rodriguez, and H. Abu-Rub, “Modelpredictive control of multilevel cascaded H-bridge inverters,” IEEE Trans.Ind. Electron., vol. 57, no. 8, pp. 2691–2699, Aug. 2010.

Marcelo A. Perez (M’07) was born in Concepcion,Chile, in 1976. He received the Engineer degree inelectronic engineering, the M.Sc. degree in electricalengineering, and the D.Sc. degree in electrical engi-neering from the University of Concepcion, Concep-cion, in 2000, 2003, and 2006, respectively.

From 2006 to 2009, he held a Postdoctoral po-sition at the Universidad Tecnica Federico SantaMaria, Valparaiso, Chile, conducting research in thearea of power converters. Since 2009, he has beenan Associate Researcher with the same institution.

His main research interests include the control of power converters, multilevelconverters, and HVDC systems.

Dr. Perez is the IEEE-Industrial Electronics Society Region 9 ChapterCoordinator.

Jose Rodriguez (M’81–SM’94–F’10) received theEngineer degree in electrical engineering fromthe Universidad Tecnica Federico Santa Maria,Valparaiso, Chile, in 1977, and the Dr. Ing. degreein electrical engineering from the University ofErlangen, Erlangen, Germany, in 1985.

Since 1977, he has been with the Departmentof Electronics Engineering, Universidad TecnicaFederico Santa Maria, where he is currently a FullProfessor and a Rector. He has coauthored morethan 250 journal and conference papers. His main

research interests include multilevel inverters, new converter topologies, controlof power converters, and adjustable-speed drives.

Dr. Rodriguez is a member of the Chilean Academy of Engineering and anAssociate Editor of the IEEE TRANSACTIONS ON POWER ELECTRONICS andthe IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS since 2002. Hewas the recipient of the Best Paper Award from the IEEE TRANSACTIONS ON

INDUSTRIAL ELECTRONICS in 2007 and the Best Paper Award from the IEEEINDUSTRIAL ELECTRONICS MAGAZINE in 2008.

Esteban J. Fuentes received the Engineer and M.Sc.degrees in electronic engineering from the TechnicalUniversity Federico Santa Maria, Valparaiso, Chile,in 2009. He has been working toward the Ph.D.degree in electronic engineering on control of powerdrives and mechatronic systems in the Departmentof Electrical Drives and Power Electronics,Technical University of Munich, Munich, Germany,since 2010.

Felix Kammerer was born in Schramberg,Germany, in 1982. He received the Dipl.Ing. (M.Sc.)degree from the Karlsruhe Institute of Technology(KIT), Karlsruhe, Germany, in 2010. Since 2010,he has been working as a Research Engineer at theInstitute of Electrical Engineering (ETI), KIT, toreceive the Ph.D. degree.

His research interests include power electronicsand electrical drives, particularly multilevel convert-ers and their corresponding control systems.

predictive control of ac–ac modular

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