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Page 1: Poster_STEM_Research

Carbon Nanotube-Based Nanoelectronic Devices and CircuitsXavier Crutcher, John Elike, Richard Hamnond, Joe’l Johnson, Jada Gray, Alishia Reynolds, and Meskerem Zergaw

M t D Zhi Xi d D S til i B d k

AAMU

Mentor: Dr. Zhigang Xiao and Dr. Satilmis BudakDepartment of Electrical Engineering and Computer Science, Alabama A&M University

GOALS1) To control the positioning and assembly of carbon

nanotubes using dielectropheresis technique.2) To implement Sb2Te3 and Bi2Te2Se semiconductor

MOTIVATION AND SIGNIFICANCE The fabrication of CNTFETs has been the subject of extensive research, but challenges remain. One of themajor problems is the control of the positioning and assembly of carbon nanotubes. Another main obstacle is the low yield of well performing devicesbecause currently there is no effective way to separate metallic carbon nanotubes, which shunt FET characteristics, from semiconducting tubes, whichare the active elements of the device.

2) To implement Sb2Te3 and Bi2Te2Se semiconductormaterials as the source and drain contact material inthe fabrication of carbon nanotube field-effecttransistors (CNTFETs) in order to improve theirelectrical properties such as drain-source current (IDS)on/off ratio and saturation.

To circumvent these problems, in this work dielectrophoresis has been used for the deposition and alignment of tubes, while semiconducting electrodeshave been employed to selectively turn off metallic nanotubes. The reason for this substitution resides in the current-blocking action produced by theback-to-back metal–semiconductor junctions formed at the interfaces between semiconducting electrodes and metallic nanotubes. This current-blockingaction electrically isolates metallic nanotubes and as a result improves the performance of the device.This novel fabrication process has general meaning, and could be employed in future wafer-scale CNTFET-based nanoelectronic circuits withsemiconductor contact materials.

APPROACHFl di f th

SWCNT powder(3 mg)

NMP(20 ml)

+

Dispersion

Ultrasonication (2 hrs)

Flow diagram of theessential steps in thedevice fabrication process.(a) Alignment of SWCNTsonto a pair of goldelectrodes viadielectrophoresis. (b)Removal of goldelectrodes by gold andchromium etchants (PRstands for photoresist). (c)Deposition of Sb Te or

Centrifuge(14000 rpm/30

min)

Flow chart for dispersion and purification of SWCNTs.

Deposition of Sb2Te3 orBi2Te2Se layer to contactSWCNTs, followed byphotoresist lift-off toremove deposited materialfrom the interelectroderegion. (d) Final deviceobtained after depositionof gate oxide andformation of metalcontacts.

SEM of SWNTs aligned onto apair of gold electrodes viadielectrophoresis.

SEM image of a CNTFET fabricated withSb2Te3-SWCNT source/drain contacts anda narrow gate defined by focused ion beamassisted deposited of platinum.

SEM micrograph of part of a CNTFET oscillator, which has been processed with onephoto mask and the electric field-directed dielectrophoresis (DEP) for the alignmentand deposition of carbon nanotubes (left) and enlarged view of a pair of goldelectrode with carbon nanotubes aligned between the gap (right).

RESULTS

Working principle of the CNTFETvalid for small VDS: (a) metallicSWCNTs are channel-off withoutapplied voltage; (b)semiconducting SWCNTs aregchannel-on without appliedpositive voltage; (c) metallicSWCNTs are channel-off withapplied positive voltage; (d)semiconducting SWCNTs arechannel-off with applied positivevoltage. At moderate VDS, themetallic SWCNTs still remainblocked since while onesemiconductor/SWCNT Schottkyjunction increases its conductance,

An inverter circuit consisting of ap-channel field-effect transistor(pFET) and a resistor (left);diagram symbol for an inverter

SEM micrograph of afabricated CNTFET-basedinverter. SEM micrograph of the

Transfer characteristics ofthe fabricated CNTFET-based inverter.

The IV characteristics of the Sb2Te3-SWCNTjunction diode. The dot is measurement resultsand the solid line is simulation results.

Drain-source current (IDS) versus drain-sourcevoltage (VDS) and gate voltage (VGS) for thefabricated CNTFET.

the other one remains at highimpedance.

AcknowledgementsThe authors thank National Science Foundation and Department of Homeland Security for financial support for this research.

(right).inverter. g p

CNTFET in the inverter andthe CNTs aligned betweenthe electrodes.