Upload File

port mapped i/o. port-mapped vs memory mapped io with memory mapped i/o accesses to peripherals look...

  • Home
  • Documents
  • Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire
44
Port Mapped I/O

Upload: jason-gray

Post on 12-Jan-2016

299 views

Category:

Documents


1 download

Report

Tags:

TRANSCRIPT

Page 1: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Port Mapped I/O

Page 2: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Port-Mapped vs Memory Mapped IO

With memory mapped I/O accesses to peripherals look like accesses tomemory.

With memory mapped I/O entire address bus needs to be decoded.

With memory mapped I/O no need for IOR* and IOW* signals

With memory mapped I/O no limit to number of peripherals other thansize of address bus.

With memory mapped I/O one can perform ALU ops directly on I/O datawithout transferring them to a register first.

With memory mapped I/O processor instruction decoder is simplerbecause you don’t have the IN and OUT instructions.

One problem with memory mapped I/O is that some of the address spaceis used by the I/O devices.

Conclusion: Memory mapped I/O reduces H/W within processor while port mapped I/O can reduce H/W on motherboard.

Page 3: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Port Example

Page 4: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Adding 8-bit Output Port Using 74LS373 Latch

Page 5: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Adding 8-bit Input Port Using 74LS244

Page 6: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

8255 PPI Chip Pinout

Page 7: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

8255 A, B, C Ports

8255 generally more flexible and more economical than using74LS373s and 74LS244s

A can be programmed as input or output port.It can also be an 8-bit bidirectional port.

B also can be programmed as in input or output port.It cannot be used as an 8-bit bi-directional port.

C can also be either an input or an output port.Can be be split into two 4 bit ports. Each 4 bit portcan be either an input or an output port.Also, bits of C port can be outputs and individually programmed.

Page 8: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

8255 Port Selection

Page 9: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

8255 Control Word

Page 10: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

8255 Mode selection

Page 11: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

PC I/O Address Map

Page 12: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Example 4-5

Page 13: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Example 4-6

Page 14: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Lab 4 (A8255.lst)

Page 15: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Lab 4 (d8255.lst)

Page 16: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

BSR Mode

Page 17: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

BSR Example 4.7

Page 18: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

BSR Example 4.8

Page 19: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Handshaking

Page 20: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Talking to a printer

Page 21: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

How the 8255 Ports are Used in a PC

Page 22: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Odd and Even Ports With 8255

Page 23: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Hi/Lo Copier

Page 24: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

I/O Bandwidth

Page 25: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

I/O Bandwidth (Slide 2)

Page 26: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Interfacing a DAC to 8255

Page 27: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Design of a Digital Thermometer

Page 28: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

LM34 Thermometer IC

Page 29: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

ADC804 Timing

Page 30: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Using C to Program the 8255

Page 31: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

LCD Pinout

Page 32: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

LCD Commands (Partial List)

Page 33: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Interfacing LCD Module to PC Using 8255 PPI Chip

Page 34: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Sending Commands to LCD Module

Page 35: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Writing Data and Commands Out to LCD Module (Timing Diagram)

Page 36: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Sending Data to the LCD Module

Page 37: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Full Listing of LCD Module Commands

Page 38: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Section 4.1 Problems

Page 39: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Section 4.2 Problems

Page 40: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Section 4.3 Problems

Page 41: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Section 4.4 Problems

Page 42: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Section 4.8 Problems

Page 43: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Section 4.8 Problems (Continued)

Page 44: Port Mapped I/O. Port-Mapped vs Memory Mapped IO With memory mapped I/O accesses to peripherals look like accesses to memory. With memory mapped I/O entire

Section 4.11 Problems


Linearizing Irregular Memory Accesses for Improved ...lin/papers/micro13.pdfLinearizing Irregular Memory Accesses for Improved Correlated Prefetching ... MICRO ’46, December 7-11,

Avalon Memory-Mapped Interface Specificationsedwards/classes/2007/4840/mnl_avalon_spec.pdf · Avalon Memory-Mapped Interface Specification 1. Introduction The Avalon Memory-Mapped

Optimizing Memory Accesses for Spatial Computation

Windows Memory Management, Memory- Mapped Files, and DLLs

Linux Memory Mapped System Call Performanceweb.cs.ucla.edu/honors/UPLOADS/kousha/thesis.pdf · Linux Memory Mapped System Call Performance Kousha Najafi Professor Eddie Kohler Steve

AXI Memory Mapped to Stream Mapper v1 - Xilinx · The function of the AXI Memory-Mapped to Stream Mapper IP (axi_mm2s_mapper) is to encapsulate AXI4 Memory-Mapped (AXI4-MM) transactions

trapt Syntactic Sugarcoating for Memory Mapped Registers « a3f

1. Memory Mapped Systems 2. Adding Unsigned Numbersece.eng.umanitoba.ca/undergraduate/ECE3610/LectureNotes/Lecture 9.pdf• Once a device is mapped into the memory space, when you

Avalon Memory-Mapped Interface Specification

Exploring the 64-bit Memory Mapped Arithmetic Unitcache.freescale.com/files/32bit/doc/app_note/AN5189.pdf?fpsp=1&WT_TYPE... · Exploring the 64-bit Memory Mapped Arithmetic Unit,

Handling Memory Accesses in Big Data Environment · Professor Uri Weiser Technion Haifa, Israel Handling Memory Accesses in Big Data Environment Chipex 2016 The talk covers research

Interfacing with I/O Devices. CEG 320/520Interfacing with I/O devices2 Overview Memory mapped vs programmatic I/O Organization of a memory mapped I/O

Appendix C Memory Hierarchy. Why care about memory hierarchies? Processor-Memory Performance Gap Growing Major source of stall cycles: memory accesses

Efficient Optimization of Memory Accesses in Parallel Programsvs3/PDF/rajbarik_thesis.pdf · Efficient Optimization of Memory Accesses in Parallel Programs by Rajkishore Barik The

Generating a software loop with memory accesses

Memory Mapped i

GPU Optimization Fundamentalscs475/Current_Semester/Lectures/GPU_Opt_Fund-CW1.pdfUse memory efficiently Coalesce global memory accesses ... Global memory throughput Shared memory access

Efficient Optimization of Memory Accesses in …vs3/PDF/rajbarik_thesis.pdfABSTRACT Efficient Optimization of Memory Accesses in Parallel Programs by Rajkishore Barik The power, frequency,

Profiling memory accesses on the ODROID-XU41154165/FULLTEXT01.pdf · Profiling memory accesses on the ODROID-XU4 Erik Österberg Decoupled Access-Execute(DAE) is an innovative approach

VAX/VMS Memory-mapped file processing

Optimizing Memory Accesses for Spatial Computation Mihai Budiu, Seth Goldstein CGO 2003

CSE 100: B-TREE · PDF fileCSE 100: B-TREE. Memory accesses

Avalon Memory-Mapped Design Optimizations · The Avalon® Memory-Mapped (Avalon-MM) system interconnect fabric is a flexible, partial crossbar fabric that connects master and slave

Experience Report: Memory Accesses for Avionic ... · Experience Report: Memory Accesses for Avionic Applications and Operating Systems on a Multi-Core Platform Andreas Lofwenmark¨

Implementing an LLVM based DBI framework · Use Cases • Finding memory bugs: • Track memory allocations / deallocations • Track memory accesses • Fuzzing: • Measure code

Unified Address Translation for Memory-Mapped SSDs with ... › ~jhuang95 › papers › flashmap-isca15.pdfSSD designed from scratch for memory-mapped SSD-files that combines these

Avalon Memory-Mapped Interface Specificationsedwards/classes/2009/4840/mnl... · 2008-02-06 · 1–12 Altera Corporation Avalon Memory-Mapped Interface Specification Courier type

Avalon Memory-Mapped Interface Specificationsedwards/classes/2008/4840/mnl...iv Altera Corporation Avalon Memory-Mapped Interface Specification May 2007 Table of Contents Wait-States

Extending SELinux to track memory-pages accesses · Extending SELinux to track memory-pages accesses Martin Peres, supervised by J er emy Bri aut ENSI de Bourges February 11, 2011

Memory Mapped IO Very Good

Memory-Mapped Transactionssupertech.csail.mit.edu/papers/Libxac.pdf · Memory-mapped transactions combine the advantages of both memory mapping and transactions to provide a programming

The Lightning Memory-Mapped Database (LMDB)

Software Prefetching for Indirect Memory Accesses: A

Tracing Privileged Memory Accesses to Discover Software

Xilinx AXI Memory-Mapped Protocol Specification