peakview em designer - lorentz solution

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Overview Lorentz Solution provides cutting edge electromagnetic solutions tailored to radio and high frequency semiconductor design. The PeakView EM Design Platform is the solution for synthesis and modeling of devices and circuitry where accuracy and performance are a must. PeakView EM Designer PeakView EMD™ provides EM device synthesis of advanced on-chip passive devices. Designers work with a friendly user interface while PeakView EMD eliminates the time consuming manual step of drawing devices by hand. PeakView EMD’s next-generation patented EM engine consistently delivers results closely correlated to silicon measurement for confidence that the design will operate according to specification. Device synthesis is based on PeakView’s extensible PCircuit™ device library allowing designers to work with the parameters of the device and the layout takes care of itself. PCircuit EM Device Synthesis The PCircuit library contains sophisticated parameterized devices including inductors, baluns, transformers, transmission lines, capacitors and more. PCircuits also support many options to these devices including power / ground shields, guard rings and via fills. The PCircuit library can be extended with object-oriented Python language for custom passive devices. PeakView EMD automatically produces all required views for the Cadence Virtuoso Platform including schematic symbols, DRC / LVS clean layouts, along with S-Parameter and Physics-Based simulation models. Physics-Based Models PeakView’s patent-pending Physics-Based Models (PBM) capture EM effects that other modeling techniques cannot. PBM delivers accuracy and performance during circuit simulation by preserving DC inductance and resistance in a compact RLCK model. Like other aspects of the PeakView Platform, PBM can be extended through the use of object-oriented Python for custom devices. Circuit and EM Co-Simulation As part of the tight integration to the Cadence Virtuoso environment, PeakView EMD also performs Circuit and EM PeakView ® EM Designer

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Page 1: PeakView EM Designer - Lorentz Solution

 

 

1

Overview

Lorentz Solution provides cutting edge electromagnetic

solutions tailored to radio and high frequency

semiconductor design.

The PeakView EM Design Platform is the solution for

synthesis and modeling of devices and circuitry where

accuracy and performance are a must.

PeakView EM Designer

PeakView EMD™ provides EM device synthesis of

advanced on-chip passive devices. Designers work with a

friendly user interface while PeakView EMD eliminates the

time consuming manual step of drawing devices by hand.

PeakView EMD’s next-generation patented EM engine

consistently delivers results closely correlated to silicon

measurement for confidence that the design will operate

according to specification.

Device synthesis is based on PeakView’s extensible

PCircuit™ device library allowing designers to work with

the parameters of the device and the layout takes care of

itself.

2

PCircuit EM Device Synthesis

The PCircuit library contains sophisticated parameterized

devices including inductors, baluns, transformers,

transmission lines, capacitors and more. PCircuits also

support many options to these devices including power /

ground shields, guard rings and via fills. The PCircuit

library can be extended with object-oriented Python

language for custom passive devices.

PeakView EMD automatically produces all

required views for the Cadence Virtuoso

Platform including schematic symbols, DRC

/ LVS clean layouts, along with S-Parameter

and Physics-Based simulation models.

Physics-Based Models

PeakView’s patent-pending Physics-Based

Models (PBM) capture EM effects that other

modeling techniques cannot. PBM delivers

accuracy and performance during circuit

simulation by preserving DC inductance

and resistance in a compact RLCK model.

Like other aspects of the PeakView

Platform, PBM can be extended through the

use of object-oriented Python for custom devices.

Circuit and EM Co-Simulation

As part of the tight integration to the Cadence Virtuoso

environment, PeakView EMD also performs Circuit and EM

PeakView® EM Designer

Page 2: PeakView EM Designer - Lorentz Solution

 

 

 

PeakView® EM Designer Co-Simulation driven from Virtuoso’s Analog Design

Environment (ADE). Designers work in ADE and PeakView

manages the EM simulations behind the scenes to provide

better circuit optimization and chip performance.

CMP Support for Advanced Processes

PeakView EMD helps overcome the sub-90nm challenges

of advanced processes including chemical-mechanical

polishing (CMP). PeakView EMD synthesis creates design

rule compliant devices with wide metal slotting, metal fill

and power / ground shielding and accurate EM

simulations.

Foundry Adopted and Qualified

Lorentz’ foundry customers use the PeakView Platform to

design RF/AMS processes and reference flows. PeakView is

TSMC MS/RF RDK 2.0/3.0 qualified and part of

GLOBALFOUNDRIES’ AMS reference flow development.

 

• Fastest Full-Wave EM Engine for Performance, Capacity and Accuracy

• Full-Wave EM Device Synthesis • Support for CMP • Parameterized EM Device

Libraries Extensible with Python • Patent-Pending Physics Based

Modeling • Circuit and EM Co-Simulation • Tight Integration into Cadence

5.x / 6.x / CDBA / OA • Built in Visualization System • Record / Playback and Python

Scripting for Batch Flows Examples of the complex devices PeakView EMD can synthesize based on

parameter changes in PCircuits.

Lorentz Solution, Inc. 2880 Lakeside Drive, Suite 130 Santa Clara CA 95054 408-922-0765 www.lorentzsolution.com Copyright © 2011 – All Rights Reserved

About Lorentz Solution Lorentz Solution supplies EDA products focused on cost-sensitive RF and high-speed semiconductors at advanced process nodes. The PeakView® EM Design Platform provides silicon predictability through high-accuracy EM-based synthesis, extraction and modeling. Integrated with industry standard EDA design and PDK platforms, PeakView removes barriers letting chip designers perform their own EM device design and circuit level EM verification for predictable circuit performance and reduced chip area.