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Parasitic Extraction. Luca Daniel University of California, Berkeley Massachusetts Institute of Technology with contributions from: Alessandra Nardi, University of California, Berkeley Joel Phillips, Cadence Berkeley Labs Jacob White, Massachusetts Instit. of Technology. Funct. Spec. RTL. - PowerPoint PPT Presentation

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  • Parasitic ExtractionLuca DanielUniversity of California, BerkeleyMassachusetts Institute of Technology

    with contributions from:Alessandra Nardi, University of California, BerkeleyJoel Phillips, Cadence Berkeley LabsJacob White, Massachusetts Instit. of Technology

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    Conventional Design Flow

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    Layout parasiticsWires are not ideal. Parasitics:ResistanceCapacitanceInductanceWhy do we care? Impact on delaynoiseenergy consumptionpower distributionPicture from Digital Integrated Circuits, Rabaey, Chandrakasan, Nikolic

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    Parasitic ExtractionParasitic Extractionthousands of wirese.g. critical pathe.g. gnd/vdd gridtens of circuitelements for gate level spice simulationidentify some portsproduce equivalent circuit that models response of wires at those ports

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    Parasitic Extraction (the two steps)

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    OverviewSetups of Parasitic Extraction ProblemsCapacitance Extraction (electrostatic)RL Extraction (MQS)Combined RLC Extraction (EMQS)Electromagnetic Interference Analysis (fullwave)Electromagnetic solvers classification (time vs. frequency, differential vs. integral)integral equation solvers in detailbasis functionsresidual minimization (collocation and Galerkin)linear system solutionfast matrix-vector productsExample: EMQS solutionConclusions

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    Capacitive ExtractionExample: Intel 0.25 micron Process5 metal layers Ti/Al - Cu/Ti/TiN Polysilicon dielectric.Taken from Digital Integrated Circuits, 2nd Edition, Rabaey, Chandrakasan, Nikolic

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    Capacitive ExtractionWhy? E.g. Analysis of Delay of Critical Path

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    Capacitance Extraction Why do we need it?

    Example: to produce RC tree network for elmore delay analysis

    Example: to produce RC tree network for capacitive cross-talk analysisR1C1sC3R31234i

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    Capacitance ExtractionProblem FormulationGiven a collection of N conductors (of any shape and dimension)Calculate the couplingcapacitance matrix C

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    Capacitance ExtractionSolution ProcedureFor i = 1 to N,apply one volt to conductor i and ground all the otherssolve the electrostatic problem and find the resulting vector of charges on all conductorsthat is the i-th column of the conductance matrix

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    OverviewSetups of Parasitic Extraction ProblemsCapacitance Extraction (electrostatic)RL Extraction (MQS)Combined RLC Extraction (EMQS)Electromagnetic Interference Analysis (fullwave)Electromagnetic solvers classification (time vs. frequency, differential vs. integral)integral equation solvers in detailbasis functionsresidual minimization (collocation and Galerkin)linear system solutionfast matrix-vector productsExample: EMQS solutionConclusions

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    Inductance and Resistance ExtractionExample: IC packagePicture Thanks to CoventorpackageICwirebondinglead frames

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    Inductance and Resistance ExtractionWhere do we need to account for inductance?chip to package and package to board connections are highly inductiveinductance can create Ldi/dt noise on the gnd/vdd networkinductance can limit communication bandwidthinductive coupling between leads or pins can introduce noiseICon-package decouplingcapacitorson-boarddecoupling capacitorspackagePCBpins or solder ballsfrom package to PCBwire bonding and lead framesor solder balls from IC to package

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    Inductance and Resistance Extraction Why also resistance? Skin and Proximity effectsproximity effect: opposite currents in nearby conductors attract each otherskin effect: high frequency currents crowd toward the surface of conductors

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    Inductance and Resistance ExtractionSkin and Proximity effects (cont.)Why do we care?Skin and proximity effects change interconnect resistance and inductancehence they affect performance (propagation delay)and noise (magnetic coupling)

    When do we care?frequency is high enough that wire width OR thickness are less than two skin-depthse.g. on PCB at and above 100MHze.g. on packages at above 1GHze.g. on-chip at and above 10GHznote. clock at 3GHz has significant harmonics at 10GHz!!

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    Inductance and Resistance ExtractionProblem FormulationGiven a collection of interconnected N wires of any shape and dimensionIdentify the M input portsPicture byM. ChouCalculate the MxM resistance and the inductance matrices for the ports, that is the real and immaginary part of the impedance matrix

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    Inductance and Resistance ExtractionSolution ProcedureTypically instead of calculating impendance we calculate the admittance matrix.For each pair of input terminals,apply a unit voltage source and solve magneto quasit-static problem (MQS) to calculate all terminal currentsthat is one column of the admittance matrix [R+jwL]-1

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    OverviewSetups of Parasitic Extraction ProblemsCapacitance Extraction (electrostatic)RL Extraction (MQS)Combined RLC Extraction (EMQS)Electromagnetic Interference Analysis (fullwave)Electromagnetic solvers classification (time vs. frequency, differential vs. integral)integral equation solvers in detailbasis functionsresidual minimization (collocation and Galerkin)linear system solutionfast matrix-vector productsExample: EMQS solutionConclusions

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    Combined RLC ExtractionExample: current distributions on powergridinput terminals

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    Combined RLC Extraction Example: analysis of resonances on powergrid* 3 proximity templates per cross-section- 20 non-uniform thin filaments per cross-section

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    Combined RLC ExtractionExtraction Example: analysis of substrate coupling

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    Combined RLC ExtractionExample: resonance of RF microinductorsAt frequency of operation the current flows in the spiral and creates magnetic energy storage (it works as an inductor: GOOD)Picture thanks to Univ. of PisaBut for higher frequencies the impedance of the parasitic capacitors is lower and current prefers to jump from wire to wire as displacement currents (it works as a capacitor: BAD)

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    Combined RLC ExtractionProblem FormulationGiven a collection of interconnected N wires of any shape and dimensionIdentify the M input portsPicture byM. ChouCalculate the MxM IMPEDANCE matrix for the ports, that is the real and immaginary part of the impedance matrix

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    Combined RLC ExtractionSolution ProcedureSame as RL extraction.Typically calculate admittance matrixFor each pair of input terminals,apply a unit voltage source and solve electro-magneto quasit-static problem (EMQS) to calculate all terminal currentsthat is one column of the admittance matrix [R+jwL]-1

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    OverviewSetups of Parasitic Extraction ProblemsCapacitance Extraction (electrostatic)RL Extraction (MQS)Combined RLC Extraction (EMQS)Electromagnetic Interference Analysis (fullwave)Electromagnetic solvers classification (time vs. frequency, differential vs. integral)integral equation solvers in detailbasis functionsresidual minimization (collocation and Galerkin)linear system solutionfast matrix-vector productsExample: EMQS solutionConclusions

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    The Electromagnetic Interference (EMI)Problem descriptionElectronic circuits produce and are subject to Electromagnetic Interference (EMI).in particular when wavelengths ~ wire lengths

    EMI is a problem because it can severely and randomly affect analog and digital circuit functionality!!!

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    EMI analysisEMI at board, package and IC levelTraces on PCB can pick up EMI and transmit it to ICs ICs can produce high frequency conducted emissions that can radiate from PCBs

    ICs themselves can directly produce radiated emissionshigh-frequency current loops Vdd-decap-gnd on package or inside ICs.high-frequency current loops inside IC (near future)IC radiation amplified by heat sinks!PCBPCBICICIC

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    EMI a problem for ICs design?So far: dimensions too small and wavelengths too largeTrend: larger chip dies and higher frequenciesFutures IC: clocks~ 3GHz harmonics~ 30GHz wavelengths ~ 1cm dimensions~ 1cm Todays PCB: clocks~ 300MHz harmonics~ 3GHz wavelengths ~ 10cm dimensions~ 10cmthis gives resonances on PCB today,hence it might on IC tomorrow!

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    EMI analysisSolution ProcedureTypically, EMI analysis is a two-step process:

    1) determine accurate current distributions on conductors

    2) calculate radiated fields from the current distributionsE

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    Need for full-board analysisInterconnect impedances depend on complicated return paths.

    Unbalanced currents generate most of the interference.

    Hence need FULL-BOARD analysis

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    Need for full-wave analysisCircuit dementions are not negligible compared to wavelengthcoupling NOT instantaneus,speed of light creates retardationNeed to solve FULLWAVE equations (same as for RLC extraction plus wave term)

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    OverviewSetups of Parasitic Extraction ProblemsCapacitance Extraction (electrostatic)RL Extraction (MQS)Combined RLC Extraction (EMQS)Electromagnetic Interference Analysis (fullwave)Electromagnetic field solvers classification (time vs. frequency, differential vs. integral)integral equation solvers in detailbasis functionsresidual minimization (collocation and Galerkin)linear system solutionfast matrix-vector productsExample: EMQS solutionConclusions

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    Example: the most intuitive FDTD in one dimension using Forward Euler (easier to explain)Maxwell differential equations:In one dimension:Using forward Euler:

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    Example: 1D-FDTD with Forward Euler (cont.)Iteration formulas:txn+1nmm+1

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    Time-domain vs. frequency domain methodsTime-domain methodsFrequency-domain methods

    can handle non-linearitiesproblems with non-linearities

    run a long simulation exciting solve for specific frequencyall significant modes and then points of interesttake an FFT

    can produce insightfulcan exploit new techniques animationsfor model order reduction

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    Differential vs. Integral method

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