opening up automatic structural design space exploration by fixing modular simulation veerle desmet...
TRANSCRIPT
Opening Up Automatic Structural Design Space Exploration by Fixing Modular Simulation
VEERLE DESMET SYLVAIN GIRBAL OLIVIER TEMAM
Ghent University Thales TRT INRIA
Motivation
2Veerle Desmet – Sylvain Girbal – Olivier Temam6th HiPEAC Industrial Workshop – Thales Nov 26th, 2008
0,98
0,99
1,00
1,01
1,02
1,03
1,04
1,05
1,06
1,07
1,08
1,09
1,10
1,11
VC('82)
TP('8
2)
SP('9
0)
Mar
kov(
'97)
FVC(
'00)
DBCP('0
1)
TKVC('0
2)
TK('0
2)
CDP('0
2)
CDPSP
('02)
TCP('0
3)
GHB('0
4)
Mechanism
Avera
ge S
peed
up
[MICRO 2004, Gracia-Pérez et al.]
Need for systematic quantitative comparison
Need for systematic quantitative comparison
Computer Architecture Research
3Veerle Desmet – Sylvain Girbal – Olivier Temam6th HiPEAC Industrial Workshop – Thales Nov 26th, 2008
Design space exploration: need more than intuition and experience?
4
Time-to-marketTime-to-market
Veerle Desmet – Sylvain Girbal – Olivier Temam6th HiPEAC Industrial Workshop – Thales Nov 26th, 2008
area
power
execution time
Multi-objectivesMulti-objectives
ArchExplorer: repository + automatic exploration
5
archexplorer.org database
simulation cluster
upload
daily update
pick design points
add results
test
Veerle Desmet – Sylvain Girbal – Olivier Temam6th HiPEAC Industrial Workshop – Thales Nov 26th, 2008
Server-side InfrastructureWebsite
FULLY AUTOMATIC
How to compare?
1. Custom simulator
2. Hardware compatibility
3. Software compatibility
4. Upload
6Veerle Desmet – Sylvain Girbal – Olivier Temam6th HiPEAC Industrial Workshop – Thales Nov 26th, 2008
Wrapped Simulator& Parameter ranges
CustomSimulator
DL1
CPU
DSM
EX WB CMM
F
$ TLB
$
$ TLB
$
MEM
D S EX WB CMM
FSM
IL1BP
L2
S
MEM
Hardware compatibility
7
Instruction caches Data cachesBranch predictorsInterconnectsMain memoryAccelerators...
Veerle Desmet – Sylvain Girbal – Olivier Temam6th HiPEAC Industrial Workshop – Thales Nov 26th, 2008
Software compatibility
8Veerle Desmet – Sylvain Girbal – Olivier Temam6th HiPEAC Industrial Workshop – Thales Nov 26th, 2008
Isolate the hardware block, possibly by from centralized control to distributed control
Software compatibility
9Veerle Desmet – Sylvain Girbal – Olivier Temam6th HiPEAC Industrial Workshop – Thales Nov 26th, 2008
Self-Configuration and parameters legality
Models of computationWrapping in SystemC-based on UNISIM communication layer
Case study
Memory sub-system for embedded processor
PowerPC405
8 different cache modules available
Complex hierarchies automatically explored
Ranking designs for performance, power, energy, area,...
Victim Cache
Timekeeping Victim cache
Stride Prefetcher
Content-Directed Prefetcher
Stride + Content Directed Prefetcher
Tag Prefetcher
Global History Prefetcher
Skewed associtiative cache
10Veerle Desmet – Sylvain Girbal – Olivier Temam6th HiPEAC Industrial Workshop – Thales Nov 26th, 2008
Accurate comparison needs compiler tuning as well
11Veerle Desmet – Sylvain Girbal – Olivier Temam6th HiPEAC Industrial Workshop – Thales Nov 26th, 2008
1.231.23
2.622.62
1.091.09
Best data cache mechanisms per area
12Veerle Desmet – Sylvain Girbal – Olivier Temam6th HiPEAC Industrial Workshop – Thales Nov 26th, 2008
CONCLUSIONS:1. Contrast to
Gracia-Pérez et al. [MICRO 2004]
2. No clear winner3. Close to tuned
parametric cache
Best data cache mechanisms per area
13Veerle Desmet – Sylvain Girbal – Olivier Temam6th HiPEAC Industrial Workshop – Thales Nov 26th, 2008
CONCLUSIONS:1. Contrast to
Gracia-Pérez et al. [MICRO 2004]
2. No clear winner3. Close to tuned
parametric cache
Composing cache hierarchies
14Veerle Desmet – Sylvain Girbal – Olivier Temam6th HiPEAC Industrial Workshop – Thales Nov 26th, 2008
Speedup and Energy Improvement
15Veerle Desmet – Sylvain Girbal – Olivier Temam6th HiPEAC Industrial Workshop – Thales Nov 26th, 2008
ARCHEXPLORER.ORGCheck out this website:
16Veerle Desmet – Sylvain Girbal – Olivier Temam6th HiPEAC Industrial Workshop – Thales Nov 26th, 2008
17Veerle Desmet – Sylvain Girbal – Olivier Temam6th HiPEAC Industrial Workshop – Thales Nov 26th, 2008
Conclusion
Permanent open competition(s)
Future: superscalar processor
branch predictor repository
multi-cores
Open for your ideas!NoC, compiler extensions,...
18Veerle Desmet – Sylvain Girbal – Olivier Temam6th HiPEAC Industrial Workshop – Thales Nov 26th, 2008
ARCHEXPLORER.ORGCheck out this website:
19Veerle Desmet – Sylvain Girbal – Olivier Temam6th HiPEAC Industrial Workshop – Thales Nov 26th, 2008
Opening Up Automatic Structural Design Space Exploration by Fixing Modular Simulation
VEERLE DESMET SYLVAIN GIRBAL OLIVIER TEMAM
Ghent University Thales TRT INRIA