o. aubel, m. grillberger, j. poppe, m. lehr, c....

Stress phenomena in times of porous low-k dielectrics O. Aubel, M. Grillberger, J. Poppe, M. Lehr, C. Hennesthal

11th international workshop on stress-induced

phenomena in metallization

Outline

Why are we moving to ultra-lower-k (ULK)

materials?

What are the general challenges with ULK?

What are the challenges for reliability?

What are improvement options in particular for

Stress migration?

Summary

April 12th, 2010 2 Stress-induced phenomena workshop April 2010

Why are we moving to ULK materials?

In advanced technologies not only the transistor is

limiting the overall performance anymore

RC delays are more and more limiting the speed of the

system


Source: Bohr,

IEDM 1995

swet_B2_SERP [Ohm/um]

swet

_B2_

CLU

MP

[aF

/um

]

1.0 1.2 1.4 1.6 1.8 2.0

160

180

200

220

240

260

U88E1 ULK24 vs OMCTS27

ULK2.4

OMCTS2.7

1.45

97

200.51


swet

_B2_

CLU

MP

[aF

/um

]

1.0 1.2 1.4 1.6 1.8 2.0

160

180

200

220

240

260


ULK2.4

OMCTS2.7


swet

_B2_

CLU

MP

[aF

/um

]

1.0 1.2 1.4 1.6 1.8 2.0

160

180

200

220

240

260


ULK2.4

OMCTS2.7

1.45

97

206.6


swet

_B2_

CLU

MP

[aF

/um

]

1.0 1.2 1.4 1.6 1.8 2.0

160

180

200

220

240

260


ULK2.4

OMCTS2.7

1.45

97

225.65

~9%


How to reduce RC?

Limited ways to reduce

resistance [thinner barrier and/or

deeper trench]

Ultra Low K (ULK) materials are

films with a bulk k-value of <2.6.

Between k-values of 2.6 and 3

the ILD is considered a low K

(LK) material

Up-to-date ILDs have k-values

of ~2.7, a RC reduction of >10%

can be reached by moving to a

material with k=2.4 or below


Resistivity [Ohm/µm]

To

tal C

ap

acity

[aF

/µm

] k=2.7

k=2.4


Does ULK work in integrated circuits?

Yes, several 100MHz speed improvement for the same IC

can be achieved (non-design optimized)


Speed

improvement

Speed

improvement


ULK is a porous material which

is mechanically weaker than

dense ILDs (and therefore

more prone to cracks due to

packaging)

ULK must be integrated using

different UNIT processes

ULK is more sensitive to

process damages

ULK is intrinsically less robust

with respect to reliability



Moisture uptake increases the risk of barrier oxidation

Cu out-diffusion through the barrier was observed resulting

in a significant TDDB lifetime decrease


Source: Michael, et al., APL 83, 2003 Source: Baek, et al., IRPS, 2006


The ULK is very prone to severe damage due to

liner processing Only smooth etch back processes allow reliable ULK integration



Integration of ULK is very

challenging:

The Etch process is introducing a

damage region which increases the

effective k-value of the film

Damage region is not scaling and will

become more and more significant in

future


Damaged Area with higher k

Cu

Barrier

ULK dielectric

Graded layer with higher k

cap layer (Blok) with higher k Increasing

damage

468

1012141618202224

0 20 40 60 80 100 120 140

Car

bo

n C

on

ten

t [%

]

Depth [nm]

ULK (bulk)

ULK integrated


ULK damage

due to liner processes bad reliability and RC values

due to etch damage bad reliability and RC values

Moisture uptake barrier oxidation (and bad

TDDB)

Cracks or delamination due to packaging


What are the challenges for reliability?


What are the challenges for reliability (EM)? Intrinsic Reliability Impact!

Different liner schemes for reduced

damage in particular on trench

bottom needed

Comparable EM performance can

be reached for ULK compared to

dense low-K (k=2.7)

EM kinetics are comparable

For Cu silicidation the EA value is ~1.0eV

For pure Cu the EA value is ~ 0.9eV


100101

99

95

90

80

70

60

50

40

30

20

10

5

1

lifetime [a.u.]

Percent

porous SiCOH

SiCOH

Electromigration Performance

99

95

90

80

70

60

50

40

30

20

10

5

1

lifetime [a.u.]

Pe

rce

nt

250°C

300°C

Intrinsic EM reliability

robustness is not affected

by ULK introduction

Temp: 300°C

Line width~140nm

Via Upstream

Line width~140nm

Via Upstream

99

95

90

80

70

60

50

40

30

20

10

5

1

ttf/h

Pe

rce

nt

high EB

medium EB

Low EB

99

95

90

80

70

60

50

40

30

20

10

5

1

lifetime [a.u.]

Pe

rce

nt

High EB

Medium EB

Low EB

What are the challenges for reliability (EM)? Process Impact on Reliability!


Significant impact on EM was observed by pre-clean splits

after via etch and the barrier schemes (etch back).

1000.0100.010.01.00.1

99

95

90

80

70

60

50

40

30

20

10

5

1

lifetime [a.u.]

Pe

rce

nt

soft pre-clean

no pre-clean

advanced pre-clean

Downstream*

Upstream* Downstream*

Pre-Clean

Optimized integration schemes eliminate any process related impact on EM

*Line width~140nm

Etch Back

1000.0100.010.01.00.1

99

95

90

80

70

60

50

40

30

20

10

5

1

lifetime [a.u.]

Pe

rce

nt

soft pre-clean

no pre-clean

advanced pre-clean

1000.0100.010.01.00.1

99

95

90

80

70

60

50

40

30

20

10

5

1

lifetime [a.u.]

Pe

rce

nt

soft pre-clean

no pre-clean

advanced pre-clean

What are the challenges for reliability (TDDB)? Intrinsic Reliability Impact!

Porous materials have about 30% less breakdown strength

than dense materials


Source: Ogawa,

et al., IRPS 2003

Intrinsic TDDB reliability suffers from ULK introduction

What are the challenges for reliability (TDDB)? Intrinsic Reliability Impact!

IMD-TDDB measurements are indicating that the physical

mechanisms are not changing between the different ILDs


100000.010000.01000.0100.010.01.00.1

99

90

8070605040

30

20

10

5

3

2

1

Lifetime [h]

Pe

rce

nt

ULK-46.8V

ULK-55.4V

ULK-58.3V

ULK-61.2V

1000.0001.0000.001

99

90

80706050

40

30

20

10

5

3

2

1

Lifetime [h]

Pe

rce

nt

LK-32.5V

LK-30V

LK-25V

TDDB lifetime extrapolation stays the same (root-E model valid for ULK)

-202468

1012141618

20 25 30 35

Lo

g(t

63

)

Voltage [V]

Root-E Model

Linear-E Model

*Tested on via-combs (~50k vias)

LK*

ULK*

1000.0100.010.01.00.1

99

95

90

80

70

60

50

40

30

20

10

5

1

lifetime [a.u.]

Pe

rce

nt

soft pre-clean

no pre-clean

advanced pre-clean

1000.0100.010.01.00.1

99

95

90

80

70

60

50

40

30

20

10

5

1

lifetime [a.u.]

Pe

rce

nt

soft pre-clean

no pre-clean

advanced pre-clean

What are the challenges for reliability (TDDB)? Process Impact on Reliability!

Two ways to improve TDDB

performance

Avoid damage (ACP)

Repair damage (ULK repair)

Both are improving lifetime and Vacc

468

1012141618202224

0 20 40 60 80 100 120 140

Car

bo

n C

on

ten

t [%

]

Depth [nm]

ULK (bulk)

ULK integrated

ULK repaired

99

95

90

80

70

60

50

40

30

20

10

5

1

Lifetime [s]

Percent

As deposited

Repair


Optimized integration

schemes reduce process

related impact on TDDB

5

20

20

10

25

4

0

14

27

4

0

17

31

4

00

5

10

15

20

25

30

35

150°C 175°C 225°C 275°C

LK

W1

%(fa

ils)

%(fails)

mean of %Fails@250h

mean of %Fails@500h

mean of %Fails@750h

mean of %Fails@1000h 4

3

2

1

6

3

2

1

6

3

2

1

6

3

22

0

1

2

3

4

5

6

7

150°C 175°C 225°C 275°C

lowEB

W3

%(fails)

% Fails @ 250h

% Fails @ 500h

% Fails @ 750h

% Fails @ 1000h

What are the challenges for reliability (SM)? Intrinsic Reliability Impact!

SM peak temperature seem to move to 150°C

High temperature behavior has changed


ULK*

LK*

Intrinsic SM reliability behavior may change due to ULK introduction

*Wide plate below (~5µm)


Since ULK is porous

and therefore much

more sensitive to

oxygen diffusion

The barrier oxidation

(BIT) is much more

pronounced

compared to LK

130125120115110105100

99.9

99

95

90

80

70

60

50

40

30

20

10

5

1

0.1

Relative Resistance Shift [%]

Pe

rce

nt

p-SiCOH

SiCOH


1000h @

275°C on

wide plate

below (~5µm)

Intrinsic high temperature SM behavior changes due to ULK introduction

Source: Aubel, et

al., IRW 2009


Intrinsic SM reliability physics may change due to

ULK introduction “peak” SM temperature seems to decrease down to 150°C or below

High temperature behavior (Barrier Integrity)

Possible root causes: Low temperature:

ULK deposition temperature is well below the deposition temperature from LK,

but measured stress (as deposited) = 45GPa is identical to LK

CTEULK is 14ppm/K compared to CTELK is 11ppm/K

High temperature:

Moisture sensitivity, higher diffusivity for oxygen, ULK serving as oxygen source


What are the challenges for reliability (SM)? Process Impact on Reliability!

SM is very sensitive to barrier schemes comparable to EM: smooth barrier has reduces SM margin but can

be compensated by pre-clean processes

Still some margin for meeting targets


99

95

90

80

70

60

50

40

30

20

10

5

1

lifetime [a.u.]

Pe

rce

nt

High EB

Low EB, Clean 2

Low EB, Clean 1

0 0 0

36

0 0

4

90

0 0 1

41

0 0

7

92

0 0 1

44

0 0

9

92

0 0 2

48

0 0

12

93

0

10

20

30

40

50

60

70

80

90

100

C5C C5XX C10XX C5UMXX C5C C5XX C10XX C5UMXX

High EB Low EB, Clean 1

W1

%(fails)

% Fails @ 250h

% Fails @ 500h

% Fails @ 750h

% Fails @ 1000h

Non-design

compliant

structures

5µm wide

plates

What are the challenges for reliability (Status)?


Mechanism Comment Status

EM

• No impact on intrinsic EM reliability

robustness

• LK Performance can be met by optimized

process (not process impact on EM

performance)

TDDB

• Very critical due to “intrinsic” material

degradation (lower Vacc and lower VBD)

• No change in extrapolation methodology

observed

• Lifetime margin is reduced compared to LK

• Process impact can be reduced by optimized

process

SM

• Intrinsic SM reliability behavior changes

due to ULK introduction

• Peak stress temperature is changing

• Barrier integrity performance is challenging

What are improvement options in particular for

Stress migration?


Using the toolbox of EM enhancement options

1. CoWP cap layer

Max. EM improvement

Max. SM improvement

TDDB challenging

2. Cu-Silicidation

Some EM improvement

Some SM improvement

TDDB improvement

RC challenging

3. Alloy

Some EM improvement

Some SM improvement

RC challenging

Cap layer (BLOK)CuSi

Plasmaless Clean CuSi formation Cap deposition

Cu

Thermo-Chemical-Treatment (TCT) (PECVD)

Cu

Cu Oxide reducinggases

CuSi

Cu

Si inclosing

precursor

CuSi

Cu

Si inclosing

precursor

Film deposition

plasma

alloy

Cu-Silicidation


Alloy

How to solve these problems in SM? CoWP on ULK


During early process development

CoWP was investigated for EM/SM

improvements and TDDB impact

EM and SM improvement is significant (for EM

>> t50 improvement)

No impact on TDDB has been observed

99

95

90

80

70

60

50

40

30

20

10

5

1

ttf [a.u.]

Pe

rce

nt

CoWP + ULK

CoWP + LowK

only LowK

TDDB**

95

11

96

16

96

19

96

21

0

20

40

60

80

100

120

ULK ULK CoWP

C5UMXX

%(fails)

% Fails @ 250h

% Fails @ 500h

% Fails @ 750h

% Fails @ 1000h

SM*

99

95

90

80

70

60

50

40

30

20

10

5

1

Lifetime [a.u.]

Pe

rce

nt

ULK + CoWP

LK + CoWP

LK

ULK

EM Test (downstream) of Single ViaLognormal Probability Plot for ttf

EM

*Wide plate below (~5µm)

**Tested on

via-combs

(~50k vias)

How to solve these problems in SM? Alloy and Silicidation

The electromigration enhancement options work for stress

migration accordingly

Cu seed alloy with e.g. Al significantly improves SM performance for wide

plates (>5µm)

Cu surface silicidation significantly reduces stress migration failures in wide

plates


40

5

2

50

7

3

54

9

40

10

20

30

40

50

60

CuAl 0.0% CuAl 0.5% CuAl 1.0%

C5UMXX

%(fails)

% Fails @ 250h

% Fails @ 500h

% Fails @ 750hAlloy*

*Wide plate

below (~5µm)

Summary and Conclusions


Summary

The introduction of porous ULK material is very challenging

for the integration as well as for the reliability

Barrier – seed depositions techniques will need to be reevaluated to

reduced the damage for the underlying ILD

Electromigration in down flow direction is suffering from the adopted barrier

–seed process but can be adjusted by advanced pre-clean processes

TDDB is significantly degraded due to the change of material properties as

well as the ULK damage of the process. ULK repair techniques can help to

reduce the process influence.

The physics of stress migration behavior seem to change with respect to

high temperature and low temperature regime which can be compensated

by EM enhancement options.


Acknowledgment

The authors like to thank: Frank Feustel, Carsten Peters, Holger Schuehrer, Jens

Hahn and Meike Hauschildt (all with Globalfoundries Fab

1 in Dresden) and our colleagues in Sunnyvale (Ca,

USA) Kok-Yong Yiang, Walter Yao and Patrick Justison

for helpful discussions.


Trademark Attribution

GLOBALFOUNDRIES, the GLOBALFOUNDRIES logo and combinations thereof are trademarks of GLOBALFOUNDRIES Inc. in the

United States and/or other jurisdictions. Other names used in this presentation are for identification purposes only and may be trademarks

of their respective owners.

©2009 GLOBALFOUNDRIES Inc. All rights reserved.


o. aubel, m. grillberger, j. poppe, m. lehr, c....

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