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Module 2Basic Digital Building Blocks

Lecturer: Dr. Yongsheng GaoOffice: Tech 3.25

Email: yongsheng.gao@griffith.edu.au

Web: maxwell.me.gu.edu.au

Structure:6 lecturers1 tutorial1 laboratory (5%)1 test (20%)

Textbook: Floyd, "Digital Fundamentals 8 ed"

Chapters: Chapter 6 Chapter 7

Covers: Binary Arithmetic & Arithmetic CircuitsComparators, Decoders, Encoders, MultiplexorsFlip-Flops

BINARY ARITHMETIC AND ARITHMETIC CIRCUITS

1.1 Aim

In the previous lectures you have been shown the logic functions and how tominimise the logic functions.

In this section you will learn how to perform addition and subtraction in binary, andhow to combine the logic gates to make adders and subtractors, how to representpositive and negative numbers in binary, and how to perform arithmetic on thesepositive and negative numbers.

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1.2 Decimal Arithmetic

1.2.1 Addition

Truth Table

A + B

B\A 0 1 2 3 4 5 6 7 8 90 0 1 2 3 4 5 6 7 8 91 1 2 3 4 5 6 7 8 9 02 2 3 4 5 6 7 8 9 0 13 3 4 5 6 7 8 9 0 1 24 4 5 6 7 8 9 0 1 2 35 5 6 7 8 9 0 1 2 3 46 6 7 8 9 0 1 2 3 4 57 7 8 9 0 1 2 3 4 5 68 8 9 0 1 2 3 4 5 6 79 9 0 1 2 3 4 5 6 7 8

signifies a carry

e.g. 9 + 4 = 3 with carry = 1

To add Decimal numbers

1. set carry = 02. start at right column3. add all the digits in the column including the carry4. If (sum > 10) then set carry=1 else set carry=05. Move to the next column on the left.6. Repeat steps 3 to 5 until no more columns

Example09 + 15 = 24

101 100

A 0 9B 1 5

Carry 1Result 2 4

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1.2.2 Subtraction

Truth Table for Decimal Subtraction

A - B

B\A 0 1 2 3 4 5 6 7 8 90 0 1 2 3 4 5 6 7 8 91 9 0 1 2 3 4 5 6 7 82 8 9 0 1 2 3 4 5 6 73 7 8 9 0 1 8 9 0 1 24 6 7 8 9 0 9 0 1 2 35 5 6 7 8 9 0 1 2 3 46 4 5 6 7 8 9 0 1 2 37 3 4 5 6 7 8 9 0 1 28 2 3 4 5 6 7 8 9 0 19 1 2 3 4 5 6 7 8 9 0

signifies a borrowe.g. 5 - 6 = 9 with borrow = 1

To subtract Decimal numbers

1. set borrow = 02. start at right column3. subtract all the digits in the column including the borrow4. If (sub < 0) then add 10 to sub set borrow=1 else set borrow=05. Move to the next column on the left.6. Repeat steps 3 to 5 until no more columns

Example24 - 19 = 5

101 100

A 2 4B 1 9

Borrow 1Result 0 5

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1.3 Binary Arithmetic

1.3.1 Addition

Truth Table for Binary Addition

A+B

A B Σ Carry

0 0 0 00 1 1 01 0 1 01 1 0 1

To add Binary numbers

1. set carry = 02. start at right column3. add all the bits in the column including the carry4. If (sum > 10b) then set carry=1 else set carry=05. Move to the next column on the left.6. Repeat steps 3 to 5 until no more columns

Example 001 + 011 = 100 (1)+(3)=(4)

22 21 20

A 0 0 1B 0 1 1

Carry 1 1Result 1 0 0

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1.3.2 Subtraction

Truth Table for Binary Subtraction

A-B

A B R Borrow

0 0 0 00 1 1 11 0 1 01 1 0 0

To subtract Binary numbers

1. set borrow = 02. start at right column3. subtract all the bits in the column including the borrow4. If (sub < 0) then add 10b to sub and set borrow=1 else set borrow=05. Move to the next column on the left.6. Repeat steps 3 to 5 until no more columns

Example 101 - 011 = 010 (5) - (3) = (2)

22 21 20

A 1 0 1B 0 1 1Borrow 1 0Result 0 1 0

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1.4 Circuits For Binary Addition

1.4.1 Half adder

To add two binary numbers together you use a half adder circuit.

Examining the truth table for the binary addition we note that the Σ column in thetruth table is an XOR.

The carry can be represented by an AND of inputs A, B

A B ΣΣΣΣ Co

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

Therefore the circuit for the half adder can be drawn:

The symbol for a half adder is

Carry out

AB Sum

A Sum

B Co

HAA

B

S

Co

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1.4.2 Full Adder

To add the higher order columns you also need to add the carry.

The truth table for the full adder is shown below

A B Ci Σ Co

0 0 0 0 00 1 0 1 01 0 0 1 01 1 0 0 10 0 1 1 00 1 1 0 11 0 1 0 11 1 1 1 1

The circuit can be constructed out of 2 half adders

The complete circuit for the full adder is

B

SumCarry in

Carry out

A

HAA

B

S

Co

Cout

SumA

B

Ci

HAA

B

S

Co

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The symbol for a full adder is

1.4.3 Multibit Adders

The full adder only adds 2 one bit values together.

Multiple bits can be added by using an adder for each bit.

ExampleA nibble (4 bit value) can be represented with 4 lines (A0 to A3).Two nibbles can be represented with (A0 to A3) & (B0 to B3).Adding A + B will produce 4 sum bits and a carry

Eg 1101 + 0101

CoMSB

23 22 21LSB20

+ 1 1 0 10 1 0 1

(1) 0 0 1 0

Each column in the addition has to be added separately with a separate adder circuit.

Each addition is performed in parallel (at the same time) since each column uses itsown adder.

The 20 column does not require a Carry in since it is the first to be added. Thiscolumn needs a half adder.

Columns 23 to 21 require a Carry in because the calculation of the previous column(bit) could have generated a carry. These columns need a full adder.

BCi

FAA

B

Cin

Sum

Cout

A

Co

Sum

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1.4.4 Ripple Carry Adder

A ripple carry adder connects the Cout of one adder to the Cin of the next adder.

This is known as cascading.

The circuit for a ripple carry adder to add two 4-bit numbers (A & B) together is:

MSB LSB

Stage 3 Stage 2 Stage 1 Stage 0

Q. Are all the sum bits calculated at the same time?A. No. It takes the carry a finite time to propagate from the least significant bit

(LSB) to the most significant bit (MSB). Each full adder needs the carry from theprevious adder to calculate its sum therefore there is a delay in the calculation ofeach bit.

Q. Is there a way to remove this delay?A. Yes. An extra circuit called a look-ahead carry can be connected to input bits of

each adder. This circuit uses the input bits to predict the output carry of eachstage.

Q. Computer use bytes (8 bits) and words (16 or 32 bits). Is there an easier way toadd these without all the full and half adder circuits?

A. Yes. Integrated circuits (IC) can be used. They contain all the adding stageswithout us have to build them separately.

A2 B2

S3 S2

A1

FA

A B Cin

Sum

Cou

t

B1

FA

A B Cin

Sum

Cou

t

S1FA

A B Cin

Sum

Cou

t

A0

Cout

B0A3

S0

B3

HA

A B

S Co

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1.4.5 Integrated Circuit Adders

A four bit adder is available as integrated circuits in both TTL and CMOS.

The four bit adder takes two nibbles and a carry in bit to produce four sum bits and acarry out bit.

Number Description

7483 TTL 4 bit adder with fast carry74LS83 Low Power Schottky TTL 4 bit adder with fast carry74HC283 High Speed CMOS 4 bit adder with fast carry74LS283 Low Power Schottky TTL 4 bit adder with fast carry4008 CMOS 4 bit adder with fast carry

Switching Characteristics

There will be a finite time for the circuit to perform the addition.

This will mean that there is a delay between the changing the inputs and thecorresponding change in the output.

This delay is known as the progation delay.

The switching characteristics on the data sheets show the propogation delays foreach of summing stage outputs. The delays for the carrys are also indicated.

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1.4.6 Adder Expansion

Q. How can I add bytes (8 bit) rather than nibbles (4 bit)?A. Simple. Cascade the 74LS283 in the same manner as cascading adders as done

previously.

Each 74LS283 allows the addition of 4 bits. Therefore two 74LS283 will allow 8bits for A (A0-A7) and 8 bits for B(B0-B7). The sum will be an 8 bit value (S0-S7).

The carry out (C4) of the Least Significant nibble (Stage 1) must be connected to thecarry in (C0) of the Most Significant nibble (Stage 2).

The carry out of the Most Significant nibble is the carry for 8 bit addition.

The carry in of the Least Significant nibble is the 0 since there are no preceedingstages.

Stage 1 Stage 2

Exercise:Design a circuit to add 12 bit numbers.

Hint:12 bits = 3 x nibbles.

74LS283

A4A3A2A1B4B3B2B1C0

S4S3S2S1C4

S0-S3

B4-B7 }}

C7

A0-A3}B0-B3

74LS283

B1 B2 B3 B4 A1 A2 A3 A4 C0

S1 S2 S3 S4 C4

A4-A7}

S4-S7

}}

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1.5 Circuits For Binary Subtraction

1.5.1 Half subtractor

To subtract two binary numbers from each other you use a half subtractor circuit.

Examining the truth table for the binary subtraction we note that the R column in thetruth table is an XOR.

The borrow can be represented by an AND of inputs A, /B

A B R bo

0 0 0 00 1 1 11 0 1 01 1 0 0

Therefore the circuit for the half subtractor can be drawn:

The symbol for a half subtractor is

HSA

B

R

bo

A

B bo

R

Borrowout

B RA

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1.5.2 Full Subtractor

To subtract the higher order columns you also need to subtract the borrow.

The truth table for the full subtractor is shown below

A B bi R bo

0 0 0 0 00 1 0 1 11 0 0 1 01 1 0 0 00 0 1 1 10 1 1 0 11 0 1 0 01 1 1 1 1

The circuit can be constructed out of 2 half subtractors

bo

R

B

HSA

B

R

bo

HSA

B

R

bo

A

bi

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The complete circuit for the full subtractor is

The symbol for a full subtractor is

1.5.3 Multibit Subtractors

The full subtractor only subtracts 2 one bit values together.

Multiple bits can be subtracted by using an subtractor for each bit.

ExampleA nibble (4 bit value) can be represented with 4 lines (A0 to A3).Two nibbles can be represented with (A0 to A3) & (B0 to B3).Subtracting A - B will produce 4 sum bits and a borrow

Eg 1011 - 0101

boMSB

23 22 21LSB

20

+ 1 0 1 10 1 0 1

(0) 0 1 1 0

Each column in the subtraction has to be subtracted separately with a separatesubtractor circuit.

Each subtraction is performed in parallel (at the same time) since each column usesits own subtractor.

BCi

FAA

B

Cin

Sum

Cout

A

Co

Sum

A

Borrowin

Borrowout

R

B

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The 20 column does not require a Borrow in since it is the first to be subtracted. Thiscolumn needs a half subtractor.

Columns 23 to 21 require a Borrow in because the calculation of the previous column(bit) could have generated a borrow. These columns need a full subtractor.

MSB LSB

Stage 3 Stage 2 Stage 1 Stage 0B1 B0

R1

B3

bout

A3 A0

FS

A B bi

R bo

B2A2

R0

FS

A B bi

R bo

R3

A1HS

A B

R bo

FS

A B bi

R bo

R2

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1.6 Binary Number Systems Allowing Negative Values

1.6.1 Sign Magnitude

Sign magnitude allows the representation of positive and negative numbers

The Most Significant bit is used to represent the sign.0 = positive value1 = negative value

e.g. In an 8 bit value±±±± B6 B5 B4 B3 B2 B1 B0

Decimal Sign Magnitude4 0000 01003 0000 00112 0000 00101 0000 00010 0000 0000-1 1000 0001-2 1000 0010-3 1000 0011-4 1000 0100

The range is 1111 1111 (-127) to 0111 1111 (+127)

The problem is you have 2 zeros1000 0000 (+0)0000 0000 (-0)

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1.6.2 One’s Complement Representation

The one’s complement representation allows both positive and negative numbers.

The complement is the inverse or opposite of a number.Eg

The complement of +3 is –3 and vice versa

A positive number is represented by its normal binary value.

A negative number is represented by inverting all the bits of the correspondingpositive number.

Example+4 take binary 0100

-4 take binary 0100invert 1011

Note:The most significant bit is equivalent to the sign bit

The one’s complement representation for –4 to 4 is shown in the table below.

Decimal One's complement4 01003 00112 00101 00010 0000-1 1110-2 1101-3 1100-4 1011

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1.6.3 Two’s Complement Representation

A positive number is represented by its normal binary value.

A negative number is represented by taking the one’s complement value and adding1.

Example+2 take binary 0010

-2 take 1’s complement 1101+1 1110

Note:The most significant bit is equivalent to the sign bit

The two’s complement representation for –4 to 4 is shown in the table below.

Decimal Two's complement4 01003 00112 00101 00010 0000-1 1111-2 1110-3 1101-4 1100

A quick method to find the 2’s complement is to start at the rightmost bit (leastsignificant) and copy each bit while moving left until the bit is a 1. After this keepmoving to the left but invert all the bits.

EgFind the 2’s complement of 01010100

0 1 0 1 0 1 0 0

invert copy

1 0 1 0 1 1 0 0

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Find the 2’s complement of 01011’s comp method

1’s comp = 1010 1+------1011

result = 1011

Quick0101copy = 1invert 010 = 101

result = 1011

Find the twos complement of +5+5 is a positive number5 = 0101b

result = 0101

Find the twos complement of -5-5 is a negative number5 = 0101b

1’s comp method1’s comp = 1010

1+------1011

result = 1011

Quick0101copy = 1invert 010 = 101

result = 1011

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1.6.4 Two’s Complement Arithmetic

Two’s complement is the most widely used method for performing arithmetic.

Computer’s perform their integer arithmetic using 2’s complement.

The advantage of 2’s complement is that addition and subtraction can be performedusing just addition. Thus the same circuitry can be used for additions andsubtraction.

Addition: A + BSubtraction: A – B = A + -B

Signed 2’s complement numbers.

A negative number is the 2’s complement of a positive number.

The sign can be determined by examing the MSBit.If the MSBit is 1, then the number is in 2’s complement form and is therforenegative.

Example0100 = +41100 = -4

00100111 = +3911011001 = -39

Range of a 2’s complement number

The total number of possible values for an n bit number is 2n.

The Most Significant Bit of a 2’s complement is the sign bit. Therfore there is (1)sign bit and (n-1) magnitude bits.

Range:-(2n-1) to (2n-1 –1)

ExampleFor an 8 bit number the range is –(27) to (27-1) which is –128 to 127

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2’s Complement Addition

To add A + B

1. If A or B negative, convert them to their 2’s complement form.2. Add A and B. Ignore the carry.3. Examine the Most Significant Bit of the sum.

- If it is a 0 then the result is in normal binary form.- If it is a 1 then the result is in 2’s complement form. Therefore take the 2’s

complement to get the true magnitude of the sum.

ExamplesThere are 4 possible cases for addition

1. Both numbers positive2. Magnitude of positive number > magnitude of negative number3. Magnitude of negative number >magnitude of positive number4. Both numbers negative

Case 1 (4 + 7)

+4 + 0000 0100 ++7 0000 0111+11 0000 1011

Sign bit = 0 therefore +ve

Result = 11

Case 2 (7 + -4)

+7 + 0000 0111 +-4 1111 1100 (2’s comp)+3 0000 0011

Sign bit = 0 therefore +ve

Result = 3

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Case 3 (4 + -7)

+4 + 0000 0100 +-7 1111 1001 (2’s comp)-3 1111 1101

Sign bit = 1 therefore negative

Since negative the result is in 2’s complement form.

To convert to decimal:Get magnitude by taking 2’s comp of sum = 0000 0011Result = -3

Case 4 (-4 + -7)

-4 + 1111 1100 + (2’s comp)-7 1111 1001 (2’s comp)-11 1111 0101

Sign bit = 1 therefore -ve

Since negative the result is in 2’s complement form.

To convert to decimal:Get magnitude by taking 2’s comp of sum = 0000 1011Result = -11

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2’s Complement Subtraction

We can perform subtraction by using the following property:A - B = A + (-B)

1. Negate B by converting it to its 2’s complement form.2. If A negative, convert it to its 2’s complement form.3. Add A and B. Ignore the carry.4. Examine the Most Significant Bit of the sum.5. If it is a 0 then the result is in normal binary form.6. If it is a 1 then the result is in 2’s complement form. Therefore take the 2’s

complement to get the true magnitude of the sum.

Example (7 – 4)

7 – 4 = 7 + (-4)

+7 + 0000 0111 +-4 1111 1100 (2’s comp)+3 0000 0011

Sign bit = 0 therefore +ve

Result = 3

Example (-25 – 19)

-25 – 19 = -25 + (-19) (25=0001 1001 & 19=0001 011)

-25 + 1110 0111 + (2’s comp)-19 1110 1101 (2’s comp)-44 1101 0100

Sign bit = 1 therefore -ve

To convert to decimal:Get magnitude by taking 2’s comp of sum = 0010 1100Result = -44

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Overflow Condition

An overflow results when A + B > number of bits in the numbers.i.e the result is larger than the range of A and B.

This is indicated by an incorrect sign bit.

This will only occur when A and B are both positive or both negative.

This can be fixed by adding extra bits to the Most Significant end.

Example 125 + 58125 + 0111 1101 + 58 0011 1010183 1011 0111

The sign bit is a 1 which indicates a negative result.The result is expected to be positive. Therefore we have an overflow condition.The 2’s complement range of a 8 bit number is (-128 to 127). 183 > 127This can be fixed by using another bit for each number

125 + 0 0111 1101 + 58 0 0011 1010183 0 1011 0111

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1.7.1 Putting it all together – ALU’s

ALU stands for Arithmetic Logic Unit.

An ALU is a multipurpose IC that perform arithmetic functions (add,subtract) andlogic functions (And, OR, NOT etc) on the input data.

The function to be performed is selected using the select inputs into the IC.

An example is the 74181 4-bit ALU.It has 16 different logical functions and 16 different arithmetic functions.

The two inputs are 4 bits in size and are labelled A and B.

The selected function is performed on the input and the result (F) is output.

If the result is a negative number then it is given in 2’s complement form.

Refer to the datasheet for the functions.