Modeling, Design and Demonstration of Multi-Die Embedded WLAN RF Front-End Module with

Ultra-miniaturized and High-performance Passives

Srikrishna Sitaraman, Yuya Suzuki, Christopher White, Vijay Nair *, Telesphor Kamgaing *, Frank JuskeyΩ, Sung Jin Kim,

P. Markondeya Raj, Venky Sundaram, and Rao Tummala.

3D Systems Packaging Research Center, Georgia Institute of Technology, 813 Ferst Dr N.W., Atlanta, GA 30332.

* Intel Corporation, Chandler, AZ 85226, USA. , Ω TriQuint Semiconductor, FL, USA., Zeon Corporation, Kawasaki, Kanagawa, Japan

Email: srikrishna@gatech.edu

Abstract

This paper demonstrates, for the first time, a Wireless

Local Area Network (WLAN) radio frequency (RF) front end

module (FEM), incorporating the smallest, high-performance

band-pass filter (BPF) on a 110µm-thin organic substrate with

chip-last embedded actives and thin-film passives. The FEM

consists of a power amplifier (PA) die, a switch die, and two

low-noise amplifier (LNA) dies, integrated with a BPF and a

low-pass filter (LPF). Full-wave electromagnetic (EM)

simulations are employed to study the signal path loss, EM

radiation and coupling. The BPF and LPF have 0.25dB and

0.5dB insertion loss respectively, with in-substrate dimensions

of 1mm x 1mm x 0.05mm. The PA die shows a gain of around

10.8 dB at 2.4GHz. The path between the antenna and the

amplifiers is also characterized to have a loss of 3dB. The

electromagnetic coupling from the PA output to the LNA

input and to the PA power supply is simulated using full wave

EM solver HFSS and found to be higher than 60dB, indicating

very good EM isolation. Each block of the FEM is

individually characterized and combined using Agilent ADS

to obtain the complete S-parameter performance. Both the

transmitter and receiver chains have gain of 9dB.

1. Introduction

The expanding foray of smart mobile systems into

different aspects of life has propelled the need for

miniaturization leading to higher functional density and

improved performance, at an affordable cost. To communicate

with other devices, such mobile systems utilize a number of

application-specific wireless technologies namely: GPS

(navigation), GSM (cellular), WiMAX (mobile internet),

WLAN (localized internet), and Bluetooth (short range data

transfer). Hence, to achieve the higher functional density

required of tomorrow’s smart mobile systems, the existing

wireless technology modules need to be highly miniaturized

and integrated [1].

The RF front end module in a typical WLAN system is

illustrated in Figure 1. Miniaturization of RF actives (LNA,

PA, Switch) involves developing efficient on-chip designs

followed by their realization on RF substrate materials such as

gallium arsenide (GaAs) and gallium nitride (GaN). Although

realizing the complete RF module on a single silicon die using

System-on-Chip (SOC) approach can help miniaturize to a

great extent, the performance of such modules is below par

owing to different substrate-material requirements for RF

actives and passives [2]. Miniaturized WLAN FEMs

excluding the passives have been demonstrated on a single

GaAs die [3]. Further, to demonstrate a complete FEM with

integrated RF filters, in-process substrate-embedded filters

have been developed [4-6]. These modules are mostly based

on either low-temperature co-fired ceramics (LTCC) or

organic substrates. However, such filters either have high loss

(>2dB) or are of fairly large thickness (>200µm) due to the

inherent substrate thickness and multi-layer design

approaches. Although alternatives such as FOWLP [7-9] have

achieved good miniaturization and performance, they are

challenged by low substrate yield loss arising from chip-first

embedding, inability to embed multiple heterogeneous actives,

and thermal dissipation issues with densely packed

components.

GT-PRC has been pioneering the System-on-Package

concept (SOP) [1, 10] as the strategic basis of system scaling

for smart systems. SOP integrates and miniaturizes the entire

system in a small package with embedded double-side actives

and thin-film passive in ultrathin low-loss packages. Chip-last

embedded actives with thin-film passives is one example of

the SOP concept, which has the following benefits over SOC

and chip-first approaches: 1) no substrate yield loss due to

heterogeneous die embedding; 2) intermediate substrate

testability to isolate defective units before and after assembly;

3) very low interconnection parasitics, leading to better

electrical performance; 4) improved thermal performance

enabled by die backside accessibility; and, 5) ability to use

different substrate materials to ensure optimal performance of

each component. Hence, a SOP-based WLAN RF FEM is

demonstrated in this paper.

RF-Digital

Interface

PA

LNA

Antenna

Front End Module

Baseband

Processing LPF

BPF

Switch

Figure 1. Components of a WLAN sub-system.

Previous work at GT-PRC has demonstrated functional

WLAN RF modules on multi-layer organic substrates [11-13]

using chip-last SOP. This paper extends the WLAN RF

module integration further with multiple actives for LNA, PA

and switch dies integrated with miniaturized embedded band-

pass and low-pass filters based on a novel design, on a single

978-1-4799-2407-3/14/$31.00 ©2014 IEEE 1264 2014 Electronic Components & Technology Conference

ultra-thin organic package using ZEONIF™ XL – advanced

dielectric material developed by Zeon Corporation.

Section 1 of the paper is the introduction, followed by the

module schematic, substrate and component specifications in

section 2. Modeling, design and analysis of the transmission

lines, band-pass filter and low-pass filters are presented in

section 3. In section 4, the module layouts and full-wave EM

analyses for the PA module and FEM are detailed. Following

this, the fabrication and assembly of the designs are discussed

in section 5. In section 6, the characterization results are

presented and the paper is summarized in section 7.

2a. Module schematic and specifications

The module schematic is shown in Figure 2. Here, ‘LNA’

indicates the low-noise amplifier dies; ‘PA’, the power

amplifier die; and ‘Switch’, the switch die. The RF low-pass

filter and band-pass filters are indicated as ‘LPF’ and ‘BPF’

respectively. Each LNA block represent one die of the LNA

module. The first die in the signal path is for input-matching

and the second is the amplifier. The DC power rails are shown

for the actives and the ground connections are common to all

the components, although they are represented individually on

each component. The two thick black arrows represent the

direction of RF signal through the components.

LNA LPFPA

BPF

LNA Switch

Transmitter chainReceiver chain

RF inRF out

DC Supply DC Supply DC Supply

RF outRF in

Figure 2. Schematic of WLAN front-end module.

The FEM is designed for 2.4GHz WLAN, and constitutes

a receiver chain and a transmitter chain. The signals in the

receiver chain originate at the antenna terminal (GSG RF-

probe pads), and are routed to the LNA dies, through the BPF

and the switch die. The transmitter signal-path comprises the

LPF, PA die, switch die, and BPF, terminating at the RF probe

pads. The single-pole double-throw (SPDT) switch die directs

the signals from the antenna to the receiver section, or from

the transmitter section to the antenna. Transmission lines with

an impedance of 50Ω are used to provide a reflection-free RF

path between the different components.

2b. Substrate stack-up and design rules

The substrate stack-up comprises a XL high dielectric

constant (high dk) organic core of thickness 35 microns, from

Zeon Corporation. The core has a dielectric permittivity (dk)

of 6.2, with a loss tangent (df) of 0.0031. A build-up layer of

thickness 50 microns is used. The build-up polymer material is

from DuPont (dk=2.9, df=0.008). The stack-up is shown in

Figure 3. Two layers of metallization are featured on either

side of the core. There is no metallization on the build-up

layer since the build-up is employed mainly to demonstrate a

functional embedded RF FEM.

DuPont Build-up 50 μm Cavity

XL CCL 35μm dk=6.2 df=0.0031

10um thick Copper Figure 3. Stack-up for the WLAN front-end module substrate.

The design rules for the above stack-up are summarized in

Table I. The copper thickness on both M1 and M2 layers is 10

µm. The smallest feature size and spacing is 30 µm. Through

vias are drilled in the core to enable interconnection between

the two sides. The vias have a diameter of 50 µm and are

conformally plated to realize a thickness of 8 µm.

Table I. Summary of Design Rules.

Parameter/ Property Target

Chip-Cavity Clearance 100m on all sides

Chip Height 100μm – 500μm

Copper thickness 10 μm

Min. Line width-Spacing 30 μm

Via diameter 50μm

Via pitch 100 μm

2c. Schematics of the dies

All the dies were obtained from TriQuint Semiconductor.

The LNA comprises of two gallium arsenide (GaAs) dies –

one for input matching and the other functioning as the

amplifier. The datasheet diagram indicating the pin

configuration of the bare die is shown in Figure 4. A bias

voltage of 3.3V is required for the LNA. It has a datasheet

gain of 17dB with a noise figure of 1.45dB. Two decoupling

capacitors are required for ripple filtering on the LNA power

supply network.

5.2 GHz

Figure 4. LNA schematic; from TriQuint datasheet [14]

The PA is a single GaAs die with on-chip input and output

matching networks. The PA die-pin configuration from its

datasheet is depicted in Figure 5. The PA requires a bias

voltage of 3.3V, and draws a current of 180mA. The PA is

specified to have a gain of 30dB at 2.45GHz. The PA module

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requires a number of surface-mount capacitors, inductor and

resistors, as indicated in the datasheet schematic.

The PA and the LNA dies are all 100 µm thick, with

metallized back-side ground. The PA and LNA dies were

designed for wire-bonding, although are employed here in a

face-down configuration.

PA Die

Power Supply filtering

2.4

GHz

RF IN

2.4

GHz

RF Out

Figure 5. PA schematic; from TriQuint datasheet [15]

The switch comprises a single flip-chip silicon die of

thickness 500 µm, designed for Single-pole double throw

(SPDT) operation. It is designed for flip-chip interconnections

to the package. The schematic of the switch die is shown in

Figure 6. The switch has an insertion loss of 0.6dB with more

than 25dB isolation. A control voltage of 3V is required on

the control pins of the switch to select between the transmitter

and the receiver paths.

DCTX (Transmitter Select

Signal)

DCRX (Receiver Select

Signal)

Filter + AntennaGND

Transmitter

(PA module)

Receiver

(LNA module)

1uF

1uF

1uF

Figure 6. Switch schematic; from TriQuint datasheet [16]

The LNA, PA and the switch are all dual-band dies, with a

2.4GHz chain and a 5GHz chain. Since the two paths could be

operated independent of the other, the 5GHz chain was not

considered for the design of this FEM module.

3a. Transmission Line Design

In order to achieve very low transmission loss between

different components, it is critical to design a 50-ohm

impedance-matched transmission line. The design of the

transmission line depends on the substrate stack-up and

material properties. Since the substrate used here comprises of

two metal layers, a microstrip line (MSL) or a co-planar

waveguide (CPW) configuration is possible. Further, the

minimum line and spacing of the copper structures that can be

realized on this substrate governs whether a MSL or a CPW

can be used. Since the MSL radiates lesser than CPW and also

is less susceptible to EM interference, it is a better choice. To

achieve 50-ohm impedance using a dielectric material with a

dk of 6.2 and ground separation of 35µm, a line width of 32

µm is required. However, to realize such thin lines over

reasonable lengths results in lower substrate yield. On the

other hand, designing a CPW for 50-ohm impedance requires

a trace width of more than 500µm. Hence, combining MSL

and CPW, co-planar ground was included on both sides of a

microstrip line to achieve the target impedance using a

reasonable trace width. Such a conductor-backed CPW

configuration allows for a trace width of 60 µm with the co-

planar ground spaced at 50 µm. The structure of the designed

50-ohm transmission line is shown in Figure 7.

Figure 7. Structure of the 50-ohm transmission line.

Such a configuration also contains the fields of the

transmission line better, and offers higher immunity to EM

interference. The simulated S-parameters of this transmission

line structure are shown in Figure 8. Even for a line of length

10mm, the insertion loss is around 0.3dB and the return loss

more than 30dB. Moreover, having such a design with

coplanar ground enables the measurement of RF signals at any

point in the module, using GSG probes.

Figure 8. Simulated response of 50-ohm transmission line.

3b. Modeling, design and Layout of Band Pass Filter

A novel structure was employed to realize a miniaturized

band-pass filter. The WLAN filter specification included a

pass-band centered on 2.4GHz with less than 2dB insertion

loss, and more than 15dB return loss. The BPF structure is

shown in figure 9. This structure utilizes the ultra-thin

substrate by employing vertical coupling and optimizes its

occupied area through horizontal coupling as well.

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Figure 9. 3D view of the BPF structure.

Considering the different coupling in this structure, the

circuit level schematic is shown in Figure 10. This BPF is

tuned by varying the line-width of the spirals, and the

dimensions of the central metal patch. The basic schematic is

tuned in Agilent ADS circuit simulator, followed by

optimization using full-wave EM simulator- Ansoft HFSS.

L1

L2

L3

L4

C1C2K

Port 1

Port 2

Figure 10. Circuit Schematic of novel BPF structure

The full-wave EM-optimized S-parameter response is

shown in Figure 11. As can be observed, the simulated

insertion loss at 2.35 GHz is around 0.25dB, with a return loss

of more than 30dB. The out-of-band rejection at 4.9 GHz was

around 35dB. The BPF is designed for a lower frequency so

as to adjust for expected frequency shifts (towards higher

frequencies) after fabrication. The dimensions of the BPF are

0.8mm x 0.9mm.

Figure 11. Full-wave 3D-EM simulated BPF response.

3c. Modeling, design and Layout of Low Pass Filter

The schematic employed to design the Low Pass Filter is

shown in Figure 12.

Port 2Port 1

Cg1

Cc

L1 L3

Cg2

L2

Figure 12. Circuit Schematic of the LPF

The schematic values were tuned in Agilent ADS and

optimized using Sonnet- full wave EM solver, to achieve

transmission below 3GHz and a rejection near 5.2GHz. The

optimized structure of the LPF is shown in Figure 13. This

LPF measures 1.1mm x 1mm x 0.05mm.

Figure 13. Full-wave EM optimized layout of LPF

The simulated S-parameter of the LPF is shown in Figure

14. The insertion loss at 2.4 GHz is -0.18dB with more than -

15dB return loss.

Figure 14. Simulated S-parameters of the LPF.

4a. PA module design

To test the isolated PA performance on the organic substrate,

a module with only the PA is designed. The module layout is

shown in Figure 15a. The dimensions of this module substrate

was 10mm x 11mm x 0.05mm. The die was an additional 100

microns thick, surface assembled using thermo-compression

copper-copper bonding. There was no cavity included in this 2

metal-layer design. This module was fabricated, assembled

and characterized to obtain the performance of the PA. This

layout was employed as the basis for the design of the FEM.

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PA dieRFIN

RF OUT

Figure 15a. Layout of PA module

4b. FEM layout and full-wave EM analysis

The Front-End Module layout was performed in Sonnet

EM suite. The different elements such as the TL, BPF and

LPF were directly integrated with the die-pad designs. Since

the LNA and PA dies required back-side wire-bonding to

ground, the ground plane near the dies were allotted for this

purpose. The various parameters that had to be considered for

the module layout were: 1) miniaturization of the area

occupied by the module, 2) minimal parasitics between the

components, 3) spaced-out placement of the surface-mount

components to facilitate SMD assembly, and 4) sufficient

clearance for the GSG RF probe pads to facilitate probe

landing. The top-view of the two-metal layer FEM layout is

shown in Figure 15b. The individual blocks are indicated as

well.

DC-block

cap

Figure 15b. Top view of FEM layout in Sonnet

At the input of the receiver chain, the BPF itself provides a

DC block. However, since a LPF does not block DC currents,

a parallel-plate capacitor was designed at the PA input for

DC-blocking function. This parallel-plate capacitor was

simulated in Sonnet EM suite separately to ensure a cut-off

frequency higher than 2.5GHz.

Sufficient ground-vias were included throughout the layout

to provide a low-inductance ground path. Simulation of the

EM coupling from the PA to LNA, BPF and input

transmission lines was studied through full-wave 3D EM

analysis of this layout. The EM coupling between the PA

output and the LNA input is shown in Figure 16. It can be

observed that the highest coupling is -65dB, indicating very

good isolation.

Figure 16. EM isolation between PA and LNA.

The EM coupling between the PA RF output and the PA

power supply network is shown in Figure 17. It is observed

that even the highest coupling is less than -70dB.

Figure 17. EM isolation from PA output to Power supply.

5. Fabrication and assembly

The first step of the fabrication of the PA module and the

FEM design is the through-via drilling in the 35 µm XL

laminate clad with 4 µm of copper on both sides. The vias are

drilled using LASER ablation. Subsequently, the vias are

metallized through electro-less plating of a seed layer of

thickness 1µm, followed by electrolytic plating up to a surface

copper thickness of 10 µm. A photo-resist is then laminated

on both sides of the core and the designed photo-mask is used

to pattern the photo-resists. After photo-patterning, the

exposed copper is completely etched away to obtain the final

pattern on both sides. Then, a layer of immersion gold was

applied to the exposed metal regions on the sample, through

electro-less deposition. This was the last step for the PA

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module. For the FEM fabrication, after the immersion gold

deposition, the build-up polymer material is laminated using

roll-lamination, and the cavities are made.

After fabrication, the dies and surface-mount components

were assembled. The LNA and PA dies were bonded using

thermo-compression copper-copper bonding. The switch and

the surface-mount components were assembled through solder

reflow. Finally, the LNA and PA backside was connected to

the ground islands on the package, using a thin copper foil.

The foil was mechanically and electrically connected to the

substrate and die backsides using a conductive silver epoxy

paste. Images of the assembled modules are shown in Figure

18.

Figure 18a. Top-view image of assembled PA module.

LPF

LNA

BPF

Switch

PADC Block

Cap

SMDs for Power Supply Decoupling

Figure 18b. Top-view image of assembled FEM.

6. Characterization and analysis

S-parameter characterization was performed using a

Vector Network Analyzer. The BPF, LPF and the PA were

characterized individually. Further, the signal path from the

antenna terminal (GSG pads) through the BPF and Switch was

characterized. The measured BPF and LPF responses are

shown in Figure 19 and Figure 20 respectively, correlated with

simulation. The BPF has a very low insertion loss of 0.25dB at

2.4GHz, with more than 15dB return loss. For the LPF, the

insertion loss was 0.5dB, with 10dB return loss, at 2.4GHz.

Insertion Loss

Return Loss

Simulation

Measurement

Figure 19. Measured response of BPF

Insertion Loss

Return Loss

Simulation

Measurement

Figure 20. Measured response of LPF

A 3V DC signal is provided to the appropriate select pin of

the switch die, to enable either the transmitter or the receiver

paths. The measured 2-port S-parameter response for the

Switch and BPF including the transmission lines is shown in

Figure 21. It can be observed that the loss is around 6dB with

return loss of 11dB.

6dB Insertion Loss at

2.4 GHz

11dB Return Loss

Figure 21. Measured response of Switch+BPF.

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Previously, the LNA dies were demonstrated on XL

substrate and characterized to have a gain of 14dB at 2.4GHz

[13]. Further, from the individual PA module fabricated, the

PA gain performance is shown in Figure 22. The gain is

around 10.8dB with return loss of 20dB. The PA drew a

current of 190mA at a supply of 3.3V.

10.8dB Gain at 2.45 GHz

20dB Return

Loss

Figure 22. Measured response of PA.

The gain of the receiver chain includes the gain of the

LNA and the loss from the switch and BPF. From the

measured performances of the BPF, switch, LNA and

transmission line sections, the gain of the receiver chain can

be estimated to be 9dB, by merging the individually

characterized s-parameter models in Agilent ADS, as shown in

Figure 23. A similar set-up was used for the transmitter chain.

LNA BPF + Switch

Figure 23. ADS setup to combine the s-parameters.

The merged response is shown in Figure 24. It can be

observed that the rejection at 5.2 GHz is more than 30dB.,

indicating very good rejection of the adjacent band (5.2GHz

WiFi) signals.

9 dB Gain at 2.4

GHz

12 dB

Return

Loss

1 2 3 4 5 6 7 8 90 10

-60

-50

-40

-30

-20

-10

0

-70

10

Frequency, GHz

Ma

gn

itu

de

,d

B

Figure 24. Response of receiver chain, obtained from ADS.

The gain of the transmitter section includes the PA gain

and the loss from the switch, LPF and BPF. From the

measured s-parameters of the BPF, switch, LNA and

transmission line sections, the gain of the receiver chain can

be estimated to be 9.6dB by merging the individual measured

S-parameter models in Agilent ADS. The merged response is

shown in Figure 25.

9.6dB Gain at 2.4 GHz

13.5dB

Return Loss

1 2 3 4 5 6 7 8 90 10

-80

-60

-40

-20

0

-100

20

Frequency, GHz

Mag

ni t

ud

e,

dB

Figure 25. Response of transmitter chain, merged using ADS.

7. Conclusions

This paper presents the integration of chip-last embedded

LNA, PA and switch dies, with embedded passives on a single

low-loss advanced organic substrate towards a miniaturized

and integrated WLAN FEM. The ultra-miniaturized BPF has a

footprint of 1mm x 1mm x 0.05mm, and a measured insertion

loss of 0.25dB, with return loss greater than 15dB. The LPF

has 0.5dB insertion loss, and 10dB return loss. The PA shows

a gain of about 11dB, which when merged in ADS with the

other blocks in the transmitter chain result in 9.6dB of gain.

Similarly, the receiver gain obtained by combining the

individual performances of the LNA, switch and passives is

9dB. Thus, this is the first demonstration of a WLAN FEM

with the smallest low-loss BPF, on ultra-thin organic substrate.

Acknowledgments

The authors wish to acknowledge Jason bishop for help

with fabrication and assembly, Gokul Kumar of PRC and

Dr.–Ing. A. Cagri Ulusoy of GEDC for help with RF

measurements; Additionally, we would like to thank the

industry sponsors of the EMAP consortia program at GT-PRC

for their technical guidance.

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