ece 145a / 218 c, notes set 2: transmission line parasitics
TRANSCRIPT
class notes, M. Rodwell, copyrighted 2009-14
ECE 145A / 218 C, notes set 2: Transmission Line Parasitics
Mark Rodwell
University of California, Santa Barbara
[email protected] 805-893-3244, 805-893-3262 fax
class notes, M. Rodwell, copyrighted 2009-14
Transmission Lines
Approximate properties of microstrip line.
Skin Effect Losses
substrate modes and loss by coupling into these.
Lateral modes on lines
Excitation of unwanted circuit-like modes, ground continuity
Packaging and power supply resonances
class notes, M. Rodwell, copyrighted 2009-14
Skin Loss
class notes, M. Rodwell, copyrighted 2009-14
Skin effect losses I
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class notes, M. Rodwell, copyrighted 2009-14
Skin effect losses II
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class notes, M. Rodwell, copyrighted 2009-14
Skin effect losses III
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class notes, M. Rodwell, copyrighted 2009-14
Skin effect losses IV
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Skin effect losses IV
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Loss Tangent
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Loss Tangent
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class notes, M. Rodwell, copyrighted 2009-14
transverse
transmission-line
modes
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Lateral Modes (1)
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Lateral Modes (2)
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Lateral Modes---and Junction Parasitics (3)
parasiticsjunction modelmust
.wavelength-half ahan narrower tmuch bemust lines
:Lessons
.simulation neticelectromagor models,junction library ADS
parasiticsjunction modes evanescentin power Reactive
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zWe z
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Substrate Modes
and
Radiation Loss
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Substrate Modes
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class notes, M. Rodwell, copyrighted 2009-14
Substrate Modes
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mode;- tranversemetal topno withSubstrate
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surfaces metal bottom top, withSubstrate
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Substrate Mode Coupling: Microstrip
4 when coupling mode strongVery
s.frequencie allat loss )radiation"(" coupling mode Nonzero
.in and in propagecan modes slab dielectric These
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Substrate Mode Coupling: CPW
and 2 where
form of are Waves
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class notes, M. Rodwell, copyrighted 2009-14
Substrate Mode Coupling: CPW
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frequencydimensions e transversline dB/mmloss, coupling mode
: substrate, thick Given
henstrongly w couple Modes
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Transmission-Line Losses
problems.major be will
radiation substrate and modes lateral then
substrates thick and lines wideuse weIf
large. be willlosseseffect -skin then
substrates thin and lines narrow use weIf
class notes, M. Rodwell, copyrighted 2009-14
Loss of Coaxial Cable
0.01
0.1
1
10
1 10 100 1000
Atte
nu
atio
n, d
B/m
ete
r
Frequency, GHz
10 mm cable:0.7 dB/m at10 GHz cutof f
3 mm cable:3.1 dB/m at33 GHz cutof f
1 mm cable:14 dB/m at 100 GHz cutof f
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12/1)/2( requiresn propagatio mode-Single outerinnerr DDcf
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class notes, M. Rodwell, copyrighted 2009-14
"circuit-type"
parasitic modes
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Transmission-Line Parasitic Modes
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To Avoid "Circuit-Type" Parasitic Modes
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Example of Parasitic Mode Excitation
I/2
I
I/2
I/2
I
I/2
I/2I/2
A slot-line mode is excited
at a CPW junction
I/2
I
I/2
I/2
I
I/2
The fix...
this is one of many possible
examples...
class notes, M. Rodwell, copyrighted 2009-14
Example of IC using CPW wiring
1-180 GHz HEMT amplifier (UCSB / HRL)
Note the ground bridges
B. Agarwal UCSB, M. Matloubian, HRL
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package resonance
and grounding
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What is Ground Bounce ?
ADC digital sections
input buffer
ground return currents
L ground
D V in ground
bounce
noise
"Ground" simply means a reference potential shared between many circuit paths.
To the extent that it has nonzero impedance, circuits will couple in unexpected ways
RFI, resonance, oscillation, frequently result from poor ground systems
class notes, M. Rodwell, copyrighted 2009-14
Ground Bounce on an IC: break in a ground plane
signal line
signal line
ground
plane
line 1
“ground”
line 2
“ground”
common-lead inductance
coupling / EMI due to poor ground system integrity is common in high-frequency systems
whether on PC boards
...or on ICs.
class notes, M. Rodwell, copyrighted 2009-14
Ground Bounce: IC Packaging with Top-Surface-Only Ground
Bond wire inductance aggravates the
effect: resonates with through-wafer
capacitance at 5-20 GHz
Peripheral grounding allows parallel plate mode resonance
die dimensions must be <0.4mm at 100GHz
IC: parallel-plane transmission line
peripheralbond inductances
peripheralbond inductances
class notes, M. Rodwell, copyrighted 2009-14
Substrate Microstrip: Eliminates Ground Return Problems
a
Brass carrier andassembly ground
interconnectsubstrate
IC with backsideground plane & vias
near-zeroground-groundinductance
IC viaseliminateon-wafergroundloops
class notes, M. Rodwell, copyrighted 2009-14
power-supply resonance
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Power Supply Resonance
onbondCLf 2/1
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Power Supply Resonances; Power Supply Damping
0
10
20
30
40
50
60
70
80
0 20 40 60 80 100
po
we
r su
pp
ly im
pe
da
nce
, O
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s
Frequency (GHz)
90 GHz--local resonance between power supply capacitance and supply lead inductance
~N*5GHz resonances--global standing wave on power supply bus
Power supply is certain to resonate: we must model, simulate, and add damping during design.
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Standard cell showing power busses
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Interconnects:
Summary,
Design Strategy
class notes, M. Rodwell, copyrighted 2009-14
kz
Parasitic slot mode
-V 0V +V
0
V
Coplanar Waveguide: Summary No ground vias
No need (???) to
thin substrate
Parasitic microstrip mode
+V +V +V
0
V
Hard to ground IC
to package
substrate mode coupling
or substrate losses
ground plane breaks → loss of ground integrity
Repairing ground plane with ground straps is effective only in simple ICs
In more complex CPW ICs, ground plane rapidly vanishes
→ common-lead inductance → strong circuit-circuit coupling
40 Gb/s differential TWA modulator driver
note CPW lines, fragmented ground plane
35 GHz master-slave latch in CPW
note fragmented ground plane
175 GHz tuned amplifier in CPW
note fragmented ground plane
poor ground integrity
loss of impedance control
ground bounce
coupling, EMI, oscillation
III-V:
semi-insulating
substrate→ substrate
mode coupling
Silicon
conducting substrate
→ substrate
conductivity losses
class notes, M. Rodwell, copyrighted 2009-14
kz
Classic Substrate Microstrip: Summary
Strong coupling when substrate approaches ~d / 4 thickness
H
W
Thick Substrate
→ low skin loss
Hr
skin 2/1
1
Zero ground
inductance
in package
a
Brass carrier andassembly ground
interconnectsubstrate
IC with backsideground plane & vias
near-zeroground-groundinductance
IC viaseliminateon-wafergroundloops
High via
inductance
12 pH for 100 m substrate -- 7.5 W @ 100 GHz
TM substrate
mode coupling
Line spacings must be ~3*(substrate thickness)
lines must be
widely spaced
ground vias must be
widely spaced
all factors require very thin substrates for >100 GHz ICs
→ lapping to ~50 m substrate thickness typical for 100+ GHz
No ground plane
breaks in IC
class notes, M. Rodwell, copyrighted 2009-14
fewer breaks in ground plane than CPW
III-V MIMIC Interconnects -- Thin-Film Microstrip
narrow line spacing → IC density
... but ground breaks at device placements
still have problem with package grounding
thin dielectrics → narrow lines
→ high line losses
→ low current capability
→ no high-Zo lines
H
W
HW
HZ
r
oo 2/1
~
...need to flip-chip bond
no substrate radiation, no substrate losses
InP mm-wave PA
(Rockwell)
class notes, M. Rodwell, copyrighted 2009-14
No breaks in ground plane
III-V MIMIC Interconnects -- Inverted Thin-Film Microstrip
narrow line spacing → IC density
... no ground breaks at device placements
still have problem with package grounding
thin dielectrics → narrow lines
→ high line losses
→ low current capability
→ no high-Zo lines
...need to flip-chip bond
Some substrate radiation / substrate losses
InP 150 GHz master-slave latch
InP 8 GHz clock rate delta-sigma ADC
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VLSI Interconnects with Ground Integrity & Controlled Zo
negligible breaks in ground plane
narrow line spacing → IC density
negligible ground breaks @ device placements
still have problem with package grounding
thin dielectrics → narrow lines
→ high line losses
→ low current capability
→ no high-Zo lines
...need to flip-chip bond
no substrate radiation, no substrate losses
class notes, M. Rodwell, copyrighted 2009-14
No clean ground return ? → interconnects can't be modeled !
35 GHz static divider
interconnects have no clear local ground return
interconnect inductance is non-local
interconnect inductance has no compact model
InP 8 GHz clock rate delta-sigma ADC
8 GHz clock-rate delta-sigma ADC
thin-film microstrip wiring
every interconnect can be modeled as microstrip
some interconnects are terminated in their Zo
some interconnects are not terminated
...but ALL are precisely modeled
class notes, M. Rodwell, copyrighted 2009-14
End
class notes, M. Rodwell, copyrighted 2009-14
Appendix
(optional)
class notes, M. Rodwell, copyrighted 2009-14
Skin effect losses I
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class notes, M. Rodwell, copyrighted 2009-14
Skin effect losses II
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class notes, M. Rodwell, copyrighted 2009-14
Skin effect losses III
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class notes, M. Rodwell, copyrighted 2009-14
Skin Effect losses, IV
class notes, M. Rodwell, copyrighted 2009-14
Skin effect losses V