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Form #: CSI-D-686 Document 009
Micross US (Americas) 407.298.7100 • Micross UK (EMEA & ROW) +44 (0) 1603 788967 • [email protected] • www.micross.com
April 15, 2015 • Revision 2.0
MYX4DDR3L128M16JT
Features• Tin-leadballmetallurgy
• VDD=VDDQ=1.35V(1.283-1.45V)
• Backward-compatibletoVCC=VCCQ=1.5V±0.075V
• Differentialbidirectionaldatastrobe
• 8n-bitprefetcharchitecture
• Differentialclockinputs(CK,CK#)
• 8internalbanks
• Nominalanddynamicon-dietermination(ODT)fordata,strobe,andmasksignals
• ProgrammableCAS(READ)latency(CL)
• ProgrammablepostedCASadditivelatency(AL)
• ProgrammableCAS(WRITE)latency(CWL)
• Fixedburstlength(BL)of8andburstchop(BC)of4(viathemoderegisterset[MRS])
• SelectableBC4orBL8on-the-fly(OTF)
• Selfrefreshmode
• TCof0°Cto+95°C
� 64ms,8192-cyclerefreshat0°Cto+85°C
� 32msat+85°Cto+95°C
• Automaticselfrefresh(ASR)
Options Code
• Configuration:128Mx16 128M16
• Package:FBGA(Sn63Pb37solder) BG
� Footprint:96-ball(8mmx14mm) JT
• Timing-cycletime
� 1.25ns@CL=11(DDR3-1600) -125
• Operatingtemperature
� Commercial(0°C≤TC≤+95°C) None
� Industrial(-40°C≤TC≤+95°C) IT
• PartMarking:Label(L),Dot(D)
Table 1: Key Timing Parameters
Speed Grade Data Rate (MT/s) Target tRCD-tRP-CL tRCD (ns) tRP (ns) CL (ns)
-125* 1600 11-11-11 13.75
2Gb - 128M x 16 DDR3 SDRAMAdvanced information. Subject to change without notice.
Note:Backwardcompatibleto1066,CL=7(-18)and1333,CL=9(-15)
• Writeleveling
• Multipurposeregister
• Outputdrivercalibration
MicronPart.No.MT41K128M16JT
Form #: CSI-D-686 Document 009
Micross US (Americas) • 407.298.7100Micross UK (EMEA & ROW) • +44 (0) 1603 788967
April 15, 2015 • Revision 2.0
MYX4DDR3L128M16JT • 2Gb - 128M x 16 DDR3 SDRAMAdvanced information. Subject to change without notice.
Figure 1: 96-Ball FBGA Ball Assignments (Top View), JT
Figure 2: Package Dimensions 96-Ball FBGA Package - x16 (JT)
Notes: 1.Alldimensionsareinmillimeters. 2.Solderballmaterial:Sn63/Pb37 3.Micron–MT41K128M16
Figure 2: 96-Ball FBGA – x16 Ball Assignments (Top View)
1 2 3 4 6 7 8 95
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
V DDQ
V SSQ
V DDQ
V SSQ
V SS
V DDQ
V SSQ
V REFDQ
NC
ODT
NC
V SS
V DD
V SS
V DD
V SS
DQ13
V DD
DQ11
V DDQ
V SSQ
DQ2
DQ6
V DDQ
V SS
V DD
CS#
BA0
A3
A5
A7
RESET#
DQ15
V SS
DQ9
UDM
DQ0
LDQS
LDQS#
DQ4
RAS#
CAS#
WE#
BA2
A0
A2
A9
A13
DQ12
UDQS#
UDQS
DQ8
LDM
DQ1
V DD
DQ7
CK
CK#
A10/AP
NC
A12/BC#
A1
A11
NC
V DDQ
DQ14
DQ10
V SSQ
V SSQ
DQ3
V SS
DQ5
V SS
V DD
ZQ
V REFCA
BA1
A4
A6
A8
V SS
V SSQ
V DDQ
V DD
V DDQ
V SSQ
V SSQ
V DDQ
NC
CKE
NC
V SS
V DD
V SS
V DD
V SS
Notes: 1. Ball descriptions listed in Table 4 (page 7) are listed as “x16.”2. A comma separates the con�guration; a slash de�nes a selectable function.
2Gb: x4, x8, x16 DDR3L SDRAMBall Assignments and Descriptions
PDF: 09005aef83ed29522Gb_DDR3L_SDRAM.pdf - Rev. J 4/13 EN 4 Micron Technology, Inc. reserves the right to change products or speci�cations without notice.
© 2010 Micron Technology, Inc. All rights reserved.
Figure 13: 96-Ball FBGA – x16 (JT)
123789
A
B
C
D
E
F
G
H
J
K
L
M
N
Ball A1 ID
Ball A1 ID
0.25 MIN
1.1 ±0.1
0.8 TYP
6.4 CTR
8 ±0.1
0.8 TYP
12 CTR
14 ±0.1
96X Ø0.45Dimensions applyto solder balls post-re�ow on Ø0.35SMD ball pads.
0.155
P
R
T
1.8 CTRNonconductive
overmold
1Gb: x4, x8, x16 DDR3 SDRAMPackage Dimensions
PDF: 09005aef826aa9061Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN 29 Micron Technology, Inc. reserves the right to change products or speci�cations without notice.
2006 Micron Technology, Inc. All rights reserved.
Figure 13: 96-Ball FBGA – x16 (JT)
123789
A
B
C
D
E
F
G
H
J
K
L
M
N
Ball A1 ID
Ball A1 ID
0.25 MIN
1.1 ±0.1
0.8 TYP
6.4 CTR
8 ±0.1
0.8 TYP
12 CTR
14 ±0.1
96X Ø0.45Dimensions applyto solder balls post-re�ow on Ø0.35SMD ball pads.
0.155
P
R
T
1.8 CTRNonconductive
overmold
1Gb: x4, x8, x16 DDR3 SDRAMPackage Dimensions
PDF: 09005aef826aa9061Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN 29 Micron Technology, Inc. reserves the right to change products or speci�cations without notice.
2006 Micron Technology, Inc. All rights reserved.