microprocessor and microcontroller based systems instructor: eng.moayed n. el mobaied the islamic...
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Microprocessor and Microcontroller Based Systems
Instructor: Eng.Moayed N. EL Mobaied
The Islamic University of GazaFaculty of EngineeringElectrical Engineering Department
الرحمن الله بسمالرحيم
EELE 4315 — Fall 2010
Lecture 12
An Interrupt Review
An Interrupt is an external input to the CPU.
The interrupt facility allows the processor to respond rapidly to external changes.
When an Interrupt is detected by the CPU, it:
- completes the current instruction,
- stores the address of the next instruction onto the stack, and possibly other key variables (e.g. contents of Work and Status
Register) into (stack or GPR),
- jumps to an interrupt service routine (ISR), whose address is determined by an "interrupt vector".
Interrupt Interrupt
Many interrupts can be masked, ie disabled, by setting a bit in a control register. In some processors however (but not PIC), some interrupts are non-maskable.
•If an Interrupt is masked, then there is a possibility that it will not be detected.
• Therefore there are also Interrupt Flags, bits in SFRs, which are set whenever an associated interrupt occurs.
• These record the fact that an interrupt has occurred, even if the CPU is unable to respond to it.
•An Interrupt that has occurred, but has not received CPU response, is called a Pending Interrupt.
•In the case of several interrupts, one ISR is completed before the next interrupt is responded to.
Interrupt Interrupt
The Reset Vector
Interrupt Routine always starts here
Control SFR(s)
Peripheral
Data Transfer SFR(s)
Microcontroller
Core
"Outside
World"
Interrupt(s)
Microcontroller Interaction with Peripherals, via SFR and Interrupt
Interfacing with Peripherals
Recalling Interrupt-Related Points that have already Come up
Interrupt Interrupt
Sources of interrupt:
In the PIC16F84A, there are four source of interrupt:
1. External interrupt from RB0/INT pin of microcontroller
2. Interrupt during alteration on RB4, RB5, RB6 and RB7 pins of port B.
3. TMR0 interrupt caused by timer overflow.
4.Termination of writing data to EEPROM.
Interrupt Interrupt
Registers used with interrupt:
1. Control interrupt register (INTCON) at 0Bh address.
2. Option register at 81h address.
3. Control EEPROM register (EECON 1) at 88h address.
The most important register is (INTCON).
Interrupt Interrupt
We can use the bits of INTCON register to make interrupt as follow:
1 (First we set GIE bit which must be enabled for any interrupt.
2 (Second we enable one of this bits( T0IE ,EEIE , RBIE,INTE) as we like to use the interrupt:
If we use external interrupt , we set INTE to 1.If we use RB interrupt , we set RBIE to 1.If we use TMR0 interrupt , we set T0IE to 1.If we use EEPROM interrupt , we set EEIE 1.
3 (When interrupt occurred , the one of flag bits (INTF, RBIF, TOIF) is set physically so it must be cleared in software.
Interrupt Interrupt
The PIC 16F84A INTCON Register
Interrupt Interrupt
The PIC 16F84A OPTION Register
Interrupt Interrupt
Interrupt
The PIC 16F84A Interrupt Structure
Global Interrupt Enable
External Interrupt
EEPROM Write Complete
Port B Change
Timer Overflow
Interrupt Flag
RA2
RA3
RA4/T0CKI
MCLR
V
RB0/INT
RB1
RB2
RB3 RB4
RB5
RB6
RB7
RA1
RA0
OSC1/CLKIN
OSC2/CLKOUT
VDDSS Supply voltage
Oscillator connections
Port A, Bit 0
Port A, Bit 1Port A, Bit 2
Port A, Bit 3
*Port A, Bit 4
Ground
**Port B, Bit 0
Port B, Bit 1
Port B, Bit 2
Port B, Bit 3
Port B, Bit 7
Port B, Bit 6
Port B, Bit 5
Port B, Bit 4
*also Counter/Timer clock input
**also external Interrupt input
Reset
1
9 10
18
External Interrupt input
Note that the interrupt flags are set by the interrupt action, but must be cleared in the program, during the ISR. What happens if this isn’t done?
Interrupt Interrupt
S Q
InterruptFlag*
Interrupt X
Interrupt X Enable*
OtherGlobal Interrupt Enable*
Non-maskable
Interrupt
Interrupt
inputs to
CPUR(reset by CPUor program)
* bits in a Special Function Register
interruptsmaskablereplicated for all other maskable interrupts
A Generic Interrupt Structure
Interrupt Interrupt
Interrupt
Interrupt Detected
Complete Current Instruction
Save Program Counter on Stack
Reload PC with 0004H
Continue Program Execution
Instruction is RETFIE?
No
Set GIE to 1
Load PC from Stack
Continue Program Execution
Yes
Clear GIE
ISR execution starts
main program is running
main program continues
The PIC 16 Series Interrupt Response
Note that this diagram shows what the PIC microcontroller itself does as an interrupt occurs. The programmer need not worry about any of these actions, but needs to know that they’re happening.
Interrupt Interrupt
Interrupt
Interrupt
The step of push and pop is performed because the contents of the most important registers may change during the interrupt.
The most important registers we must keep is the work register and status register and this is done by storing the work and the status registers.
After writing the main body of the interrupt and we can restore the status register then restore the W register
Interrupt Interrupt
Procedure of recording important registers before going to an interrupt routine is called PUSH, while the procedure which brings recorded values back, is called POP.
PUSH and POP are instructions with some other microcontrollers (Intel), but are so widely accepted that a whole operation is named after them.
PIC16F84 does not have instructions like PUSH and POP, and they have to be programmed.
Interrupt Interrupt
The contents of W and STATUS registers are stored in W_TEMP and STATUS_TEMP variables (two registers in GPR).
For exchange of data between these registers, SWAPF instruction is used instead of MOVF because it does not affect the status of STATUS register bits.
Interrupt Interrupt
Example is a program assembler for following steps:
1. Storing W register in GPR.
2. Storing STATUS register in GPR.
4. Executing interrupt routine for interrupt processing (ISR)
5. Restores STATUS register
6. Restores W register
Interrupt Interrupt
Interrupt Interrupt
Flasher on D1 using delayToggle on D2 using int0
Interrupt Interrupt
Interrupt Interrupt
Interrupt Interrupt
Return from interrupt routine can be accomplished with instructions RETURN, RETLW and RETFIE.
When interrupt was answered, GIE bit was cleared so that anyadditional interrupts would be disabled,
It is recommended that instruction RETFIE be used because that instruction is the only one which automatically sets the GIE bit which allows new interrupts to occur.
H.WH.W
Deadline (4/11)1- using external interrupt INT0 to implement a counter to counts
from 0000 to 1111 at falling edge input2- using external interrupt INT0 to implement a counter to counts
from 1111 to 0000 at rising edge input3- using external INT0 to toggle the flash from 4 leds in portA to a
4 leds in portB
4- using interrupt technique with tmr0 to implement 1.5sec delay5- using interrupt technique with tmr0 to implement 15 u sec delay
6- using interrupt technique with tmr0 to implement 15 m sec delay