messenger development without internet using zigbee technology

MESSENGER DEVELOPMENT WITHOUT INTERNET USING ZIGBEE TECHNOLOGY

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INDEX CONTENTS

1. Introduction

2. Block Diagram

3. Block Diagram Description

4. Schematic

5. Schematic Description

6. Hardware Components

b. Micro Controllers(AT89S52)

c. Power Supply

d. ZIGBEE Transceivers

e. LCD

f. PS2 CABLE

g. Keypad(PS2)

1. Circuit Description

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2. Software componentsa. About Kielb. Embedded ‘C’

3. KEIL procedure description

4. Conclusion (or) Synopsis

5. Future Aspects

6. Bibliography

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INTRODUCTION

1.1 EMBEDDED SYSTEMS

Embedded systems are designed to do some specific task, rather than be a

general-purpose computer for multiple tasks. Some also have real time performance

constraints that must be met, for reason such as safety and usability; others may have low

or no performance requirements, allowing the system hardware to be simplified to reduce

costs.

An embedded system is not always a separate block - very often it is physically

built-in to the device it is controlling. The software written for embedded systems is often

called firmware, and is stored in read-only memory or flash convector chips rather than a

disk drive. It often runs with limited computer hardware resources: small or no keyboard,

screen, and little memory.

Wireless communication has become an important feature for commercial

products and a popular research topic within the last ten years. There are now more

mobile phone subscriptions than wired-line subscriptions. Lately, one area of commercial

interest has been low-cost, low-power, and short-distance wireless communication used

for \personal wireless networks." Technology advancements are providing smaller and

more cost effective devices for integrating computational processing, wireless

communication, and a host of other functionalities. These embedded communications

devices will be integrated into applications ranging from homeland security to industry

automation and monitoring. They will also enable custom tailored engineering solutions,

creating a revolutionary way of disseminating and processing information. With new

technologies and devices come new business activities, and the need for employees in

these technological areas. Engineers who have knowledge of embedded systems and

wireless communications will be in high demand. Unfortunately, there are few adorable

environments available for development and classroom use, so students often do not learn

about these technologies during hands-on lab exercises. The communication mediums

were twisted pair, optical fiber, infrared, and generally wireless radio.

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BLOCK DIAGRAM:

PERSON 1:

MICRO CONTROLLER

MAX232

ZIGBEE TRANSCEI

VER

Power supply

KEY PAD

LCD DISPLAY

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PERSON 2:

MICRO CONTROLLER

PC&KEY PAD

ZIGBEE TRANSCEI

VER

Power supply

MAX232

LCD DISPLAY

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2.1 MICROCONTROLLER

2.1.1 A Brief History of 8052

In 1981, Intel Corporation introduced an 8 bit microcontroller called 8051. This

microcontroller had 128 bytes of RAM, 4K bytes of chip ROM, two timers, one serial

port, and four ports all on a single chip. At the time it was also referred as “A SYSTEM

ON A CHIP”

The 8051 is an 8-bit processor meaning that the CPU can work only on 8 bits data

at a time. Data larger than 8 bits has to be broken into 8 bits pieces to be processed by the

CPU. The 8051 has a total of four I\O ports each 8 bit wide.

There are many versions of 8051 with different speeds and amount of on-chip

ROM and they are all compatible with the original 8051. This means that if you write a

program for one it will run on any of them.

The 8051 is an original member of the 8051 family. There are two other members

in the 8051 family of microcontrollers. They are 8052 and 8031. All the three

microcontrollers will have the same internal architecture, but they differ in the following

aspects.

8031 has 128 bytes of RAM, two timers and 6 interrupts.

89S51 has 4KB ROM, 128 bytes of RAM, two timers and 6

interrupts.

89S52 has 8KB ROM, 128 bytes of RAM, three timers and 8

interrupts.

Of the three microcontrollers, 89S51 is the most preferable. Microcontroller

supports both serial and parallel communication.

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In the concerned project 89S52 microcontroller is used. Here microcontroller used

is AT89S52, which is manufactured by ATMEL laboratories.

2.1.2 Description of 89S52 Microcontroller

The AT89S52 provides the following standard features: 8Kbytes of Flash, 256

bytes of RAM, 32 I/O lines, three 16-bit timer/counters, six-vector two-level interrupt

architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition,

the AT89S52 is designed with static logic for operation down to zero frequency and

supports two software selectable power saving modes. The Idle Mode stops the CPU

while allowing the RAM, timer/counters, serial port, and interrupt system to continue

functioning. The Power down Mode saves the RAM contents but freezes the oscillator,

disabling all other chip functions until the next hardware reset.

By combining a versatile 8-bit CPU with Flash on a monolithic chip, the

AT89S52 is a powerful microcomputer which provides a highly flexible and cost

effective solution to many embedded control applications.

2.1.3 Features of Microcontroller (89S52)

Compatible with MCS-51 Products

8 Kbytes of In-System Reprogrammable Flash Memory

Endurance: 1,000 Write/Erase Cycles

Fully Static Operation: 0 Hz to 24 MHz

Three-Level Program Memory Lock

256 x 8-Bit Internal RAM

32 Programmable I/O Lines

Three 16-Bit Timer/Counters

Eight vector two level Interrupt Sources

Programmable Serial Channel

Low Power Idle and Power Down Modes

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In addition, the AT89S52 is designed with static logic for operation down to zero

frequency and supports two software selectable power saving modes.

The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port

and interrupt system to continue functioning. The Power down Mode saves the RAM

contents but freezes the oscillator disabling all other chip functions until the next

hardware reset.

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Block Diagram of Microcontroller

Figure: Block Diagram Of 89S52

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2.1.5 Pin Configurations

Figure 2.2 Pin Diagram of 89S52

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Pin Description

VCC

Pin 40 provides Supply voltage to the chip. The voltage source is +5v

GND.

Pin 20 is the grounded

Port 0

Port 0 is an 8-bit open drain bidirectional I/O port from pin 32 to 39. As an output

port each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can

be used as high-impedance inputs. Port 0 may also be configured to be the multiplexed

low-order address/data bus during accesses to external program and data memory. In this

mode P0 has internal pull-ups.

Port 0 also receives the code bytes during Flash programming, and outputs the

code bytes during program verification. External pull-ups are required during program

verification.

Port 1

Port 1 is an 8-bit bidirectional I/O port with internal pull-ups from pin 1 to 8. The

Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins

they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1

pins that are externally being pulled low will source current (IIL) because of the internal

pull-ups.

In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external

count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as

shown in following table.

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Port 1 also receives the low-order address bytes during Flash programming and

program verification.

Port 2

Port 2 is an 8-bit bidirectional I/O port with internal pull-ups from pin 21 to 28.

The Port 2 output buffers can sink / source four TTL inputs. When 1s are written to Port

2 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs,

Port 2 pins that are externally being pulled low will source current (IIL) because of the

internal pull-ups.

Port 2 emits the high-order address byte during fetches from external program

memory and during accesses to external data memory that uses 16-bit addresses (MOVX

@ DPTR). In this application it uses strong internal pull-ups when emitting 1s. During

accesses to external data memory that uses 8-bit addresses (MOVX @ RI), Port 2 emits

the contents of the P2 Special Function Register. Port 2 also receives the high-order

address bits and some control signals during Flash programming and verification.

Port 3

Port 3 is an 8-bit bidirectional I/O port with internal pull-ups from pin 10 to 17.

The Port 3 output buffers can sink / source four TTL inputs. When 1s are written to

Port 3 pins they are pulled high by the internal pull-ups and can be used as inputs. As

inputs, Port 3 pins that are externally being pulled low will source current (IIL)

because of the pull-ups.

Port 3 also serves the functions of various special features of the AT89S52 as

listed below:

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Table 2.1 Special Features of port3

Port 3 also receives some control signals for Flash programming and

programming verification.

RST

Pin 9 is the Reset input. It is active high. Upon applying a high pulse to this pin,

the microcontroller will reset and terminate all activities. A high on this pin for two

machine cycles while the oscillator is running resets the device.

ALE/PROG

Address Latch is an output pin and is active high. Address Latch Enable output

pulse for latching the low byte of the address during accesses to external memory.

This pin is also the program pulse input (PROG) during Flash programming. In

normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and

may be used for external timing or clocking purposes.

Note, however, that one ALE pulse is skipped during each access to external Data

Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location

8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction.

Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if

the microcontroller is in external execution mode.

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PSEN

Program Store Enable is the read strobe to external program memory. When the

AT89S52 is executing code from external program memory, PSEN is activated twice

each machine cycle, except that two PSEN activations are skipped during each access to

external data memory.

EA/VPP

External Access Enable EA must be strapped to GND in order to enable the

device to fetch code from external program memory locations starting at 0000H up to

FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on

reset. EA should be strapped to VCC for internal program executions. This pin also

receives the 12-volt programming enable voltage (VPP) during Flash programming when

12-volt programming is selected.

XTAL1

Input to the inverting oscillator amplifier and input to the internal clock operating

circuit.

XTAL2

Output from the inverting oscillator amplifier.

Oscillator Characteristics

XTAL1 and XTAL2 are the input and output, respectively, of an inverting

amplifier which can be configured for use as an on chip oscillator, as shown in Figure

5.3. Either a quartz crystal or ceramic resonator may be used. To drive the device from an

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external clock source, XTAL2 should be left unconnected while XTAL1 is driven as

shown in Figure 5.4.

Figure 2.3 crystal connections

Figure 2.4 External Clock Drive Configuration

There are no requirements on the duty cycle of the external clock signal, since the

input to the internal clocking circuitry is through a divide-by two flip-flop, but minimum

and maximum voltage high and low time specifications must be observed.

Idle Mode

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In idle mode, the CPU puts itself to sleep while all the on-chip peripherals remain

active. The mode is invoked by software. The content of the on-chip RAM and all the

special functions registers remain unchanged during this mode. The idle mode can be

terminated by any enabled interrupt or by a hardware reset. It should be noted that when

idle is terminated by a hardware reset, the device normally resumes program execution,

from where it left off, up to two machine cycles before the internal reset algorithm takes

control.

On-chip hardware inhibits access to internal RAM in this event, but access to the

port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin

when Idle is terminated by reset, the instruction following the one that invokes Idle

should not be one that writes to a port pin or to external memory.

Power down Mode

In the power down mode the oscillator is stopped, and the instruction that invokes

power down is the last instruction executed. The on-chip RAM and Special Function

Registers retain their values until the power down mode is terminated. The only exit from

power down is a hardware reset. Reset redefines the SFRs but does not change the on-

chip RAM. The reset should not be activated before VCC is restored to its normal

operating level and must be held active long enough to allow the oscillator to restart and

stabilize.

Table 2.2 Status Of External Pins During Idle and Power Down Mode

Program Memory Lock Bits

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On the chip are three lock bits which can be left unprogrammed (U) or can be

programmed (P) to obtain the additional features listed in the table 5.4. When lock bit 1 is

programmed, the logic level at the EA pin is sampled and latched during reset. If the

device is powered up without a reset, the latch initializes to a random value, and holds

that value until reset is activated. It is necessary that the latched value of EA be in

agreement with the current logic level at that pin in order for the device to function

properly.

Table 2.3 Lock Bit Protection Modes

TIMERS

Timer 0 and 1

Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and Timer

1 in the AT89S52.

Register pairs (TH0, TL1), (TH1, TL1) are the 16-bit counter registers for timer/c;

ounters 0 and 1.

Timer 2

Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event

counter. The type of operation is selected by bit C/T2 in the SFR T2CON. Timer 2 has

three operating modes: capture, auto-reload (up or down counting), and baud rate

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generator. The modes are selected by bits in T2CON, as shown in Table 5.2. Timer 2

consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is

incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods,

the count rate is 1/12 of the oscillator frequency.

Table 2.4 Timer 2 Operating Modes

In the Counter function, the register is incremented in response to a 1-to-0

transition at its corresponding external input pin, T2. In this function, the external input is

sampled during S5P2 of every machine cycle. When the samples show a high in one

cycle and a low in the next cycle, the count is incremented. The new count value appears

in the register during S3P1 of the cycle following the one in which the transition was

detected. Since two machine cycles (24 oscillator periods) are required to recognize a 1-

to-0 transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure that

a given level is sampled at least once before it changes, the level should be held for at

least one full machine cycle.

There are no restrictions on the duty cycle of external input signal, but it should

for at least one full machine to ensure that a given level is sampled at least once before it

changes.

Capture Mode

In the capture mode, two options are selected by bit EXEN2 in T2CON. If

EXEN2 = 0, Timer 2 is a 16-bit timer or counter which upon overflow sets bit TF2 in

T2CON.This bit can then be used to generate an interrupt. IfEXEN2 = 1, Timer 2

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performs the same operation, but a 1-to-0 transition at external input T2EX also causes

the current value in TH2 and TL2 to be captured into RCAP2H andRCAP2L,

respectively. In addition, the transition at T2EXcauses bit EXF2 in T2CON to be set. The

EXF2 bit, likeTF2, can generate an interrupt.

Auto-reload (Up or Down Counter)

Timer 2 can be programmed to count up or down when configured in its 16-bit

auto-reload mode. This feature is invoked by the DCEN (Down Counter Enable) bit

located in the SFR T2MOD (see Table 4). Upon reset, the DCEN bit is set to 0 so that

timer 2 will default to count up. When DCEN is set, Timer 2 can count up or down,

depending on the value of the T2EX pin.

Table: T2MOD-Timer 2 Mode Control Register

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Table2.6: T2CON-Timer/Counter2 Control Register

Interrupts

The AT89S52 has a total of six interrupt vectors: two external interrupts (INT0

and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These

interrupts are all shown in Figure 2.5

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Figure 2.5 Interrupts source

Each of these interrupt sources can be individually enabled or disabled by setting

or clearing a bit in Special Function Register IE. IE also contains a global disable bit, EA,

which disables all interrupts at once.

Note that Table 5.3 shows that bit position IE.6 is unimplemented. In the

AT89C51, bit position IE.5 is also unimplemented. User software should not write 1s to

these bit positions, since they may be used in future AT89 products.

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Table Interrupts Enable Register

Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register

T2CON. Neither of these flags is cleared by hardware when the service routine is

vectored to. In fact, the service routine may have to determine whether it was TF2 or

EXF2 that generated the interrupt, and that bit will have to be cleared in software.

The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in

which the timers overflow. The values are then polled by the circuitry in the next cycle.

However, the Timer 2 flag, TF2, is set at S2P2 and is polled in the same cycle in which

the timer overflows.

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2.1.6 Special function registers:

Special function registers are the areas of memory that control specific

functionality of the 89S52 microcontroller.

a) Accumulator (0E0h)

As its name suggests, it is used to accumulate the results of large no. of

instructions. It can hold 8 bit values.

b) B register (oFoh)

The B register is very similar to accumulator. It may hold 8-bit value. The B

register is only used by MUL AB and DIV AB instructions. In MUL AB the higher byte

of the products gets stored in B register. In DIV AB the quotient gets stored in B with the

remainder in A.

c) Stack pointer (081h)

The stack pointer holds 8-bit value. This is used to indicate where the next value

to be removed from the stack should be taken from. When a value is to be pushed on to

the stack, the 8052 first store the value of SP and then store the value at the resulting

memory location. When a value is to be popped from the stack, the 8052 returns the value

from the memory location indicated by SP and then decrements the value of SP.

d) Data pointer (Data pointer low/high, address 82/83h)

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The SFRs DPL and DPH work together to represent a 16-bit value called the data

pointer. The data pointer is used in operations regarding external RAM and some

instructions code memory. It is a 16-bit SFR and also an addressable SFR.

e) Program counter

The program counter is a 16 bit register, which contains the 2 byte address, which

tells the next instruction to execute to be found in memory. When the 8052 is initialized

PC starts at 0000h and is incremented each time an instruction is executes. It is not

addressable SFR.

f) PCON (power control, 87h)

The power control SFR is used to control the 8052’s power control modes.

Certain operation modes of the 8052 allow the 8052 to go into a type of “sleep mode”

which consumes low power.

g)TCON(Timer control, 88h)

The timer mode control SFR is used to configure and modify the way in which

the 8052’s two timers operate. This SFR controls whether each of the two timers is

running or stopped and contains a flag to indicate that each timer has overflowed.

Additionally, some non-timer related bits are located in TCON SER. These bits are used

to configure the way in which the external interrupt flags are activated, which are set

when an external interrupt occur.

SMOD ---- --- ---- GF1 GF0 PD IDL

TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

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h)TMOD(Timer Mode,89h)

The timer mode SFR is used to configure the mode of operation of each of the

two timers. Using this SR your program may configure each timer to be a 16-bit timer, or

13 bit timer, 8-bit auto reload timer, or two separate timers. Additionally you may

configure the timers to only count when an external pin is activated or to count “events”

that are indicated on an external pin.

TIMER1 TIMER0

i) T0 (Timer 0 low/ high, address 8A/ 8C h)

These two SFRs together represent timer 0. Their exact behavior depends on how

the timer is configured in the TMOD SFR; however, these timers always count up. What

is configurable is how and when they increment value.

j) T1 (Timer 1 low/ high, address 8B/ 8D h)

These two SFRs together represent timer 1. Their exact behavior depends on how

the timer is configured in the TMOD SFR; however, these timers always count up. What

is configurable is how and when they increment in value.

k) P0 (Port 0, address 80h, bit addressable)

Gate

C/ T M1 M0 Gate

C/ T M1 M0

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This is port 0 latch. Each bit of this SFR corresponds to one of the pins on a micro

controller. Any data to be outputted to port 0 is first written on P0 register. For e.g., bit 0

of port 0 is pin P0.0, bit 7 is pin P0.7. Writing a value of 1 to a bit of this SFR will send a

high level on the corresponding I/O pin whereas a value of 0 will bring it to low level.

l) P1(Port 1, address 90h, bit addressable)





m) P2 (Port 2, address 0A0h, bit addressable)





n) P3 (Port 3, address 0B0h, bit addressable)





o) IE (Interrupt Enable, 0A8h)

The interrupt enable SFR is used to enable and disable specific interrupts. The

low 7 bits of the SFR are used to enable/disable the specific interrupts, where the MSB

bit is used to enable or disable all the interrupts. Thus, if the high bit of IE 0 all interrupts

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are disabled regardless of whether an individual interrupt is enabled by setting a lower

bit.

EA

_ _ _

ET2 ES ET1 EX1 ET0 EX0

p) IP (Interrupt Priority, 0B8h)

The interrupt priority SFR is used to specify the relative priority of each interrupt.

On 8052, an interrupt may be either low or high priority. An interrupt may interrupt

interrupts. For e.g., if we configure all interrupts as low priority other than serial

interrupt. The serial interrupt always interrupts the system; even if another interrupt is

currently executing no other interrupt will be able to interrupt the serial interrupt routine

since the serial interrupt routine has the highest priority.

_ _ _ _ _ _

PT2 PS PT1 PX1 PT0 PX0

q)PSW (Program Status Word, 0D0h)

The Program Status Word is used to store a number of important bits that are set

and cleared by 8052 instructions. The PSW SFR contains the carry flag, the auxiliary

carry flag, the parity flag and the overflow flag. Additionally, it also contains the register

bank select flags, which are used to select, which of the “R” register banks currently in

use.

CY AC F0 RS1 RS0 OV - - - - P

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r) SBUF (Serial Buffer, 99h)

SBUF is used to hold data in serial communication. It is physically two registers.

One is writing only and is used to hold data to be transmitted out of 8052 via TXD. The

other is read only and holds received data from external sources via RXD. Both mutually

exclusive registers use address 99h.

2.1.7 Memory Organization

The total memory of 89S52 system is logically divided in Program memory and

Data memory. Program memory stores the programs to be executed, while data memory

stores the data like intermediate results, variables and constants required for the execution

of the program. Program memory is invariably implemented using EPROM, because it

stores only program code which is to be executed and thus it need not be written into.

However, the data memory may be read from or written to and thus it is implemented

using RAM.

Further, the program memory and data memory both may be categorized as on-

chip (internal) and external memory, depending upon whether the memory physically

exists on the chip or it is externally interfaced. The 89S52 can address 8Kbytes on-chip

memory whose map starts from 0000H and ends at 1FFFH. It can address 64Kbytes of

external program memory under the control of PSEN (low) signal.

The AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes

occupy a parallel address space to the Special Function Registers. That means the upper

128bytes have the same addresses as the SFR space but are physically separate from SFR

space. When an instruction accesses an internal location above address 7FH, the address

mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of

RAM or the SFR space. Instructions that use direct addressing access SFR space. For

example, the following direct addressing instruction accesses the SFR at location 0A0H

(which is P2).

MOV 0A0H, #data

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Instructions that use indirect addressing access the upper128 bytes of RAM. For

example, the following indirect addressing instruction, where R0 contains 0A0H,

accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H)

.MOV @R0, #data

Note that stack operations are examples of indirect addressing, so the upper 128 bytes of

data RAM are available as stack space.

2.2 POWER SUPPLY

DESCRIPTIONA variable regulated power supply, also called a variable bench power supply, is

one where you can continuously adjust the output voltage to your requirements. Varying

the output of the power supply is the recommended way to test a project after having

double checked parts placement against circuit drawings and the parts placement guide.

This type of regulation is ideal for having a simple variable bench power supply. Actually

this is quite important because one of the first projects a hobbyist should undertake is the

construction of a variable regulated power supply. While a dedicated supply is quite

handy e.g. 5V or 12V, it's much handier to have a variable supply on hand, especially for

testing. Most digital logic circuits and processors need a 5 volt power supply. To use

these parts we need to build a regulated 5 volt source. Usually you start with an

unregulated power supply ranging from 9 volts to 24 volts DC (A 12 volt power supply is

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included with the Beginner Kit and the Microcontroller Beginner Kit.). To make a 5 volt

power supply, we use a LM7805 voltage regulator IC .

FIG-10 Voltage Regulator-LM7805

The LM7805 is simple to use. You simply connect the positive lead of your

unregulated DC power supply (anything from 9VDC to 24VDC) to the Input pin, connect

the negative lead to the Common pin and then when you turn on the power, you get a 5

volt supply from the Output pin.

CIRCUIT FEATURES

Brief description of operation: Gives out well regulated +5V output, output current

capability of 100 mA

Circuit protection: Built-in overheating protection shuts down output when regulator IC

gets too hot

Circuit complexity: Very simple and easy to build

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http://www.iguanalabs.com/mbkit.htm

http://www.iguanalabs.com/1stled.htm

Circuit performance: Very stable +5V output voltage, reliable operation

Availability of components: Easy to get, uses only very common basic components

Design testing: Based on datasheet example circuit, I have used this circuit successfully

as part of many electronics projects

Applications: Part of electronics devices, small laboratory power supply

Power supply voltage: Unregulated DC 8-18V power supply

Power supply current: Needed output current + 5 mA

Component costs: Few dollars for the electronics components + the input transformer

cost

BLOCK DIAGRAM

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Step DownTransformer

BridgeRectifier

FilterCircuit

Regulator section

FIG-11 Block Diagram of Power Supply

CIRCUITDIAGRAM

FIG-12Circuit Diagram of Power Supply

BASIC POWER SUPPLY CIRCUIT

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Above is the circuit of a basic unregulated dc power supply. A bridge rectifier

D1 to D4 rectifies the ac from the transformer secondary, which may also be a block

rectifier such as WO4 or even four individual diodes such as 1N4004 types. (See later re

rectifier ratings).

The principal advantage of a bridge rectifier is you do not need a centre tap on the

secondary of the transformer. A further but significant advantage is that the ripple

frequency at the output is twice the line frequency (i.e. 50 Hz or 60 Hz) and makes

filtering somewhat easier.

As a design example consider we wanted a small unregulated bench supply for

our projects. Here we will go for a voltage of about 12 - 13V at a maximum output

current (IL) of 500ma (0.5A). Maximum ripple will be 2.5% and load regulation is 5%.

Now the RMS secondary voltage (primary is whatever is consistent with your

area) for our power transformer T1 must be our desired output Vo PLUS the voltage

drops across D2 and D4 ( 2 * 0.7V) divided by 1.414.

This means that Vsec = [13V + 1.4V] / 1.414 which equals about 10.2V.

Depending on the VA rating of your transformer, the secondary voltage will vary

considerably in accordance with the applied load. The secondary voltage on a transformer

advertised as say 20VA will be much greater if the secondary is only lightly loaded.

If we accept the 2.5% ripple as adequate for our purposes then at 13V this

becomes 13 * 0.025 = 0.325 Vrms. The peak to peak value is 2.828 times this value. Vrip

= 0.325V X 2.828 = 0.92 V and this value is required to calculate the value of C1. Also

required for this calculation is the time interval for charging pulses. If you are on a 60Hz

system it it 1/ (2 * 60 ) = 0.008333 which is 8.33 milliseconds. For a 50Hz system it is

0.01 sec or 10 milliseconds.

Remember the tolerance of the type of capacitor used here is very loose. The

important thing to be aware of is the voltage rating should be at least 13V X 1.414 or

18.33. Here you would use at least the standard 25V or higher (absolutely not 16V).With

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our rectifier diodes or bridge they should have a PIV rating of 2.828 times the Vsec or at

least 29V. Don't search for this rating because it doesn't exist. Use the next highest

standard or even higher. The current rating should be at least twice the load current

maximum i.e. 2 X 0.5A or 1A. A good type to use would be 1N4004, 1N4006 or 1N4008

types.

These are rated 1 Amp at 400PIV, 600PIV and 1000PIV respectively. Always be

on the lookout for the higher voltage ones when they are on special.

TRANSFORMER RATING

In our example above we were taking 0.5A out of the Vsec of 10V. The VA

required is 10 X 0.5A = 5VA. This is a small PCB mount transformer available in

Australia and probably elsewhere.

This would be an absolute minimum and if you anticipated drawing the maximum

current all the time then go to a higher VA rating.

The two capacitors in the primary side are small value types and if you don't

know precisely and I mean precisely what you are doing then OMIT them. Their loss

won't cause you heartache or terrible problems.

The fuse F1 must be able to carry the primary current but blow under excessive

current, in this case we use the formula from the diagram. Here N = 240V / 10V or

perhaps 120V / 10V. The fuse calculates in the first instance to [ 2 X 0.5A ] / [240 / 10]

or .04A or 40 ma. In the second case .08A or 80 ma. The difficulty here is to find suitable

fuses of that low a current and voltage rating. In practice you use the closest you can get

(often 100 ma ). Don't take that too literal and use 1A or 5A fuses.

35

2.2 ZIGBEE Technology

2.2. 1 Zig-bee

Zig-bee is a specification for a suite of high level communication protocols using small,

low-power digital radios based on the IEEE 802.15.4-2006 standard for wireless personal

area networks (WPANs), such as wireless headphones connecting with cell phones via

short-range radio. The technology defined by the Zig-bee specification is intended to be

simpler and less expensive than other WPANs, such as Bluetooth. Zig-bee is targeted at

radio-frequency (RF) applications that require a low data rate, long battery life, and

secure networking.

Zig-bee is a low data rate, two-way standard for home automation and data networks. The

standard specification for up to 254 nodes including one master, managed from a single

remote control. Real usage examples of Zig-bee includes home automation tasks such as

turning lights on, setting the home security system, or starting the VCR. With Zig-bee all

these tasks can be done from anywhere in the home at the touch of a button. Zig-bee also

allows for dial-in access via the Internet for automation control.

The Zig-bee standard uses small very low-power devices to connect together to form a

wireless control web. A Zig-bee network is capable of supporting up to 254 client nodes

plus one full functional devices (master). Zig-bee protocol is optimized for very long

battery life measured in months to years from inexpensive, off-the-shelf non-rechargeable

batteries, and can control lighting, air conditioning and heating, smoke and fire alarms,

and other security devices. The standard supports 2.4 GHz (worldwide), 868 MHz

(Europe) and 915 MHz (Americas) unlicensed radio bands with range up to 75 meters.

2.2.2 IEEE 802.15.4

IEEE 802.15.4 is a standard which specifies the physical layer and medium access

control for low-rate wireless personal area networks (LR-WPAN's).This standard was

chartered to investigate a low data rate solution with multi-month to multi-year battery

life and very low complexity. It is operating in an unlicensed, international frequency

band. Potential applications are sensors, interactive toys, smart badges, remote controls,

and home automation.

36

http://www.webopedia.com/TERM/Z/ZigBee.html#%23

802.15.4 Is part of the 802.15 wireless personal-area network efforts at the IEEE? It is a

simple packet-based radio protocol aimed at very low-cost, battery-operated widgets and

sensors (whose batteries last years, not hours) that can intercommunicate and send low-

bandwidth data to a centralized device.

As of 2007, the current version of the standard is the 2006 revision. It is maintained by

the IEEE 802.15 working group.

It is the basis for the Zig-bee specification, which further attempts to offer a complete

networking solution by developing the upper layers which are not covered by the

standard.

2.2.3 802.15.4 Protocol

Data rates of 250 kbps with 10-100 meter range.

Two addressing modes; 16-bit short and 64-bit IEEE addressing.

CSMA-CA channel access.

Power management to ensure low power consumption.

16 channels in the 2.4GHz ISM band

Low duty cycle - Provides long battery life

Low latency

Support for multiple network topologies: Static, dynamic, star and mesh

Up to 65,000 nodes on a network

2.2.4Comparison with other technologies

Zig-Bee enables broad-based deployment of wireless networks with low-cost, low-power

solutions. It provides the ability to run for years on inexpensive batteries for a host of

monitoring applications: Lighting controls, AMR (Automatic Meter Reading), smoke and

CO detectors, wireless telemetry, HVAC control, heating control, home security,

Environmental controls and shade controls, etc.

Table 3.2: Comparison with other technologies

StandardZigBee® 802.15.4

Wi-Fi™802.11b

Bluetooth™802.15.1

37

Transmission Range (meters) 1 – 100* 1 – 100 1 – 10

Battery Life (days) 100 – 1,000 0.5 – 5.0 1 - 7

Network Size (# of nodes) > 64,000 32 7

Application Monitoring & Control Web, Email, Video Cable Replacement

Stack Size (KB) 4 – 32 1,000 250

Throughput kb/s) 20 – 250 11,000 720

ZigBee-compliant products operate in unlicensed bands worldwide, including 2.4GHz

(global), 902 to 928MHz (Americas), and 868MHz (Europe). Raw data throughput rates

of 250Kbps can be achieved at 2.4GHz (16 channels), 40Kbps at 915MHz (10 channels),

and 20Kbps at 868MHz (1 channel). The transmission distance is expected to range from

10 to 75m, depending on power output and environmental characteristics. Like Wi-Fi,

Zigbee uses direct-sequence spread spectrum in the 2.4GHz band, with offset-quadrature

phase-shift keying modulation. Channel width is 2MHz with 5MHz channel spacing. The

868 and 900MHz bands also use direct-sequence spread spectrum but with binary-phase-

shift keying modulation.

2.2.5 Secure Connections

ZigBee leverages the security model of the IEEE 802.15.4 MAC sub layer which

specifies four security services:

access control—the device maintains a list of trusted devices within the network

Data encryption, which uses symmetric key 128-bit advanced encryption standard

(AES).

frame integrity to protect data from being modified by parties without

cryptographic keys

sequential freshness to reject data frames that have been replayed—the network

controller compares the freshness value with the last known value from the device and

rejects it if the freshness value has not been updated to a new value

The actual security implementation is specified by the implementer using a standardized

toolbox of ZigBee security software.

2.2.6 Power consumption

38

Ultra-low power consumption is how ZigBee technology promotes a long lifetime for

devices with non rechargeable batteries. ZigBee networks are designed to conserve the

power of the slave nodes. For most of the time, a slave device is in deep-sleep mode and

wakes up only for a fraction of a second to confirm its presence in the network. For

example, the transition from sleep mode to data transition is around 15ms and new slave

enumeration typically takes just 30ms.

To minimize power consumption and promote long battery life in battery-powered

devices, end devices can spend most of their time asleep, waking up only when they need

to communicate and then going immediately back to sleep. ZigBee envisions that routers

and the coordinator will be mains-powered and will not go to sleep.

2.2.7 Zigbee benefits

In all of its uses, ZigBee offers four inherent, beneficial characteristics:

Low cost

Range and obstruction issues avoidance

Multi-source products

Low power consumption

RADIO FREQUENCY IDENTIFICATION (RFID):-

RFID Technology

This section provides an introduction to RFID technology. It begins with a

discussion of the benefits of RFID relative to other automatic identification and data

capture (AIDC) technologies. It then reviews the basic components of RFID systems and

provides background information needed to understand later material in the document.

Readers who already have a strong understanding of RFID technology and applications

can skip this section and the discussion in Section 3 about RFID applications. Automatic

Identification and Data Capture (AIDC) Technology.

Identification processes that rely on AIDC technologies2 are significantly

more reliable and less expensive than those that are not automated.

39

The most common AIDC technology is bar code technology, which uses

optical scanners to read labels.3 Most people have direct experience with bar codes

because they have seen cashiers scan items at supermarkets and retail stores. Bar codes

are an enormous improvement over ordinary text labels because personnel are no longer

required to read numbers or letters on each label or manually enter data into an IT

system; they just have to scan the label. The innovation of bar codes greatly improved the

speed and accuracy of the identification process and facilitated better management of

inventory and pricing when coupled with information systems.

RFID represents a technological advancement in AIDC because it offers

advantages that are not available in other AIDC systems such as bar codes. RFID offers

these advantages because it relies on radio frequencies to transmit information rather than

light, which is required for optical AIDC technologies. The use of radio frequencies

means that RFID communication can occur:

without optical line of sight, because radio waves can penetrate many materials,

At greater speeds, because many tags can be read quickly, whereas optical

technology often requires time to manually reposition objects to make their bar

codes visible, and

over greater distances, because many radio technologies can transmit and receive

signals more effectively than optical technology under most operating conditions.

The ability of RFID technology to communicate without optical line of

sight and over greater distances than other AIDC technology further reduces the need for

human involvement in the identification process. For example, several retail firms have

pilot RFID programs to determine the contents of a shopping cart without removing each

item and placing it near a scanner, as is typical at most stores today. In this case, the

ability to scan a cart without removing its contents could speed up the checkout process,

40

thereby decreasing transaction costs for the retailers. This application of RFID also has

the potential to significantly decrease checkout time for consumers.

RFID products often support other features that bar codes and other AIDC

technologies do not have, such as rewritable memory, security features, and

environmental sensors that enable the RFID technology to record a history of events. The

types of events that can be recorded include temperature changes, sudden shocks, or high

humidity. Today, people typically perceive the label identifying a particular object of

interest as static, but RFID technology can make this label dynamic or even “smart” by

enabling the label to acquire data about the object even when people are not present to

handle it.

41

RFID System Components:

RFID systems can be very complex, and implementations vary greatly across

industries and sectors. For purposes of discussion in this document, an RFID system is composed

of up to three subsystems:

An RF subsystem, which performs identification and related transactions using wireless

communication.

An enterprise subsystem, which contains computers running specialized software that can

store, process, and analyze data acquired from RF subsystem transactions to make the

data useful to a supported business process.

An inter-enterprise subsystem, which connects enterprise subsystems when information

needs to be shared across organizational boundaries.

Every RFID system contains an RF subsystem, and most RFID systems also contain an

enterprise subsystem. An RFID system supporting a supply chain application is a

common example of an RFID system with an inter-enterprise subsystem. In a supply

chain application, a tagged product is tracked throughout its life cycle, from manufacture

to final purchase, and sometimes even afterwards.

The characteristics of RFID enterprise and inter-enterprise subsystems are very

similar to those of any networked IT system in terms of the types of computers that reside on

them, the protocols they support, and the security issues they encounter.

42

RFID Reader Module, are also called as interrogators. They convert radio waves returned from the RFID tag into a form that can be passed on to Controllers, which can make use of it. RFID tags and readers have to be tuned to the same frequency in order to communicate. RFID systems use many different frequencies, but the most common and widely used & supported by our Reader is 125 KHz.

The reader has been designed as a Plug & Play Module and can be plugged on a Standard 300 MIL-28 Pin IC socket form factor.

Functions

Supports reading of 64 Bit Manchester Encoded cards

Pins for External Antenna connection Serial Interface (TTL) Wiegand Interface also available Customer application on request

Technical Data:

Frequency : 125 kHzRead Range : up to 8 cmPower supply : 5V DC ( ± 5 %)Current consumption max.: 60 mAOperating temperature : -20 ... +65° CStoring temperature : -40 ... +75° C

Interface: RS232 ( TTL),Wiegand and others (on Demand)

Dimensions (l x w x h) : 36 x 18 x 10 mm

Serial Interface Format: 9600Baud, No Parity, 8 Data bits,1 Stop bit

Note: The TTL RS-232 Interface can not be connected directly to a PC COM port. Therefore the signal must be converted to RS 232 level for PC connection.

This Firmware has the following Functions:

Read Tag-ID Send Tag-ID in ASCII Format through the Serial/ Wiegand

Interface.

Sequence starts with Tag ID follows from Carriage-Return/Line-Feed (0Dh 0Ah), Example:

43

'041201938C<CR><LF>'

RFID 125 Reader Module PIN Diagram

PIN NO. SIGNAL DESCRIPTION

6 TxD Transmit data (TTL level) output from module to serial interface

4 Wiegand DATA HIGH

( available in Wiegand )

It will give DATA HIGH signal.

8 RxD Receive data (TTL level) input to the module from serial interface

14

LED ( active low)(available in RS 232 )

Wiegand DATA LOW ( available in Wiegand )

LED will glow for 280 ms when tag is detected

It will give DATA LOW signal.

12 Buzzer (active low) Buzzer will buzz for 280 ms when tag is detected

Note:

Reader module has to be mounted on non-metallic surface; else it may affect the operation of reader.

Buzzer & LED are Active low signals. For Buzzer & LED current limiting

Resister has to be mounted. MAX current is 20mA. (470 or 510 ohms for LED and 240 or 270 Ohms for Buzzer)

LED’s Anode and Buzzer’s Positive marked pin to be connected to Vcc.

Wiegand out put format is also available in select readers.

Applications:

44

Our readers can be used for Access control, Time & Attendance, Vending machines, industrial and other applications

where Reading the data from the Card only is required.

LAN Enabled RFID Reader – EAD RFID

EAD RFID is a combination of our Ethernet Adapter – EAD 01 and the RFID reader module. This unit contains our EAD 01 B Board level Serial to LAN converter, RFID module which can read the Tags and Built-in Antenna to pick up the RFID signal, a buzzer to indicate the successful reading of the card and a

LED indication. The Unit can additionally support Time Stamping

function with Real Time Clock as an Option. This unit can store up to 20 K of Data in its memory until the Server or PC software polls to pick up the data. (With a 10 digit Tag and Time Stamp, up to 800

records)We can also customize this product for System Integrators or

Software developers to meet their software requirement.

Ordering InformationModel DescriptionRFID 125 MD

RFID Reader Module ( 125 Khz)

RFID 125 MDV

RFID Reader Module with Base Board with RS 232 Port( 125 Khz)

EAD RFID 125

EAD - RFID Reader Module ( 125 Khz)

RF Subsystem

To enable wireless identification, the RF subsystem consists of two

components:

RFID tags (sometimes referred to as transponders), which are small electronic devices

that are affixed to objects or embedded in them. Each tag has a unique identifier and may

45

also have other features such as memory to store additional data, environmental sensors,

and security mechanisms.

RFID readers, which are devices that wirelessly communicate with tags to identify the

item connected to each tag and possibly associate the tagged item with related data.

Both the tag and the reader are two-way radios. Each has an antenna and is capable of

modulating and demodulating radio signals. Figure shows a simple RF subsystem

configuration.

2.3.1 Tag Characteristics

The market for RFID tags includes numerous different types of tags, which differ

greatly in their cost, size, performance, and security mechanisms. Even when tags are designed

to comply with a particular standard, they are often further customized to meet the requirements

of specific applications. Understanding the major tag characteristics can help those responsible

for RFID systems identify the tag characteristics required in their environments and applications.

Major characteristics of tags include:

Identifier format,

Power source,

Operating frequencies,

Functionality, and

46

Form factor.

Sections 2.3.1.1 through 2.3.1.5 examine these characteristics in detail.

2.3.1.1 Identifier Format

Every tag has an identifier that is used to uniquely identify it. There are a number

of data formats available for encoding identifiers on tags. System designers often want to use

identifiers that have a standard structure, with certain groups of bits representing particular

fields. A tag identifier format that is used across many industry sectors is the Electronic Product

Code (EPC). This format was developed by the industry group EPCglobal. EPCglobal is a joint

venture between Global Standards One (GS1), which was formerly known as European Article

Numbering (EAN) International, and GS1 US, which was formerly known as the Uniform Code

Council (UCC). The tag identifier format consists of four data fields:

The Header, which specifies the EPC type.

The EPC Manager ID, which uniquely identifies the organization that is responsible for

assigning the object class and serial number bits.

The Object Class, which identifies a class of objects, such as a certain model of television

set.

The Serial Number, which uniquely describes the instance of that class of objects.

Using a standard identifier format makes it easier for organizations to decode

identifiers. When a machine reads a standard identifier, it can parse the identifier and decode its

fields. The machine may need to request information from a remote computer to look up an

identifier. When the database is distributed across several organizations and many servers, a

standard identifier format with specified fields greatly facilitates the look up process. Therefore,

standard identifier formats should be used whenever an RFID system will be used across

multiple organizations.

47

If an organization does not expect its tag identifiers to be read by external parties

or is concerned that the association of a tag with the organization or specific classes of objects is

a business or privacy risk, then it may choose to develop and implement its own identifier format

that does not reveal this information.

Options include random or serialized identifiers that do not reveal information

about the tagged item. Such identifiers can be encoded on many standards-based tags. These tags

reserve memory for standard identifier formats but the memory does not have to be used for that

purpose.

The data format chosen for an RFID system should be adequate for the entire life

cycle of the system. Certain data formats may not have enough bits to uniquely encode all the

tags that will be used in a particular application. For example, a supply chain RFID system may

need longer identifiers to identify the large number of items that it will manage. The identifier

data format also has security implications. For example, standard formats such as EPC allow an

adversary to quickly obtain intelligence about a business activity by decoding the manager and

object class fields.

2.3.1.2 Power Source

Tags need power to perform functions such as sending radio signals to a reader,

storing and retrieving data, and performing other computations. Tags can obtain this power from

a battery or from electromagnetic waves emitted by readers that induce an electric current in the

tags. The power requirements of a tag depend on several factors, including the operating distance

between the tag and the reader, the radio frequency being used, and the functionality of the tag.

In general, the more complex the functions the tag supports, the greater its power requirements.

For example, tags that support cryptography or authentication require more energy than tags that

are limited to transmitting an identifier.

Tags are categorized into four types based on the power source for

communication and other functionality:

Passive,

Active,

Semi-active, and

48

Semi-passive.

A passive tag uses the electromagnetic energy it receives from a reader’s

transmission to reply to the reader. The reply signal from a passive tag, which is also known as

the backscattered signal, 5 has only a fraction of the power of the reader’s signal. This limited

power significantly restricts the operating range of the tag. It also means that passive tags can

only support data processing of limited complexity. On the other hand, passive tags typically are

cheaper, smaller, and lighter than other types of tags, which are compelling advantages for many

RFID applications.

An active tag relies on an internal battery for power. The battery is used to

communicate to the reader, to power on-board circuitry, and to perform other functions. Active

tags can communicate over greater distance than other types of tags, but they have a finite

battery life and are generally larger and more expensive. Since these tags have an internal power

supply, they can respond to lower power signals than passive tags.

A semi-active tag is an active tag that remains dormant until it receives a signal

from the reader to wake up. The tag can then use its battery to communicate with the reader. Like

active tags, semi-active tags can communicate over a longer distance than passive tags. Their

main advantage relative to active tags is that they have a longer battery life. The waking process,

however, sometimes causes an unacceptable time delay when tags pass readers very quickly or

when many tags need to be read within a very short period of time.

A semi-passive tag is a passive tag that uses a battery to power on-board

circuitry, but not to produce return signals. When the battery is used to power a sensor, they are

often called sensor tags. They typically are smaller and cheaper than active tags, but have greater

functionality than passive tags because more power is available for other purposes. Some

literature uses the terms “semi-passive” and “semi-active” interchangeably.

2.3.1.3 Operating Frequencies

49

The radio frequencies at which a tag transmits and receives signals have

implications for:

Tag performance characteristics, including operating range, speed of tag reads and RFID

data transfer rate. In general, as a tag’s operating frequency increases, its signals are able

to carry more data.6 As a result; higher frequency readers are also able to read more tags

in a given period of time. In addition, RFID systems that operate at ultra high frequency

(UHF) and microwave frequencies are typically designed to have a longer operating

range than LF and high frequency (HF) systems.7 for most applications, the increased

speed and operating range are considered advantages. One exception is applications for

which security or privacy is a significant concern, such as those that involve financial

transactions or personal data. In these cases, the ability of an adversary to read the data

more quickly and from a longer distance typically is considered a risk that requires

mitigation.

The ability of the tag’s signal to penetrate materials. As a general rule, higher frequencies

are less able to penetrate substances such as metals or liquids than lower frequencies.

Depending on the application, the penetration capabilities of a particular frequency can

be either a benefit or a shortcoming. For example, LF communication typically is a

requirement when tags are placed inside an animal because RF attenuation in living

tissue, which is mostly water, increases significantly as frequency increases. In

applications in which security is a significant concern, an organization may want to use a

frequency range than can be blocked by a particular material because this enables

effective security shielding that might not otherwise be available. Table 2-1 summarizes

the ability of RF signals to penetrate various substances.

The likelihood of radio interference. Radio interference is another reason why transmitted

signals may not be properly received. Determining the potential sources of radio

interference for a particular RFID implementation requires a site survey.

RFID systems may experience radio interference from other systems that operate in the

same or nearby frequency band. Interference often is exacerbated when using high power

readers or when many readers are collocated. Table 2-2 lists potential sources of

interference for RFID systems.

50

The international portability of tags. The types of systems that use various portions of the

electromagnetic spectrum can differ from jurisdiction to jurisdiction because not all

regulators assign the same frequencies for the same purposes. If an RFID application

requires transporting tags across multiple regulatory jurisdictions, then the system needs

to use a frequency range permitted in all of the jurisdictions. Regulations impacting RFID

often change, so organizations that use or plan to use RFID technology internationally

should monitor relevant developments. Currently, there are frequencies within the LF,

HF, and UHF bands that are permitted in most jurisdictions. Also, some tags are

frequency-agile, so they can respond to one frequency in one jurisdiction and another in a

different jurisdiction.

51

2.3.3 Tag-Reader Communication

52

Tag-reader communication is achieved by using a common communications

protocol between the tag and the reader. Tag-reader communication protocols are often specified

in RFID standards. Prominent international standards include the ISO/IEC 18000 series for item

management and the ISO/IEC 14443 and ISO/IEC 15693 standards for contactless smart cards.

The most recent EPCglobal Class-1 Generation-2 standard is essentially equivalent to the

ISO/IEC 18000-6C standard. A more detailed explanation of RFID standards can be found in

Appendix A on RFID Standards and Security Mechanisms.

Tag-reader communication characteristics that affect performance and security

include:

How tag-reader communication is initiated,

How a reader identifies particular tags, and

How far away a tag or reader’s signal can be reliably detected or interpreted.

These are discussed in detail in Sections 2.3.3.1 through 2.3.3.3.

2.3.3.1 Communication Initiation

Tags and readers can initiate RF transactions in two general ways:

Reader Talks First (RTF). In an RTF transaction, the reader broadcasts a signal that is

received by tags in the reader’s vicinity. Those tags may then be commanded to respond

to the reader and to continue transactions with the reader.

Tag Talks First (TTF). In a TTF transaction, a tag communicates its presence to a reader

when the tag is within the reader’s RF field. If the tag is passive, then it transmits as soon

as it gets power from the reader’s signal to do so. If the tag is active, then it transmits

periodically as long as its power supply lasts. This type of transaction might be used

when it is necessary to identify objects that pass by a reader, such as objects on a

conveyer belt.

Readers and tags in an RFID system typically operate using only RTF or only TTF

transactions, not both types. Active tag TTF operation may be easier for an adversary to detect or

intercept, because active tags send beaconing signals even when they are not in the presence of a

53

reader. The adversary could eavesdrop on this communication without risking detection because

in TTF transactions the adversary never has to send a signal to ascertain the tag’s presence.

Security Gate

The Security Gate Codeco is offering has a very efficient detection in all 3 tag

directions.

The gate can be supplied in both a single (two antennas) and a double (three

antennas) passage version.

With 1000 mm between the gates detection of tags in all three directions (x, y

and z) are secured.

The distance between the gates can be up to 1400 mm; however this limits the

antitheft detection to one direction (parallel to the antennas).

As standard the gate is supplied with an audible alarm, optionally the gates can

be supplied with a visible alarm.

RFID Reader the data from the tag and send to the microcontroller.

Microcontroller first check the data is valid or not. If it is valid then it will send a signal to the

54

stepper motor to rotate that means DOOR will open. If card is not valid then microcontroller will

not send signal to the stepper motor that means it will not open the

Door.

In our project we are using Passive RFID for security purpose, Because of wal-

mart’s initiatives in the RFID domain, it is now possible to obtain very cheap RFID tags and

create University/departmental ID cards with them. Passive RFID technology is based on the

simple idea that an electronic circuit or tag, powered intermittently through radiation from a

distance, can transmit information in air that can be read by a reader located at a distance. These

tags are nothing but plain antennae bonded to a silicon chip kept inside a plastic or glass case.

Operation of an Ultra High Frequency (UHF) RFID system is illustrated in fig. 1. The reader

emits an electromagnetic wave which charges up the tag. The tag in return transmits the data

back to the reader. These tags have a greater range than their some lower frequency counterparts

and can read a multitude of tags simultaneously.

55

Figure: A Schematic of Power and Data Flow in a UHF RFID System.

Purpose

To demonstrate RFID in action using Sokymat EM Unique RFID tags and the Adilam

RFID reader module.

• To simply read RFID tag numbers and transmits them to a PC computer for data collection and

storage.

• To expose the user to various tag shapes, styles and applications of RFID tags.

Requirements

• DC Power Supply or battery in the range of 8 to16 Volts

• PC Computer with an available serial port and Hyper-Terminal or Serial

Terminal software.

• DB9 Male to DB9 Female serial cable not Supplied.

Connection Serial Port Of PC

56

Operation

The RFID module is supplied with 8v to 16v and draws on average 30 ~ 40mA in

the idle state. During a RFID read the current may peak briefly to 60mA. The Reader module

comes configured for ASCII 9600 Baud N, 8, 1 output - ready to Connect to the serial port of a

PC via a DB9 serial cable.

An RFID tag in close proximity to the ID12 RFID reader will have the following

Action:

LED will flash

Beep from buzzer

The RFID number of the tag is transmitted serially out of pin 2 (Rx) of the

DB9 Female connector (J1) of the RFID module.

ASCII Configuration

57

The RFID board is shipped configured for ASCII Serial transmission (9600Baud

N, 8, 1)

D1 - linked to Rx

JP1 - ASCII is linked JP2 Open, JP3 Open

R4 - Not fitted

R5 - Fitted with 100R

C3 - Not fitted (only for use with ID2 modules - future design)

ANT - No connection (for use with ID2 modules - future design)

SERIAL ASCII Output

When the ID12 RFID module detects the RFID tag, the following Serial ASCII data

Stream is transmitted.

Output Format – Serial ASCII 9600, N,8,1

Total packet length is 16 bytes

Data and Checksum are in ASCII hex format (2 ASCII characters per byte)

The checksum is the result of the ‘exclusive’ OR of the binary data bytes

Checksum calculation

04hex . 1Ahex . 21hex . EEhex . 34hex = E5hex

Thus the ASCII hex values should be converted in to binary before the checksum

Calculation.

58

RFID Read Range of the RFID module

The RFID read range of this module will vary from approx10mm to 30mm depending

On the following factors;

The shape and size of the RFID tag. Large Size RFID tags have longer read Range

(Smaller tags have a smaller RF radiating field)

Any metallic objects near the RFID tag or ID12 Module will effectively Detune the coils

operating frequency and reduce the read range

Any electrical interference from electrical equipment will reduce read range.

61

2.5 LCD

LCDTo send any of the commands from given table to the lcd, make pin RS =0.For data,

make RS=1.then send a high to low pulse to the E pin to enable the internal latch of the LCD. As

shown in figure for LCD connections.

Table 2.1., Pin assignment for <= 80 character displays

Pin number

Symbol Level I/O Function

1 Vss - - Power supply (GND)

2 Vcc - - Power supply (+5V)

3 Vee - - Contrast adjust

4 RS 0/1 I0 = Instruction input1 = Data input

5 R/W 0/1 I0 = Write to LCD module1 = Read from LCD module

6 E 1, 1->0 I Enable signal

7 DB0 0/1 I/O Data bus line 0 (LSB)

8 DB1 0/1 I/O Data bus line 1






14 DB7 0/1 I/O Data bus line 7 (MSB)

62

Table 2.2., Pin assignment for > 80 character displays

Pin number

Symbol Level I/O Function

1 DB7 0/1 I/O Data bus line 7 (MSB)







8 DB0 0/1 I/O Data bus line 0 (LSB)

9 E1 1, 1->0 I Enable signal row 0 & 1 (1stcontroller)

10 R/W 0/1 I0 = Write to LCD module1 = Read from LCD module

11 RS 0/1 I0 = Instruction input1 = Data input

12 Vee - - Contrast adjust

13 Vss - - Power supply (GND)

14 Vcc - - Power supply (+5V)

15 E2 1, 1->0 I Enable signal row 2 & 3 (2ndcontroller)

16 n.c.

Instruction setTable 2.3. HD44780 instruction set

InstructionCode

DescriptionExecution

time**RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Clear display 0 0 0 0 0 0 0 0 0 1

Clears display and returns cursor to the home position (address 0).

1.64mS

Cursor home 0 0 0 0 0 0 0 0 1 *

Returns cursor to home position (address 0). Also returns display being shifted to the original position. DDRAM contents remains unchanged.

1.64mS

Entry mode set 0 0 0 0 0 0 0 1 I/D S Sets cursor move direction (I/D),

40uS

63

Table 2.3. HD44780 instruction set

InstructionCode

DescriptionExecution

time**RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

specifies to shift the display (S). These operations are performed during data read/write.

Display On/Off control

0 0 0 0 0 0 1 D C B Sets On/Off of all display (D), cursor On/Off (C) and blink of cursor position character (B).

40uS

Cursor/display shift

0 0 0 0 0 1 S/C R/L * * Sets cursor-move or display-shift (S/C), shift direction (R/L). DDRAM contents remains unchanged.

40uS

Function set 0 0 0 0 1 DL N F * *

Sets interface data length (DL), number of display line (N) and character font(F).

40uS

Set CGRAM address

0 0 0 1 CGRAM address

Sets the CGRAM address. CGRAM data is sent and received after this setting.

40uS

Set DDRAM address

0 0 1 DDRAM address Sets the DDRAM address. DDRAM data is sent and received after this setting.

40uS

Read busy-flag and address counter

0 1 BF CGRAM / DDRAM address

Reads Busy-flag (BF) indicating internal operation is being performed and reads CGRAM or DDRAM address counter contents (depending on previous instruction).

0uS

Write to CGRAM or DDRAM

1 0 write dataWrites data to CGRAM or DDRAM.

40uS

Read from CGRAM or DDRAM

1 1 read dataReads data from CGRAM or DDRAM.

40uS

64

Remarks:- DDRAM = Display Data RAM.- CGRAM = Character Generator RAM.- DDRAM address corresponds to cursor position.- * = Don't care.- ** = Based on Fosc = 250kHz.

Table 2.4. Bit names

Bit name

Setting / Status

I/D 0 = Decrement cursor position 1 = Increment cursor position

S 0 = No display shift 1 = Display shift

D 0 = Display off 1 = Display on

C 0 = Cursor off 1 = Cursor on

B 0 = Cursor blink off 1 = Cursor blink on

S/C 0 = Move cursor 1 = Shift display

R/L 0 = Shift left 1 = Shift right

DL 0 = 4-bit interface 1 = 8-bit interface

N 0 = 1/8 or 1/11 Duty (1 line) 1 = 1/16 Duty (2 lines)

F 0 = 5x7 dots 1 = 5x10 dots

BF 0 = Can accept instruction 1 = Internal operation in progress

2.6 Serial communication

When a processor communicates with the outside world, it provides data in byte sized

chunks. Computers transfer data in two ways: parallel and serial. In parallel data transfers, often

more lines are used to transfer data to a device and 8 bit data path is expensive. The serial

communication transfer uses only a single data line instead of the 8 bit data line of parallel

communication which makes the data transfer not only cheaper but also makes it possible for

two computers located in two different cities to communicate over telephone.

Serial data communication uses two methods, asynchronous and synchronous. The

synchronous method transfers data at a time while the asynchronous transfers a single byte at a

time. There are some special IC chips made by many manufacturers for data communications.

These chips are commonly referred to as UART (universal asynchronous receiver-transmitter)

65

and USART (universal synchronous asynchronous receiver transmitter). The AT89C51 chip has

a built in UART.

In asynchronous method, each character is placed between start and stop bits. This

is called framing. In data framing of asynchronous communications, the data, such as ASCII

characters, are packed in between a start and stop bit. We have a total of 10 bits for a character: 8

bits for the ASCII code and 1 bit each for the start and stop bits. The rate of serial data transfer

communication is stated in bps or it can be called as baud rate.

To allow the compatibility among data communication equipment made by various

manufacturers, and interfacing standard called RS232 was set by the Electronics industries

Association in 1960. Today RS232 is the most widely used I/O interfacing standard. This

standard is used in PCs and numerous types of equipment. However, since the standard was set

long before the advent of the TTL logic family, its input and output voltage levels are not TTL

compatible. In RS232, a 1 bit is represented by -3 to -25V, while a 0 bit is represented +3 to +25

V, making -3 to +3 undefined. For this reason, to connect any RS232 to a microcontroller system

we must use voltage converters such as MAX232 to connect the TTL logic levels to RS232

voltage levels and vice versa. MAX232 ICs are commonly referred to as line drivers.

The RS232 cables are generally referred to as DB-9 connector. In labeling, DB-9P

refers to the plug connector (male) and DB-9S is for the socket connector (female). The simplest

connection between a PC and microcontroller requires a minimum of three pin, TXD, RXD, and

ground. Many of the pins of the RS232 connector are used for handshaking signals. They are

bypassed since they are not supported by the 8051 UART chip.

66

IBM PC/ compatible computers based on x86(8086, 80286, 386, 486 and

Pentium) microprocessors normally have two COM ports. Both COM ports have RS232 type

connectors. Many PCs use one each of the DB-25 and DB-9 RS232 connectors. The COM ports

are designated as COM1 and COM2. We can connect the serial port to the COM 2 port of a PC

for serial communication experiments. We use a DB9 connector in our arrangement.

The AT89C51 has two pins that are used specifically for transferring and receiving

data serially. These two pins are called TXD and RXD and are part of the port3 (P3.0 and P3.1).

These pins are TTL compatible; therefore they require a line driver to make them RS232

compatible. One such line driver is the MAX232 chip. One advantage of MAX232 chip is that it

uses a +5v power source which is the same as the source voltage for the at89c51. The MAX232

has two sets of line drivers for receiving and transferring data. The line drivers for TXD are

called T1 and T2 while the line drivers for RXD are designated as R1 and R2. T1 and R1 are

used for TXD and RXD of the 89c51 and the second set is left unused. In MAX232 that the TI

line driver has a designation of T1 in and T1 out on pin numbers 11 and 14, respectively. The T1

in pin is the TTL side and is connected to TXD of the microcontroller, while TI out is the RS232

side that is connected to the RXD pin of the DB9 connector.

To allow data transfer between PC and the microcontroller system without any error,

we must make sure that the baud rate of the 8051 system matches the baud rate of the PC’s COM

port.

67

CHAPTER 3

FLOW CHART :

DISPLAY ON RECEIVER LCD

Initialization of serial and LCD

Initialization of Zigbee

Initialization of Microcontroller

start

ENETER THE DATA IN LCD

SEND DATA TO ZIGBEE

Stop

No

Yes

68

SOURCE CODE:

CIRCUIT DIAGRAM:

TX:

69

RX:

70

CHAPTER 5

5 SOFTWARE DEVELOPMENT5.1 Introduction:

In this chapter the software used and the language in which the program code is defined

is mentioned and the program code dumping tools are explained. The chapter also documents the

development of the program for the application. This program has been termed as “Source code”.

Before we look at the source code we define the two header files that we have used in the code.

5.2 Tools Used:

Figure 4.1 Keil Software- internal stages

71

Keil development tools for the 8051 Microcontroller Architecture support every level of software developer from the professional applications

5.3 C51 Compiler & A51 Macro Assembler:Source files are created by the µVision IDE and are passed to the C51 Compiler or A51

Macro Assembler. The compiler and assembler process source files and create replaceable object

files.

The Keil C51 Compiler is a full ANSI implementation of the C programming language

that supports all standard features of the C language. In addition, numerous features for direct

support of the 8051 architecture have been added.

µVISION

What's New in µVision3?

µVision3 adds many new features to the Editor like Text Templates, Quick Function

Navigation, and Syntax Coloring with brace high lighting Configuration Wizard for dialog based

startup and debugger setup. µVision3 is fully compatible to µVision2 and can be used in parallel

with µVision2.

What is µVision3?

µVision3 is an IDE (Integrated Development Environment) that helps you write, compile,

and debug embedded programs. It encapsulates the following components:

A project manager.

A make facility.

Tool configuration.

Editor.

A powerful debugger.

To help you get started, several example programs (located in the \C51\Examples, \C251\

Examples, \C166\Examples, and \ARM\...\Examples) are provided.

HELLO is a simple program that prints the string "Hello World" using the Serial Interface.

MEASURE is a data acquisition system for analog and digital systems.

TRAFFIC is a traffic light controller with the RTX Tiny operating system.

SIEVE is the SIEVE Benchmark.

DHRY is the Dhrystone Benchmark.

WHETS is the Single-Precision Whetstone Benchmark.

Additional example programs not listed here are provided for each device architecture.

72

7.3 BUILDING AN APPLICATION IN µVISIONTo build (compile, assemble, and link) an application in µVision2, you must:

1. Select Project -(forexample,166\EXAMPLES\HELLO\HELLO.UV2).

2. Select Project - Rebuild all target files or Build target.

µVision2 compiles, assembles, and links the files in your project.

Creating Your Own Application in µVision2

To create a new project in µVision2, you must:

1. Select Project - New Project.

2. Select a directory and enter the name of the project file.

3. Select Project - Select Device and select an 8051, 251, or C16x/ST10 device from the Device

Database™.

4. Create source files to add to the project.

5. Select Project - Targets, Groups, Files. Add/Files, select Source Group1, and add the source files

to the project.

6. Select Project - Options and set the tool options. Note when you select the target device from the

Device Database™ all special options are set automatically. You typically only need to configure

the memory map of your target hardware. Default memory model settings are optimal for most

applications.

7. Select Project - Rebuild all target files or Build target.

Debugging an Application in µVision2

To debug an application created using µVision2, you must:

1. Select Debug - Start/Stop Debug Session.

2. Use the Step toolbar buttons to single-step through your program. You may enter G, main in the

Output Window to execute to the main C function.

3. Open the Serial Window using the Serial #1 button on the toolbar.

Debug your program using standard options like Step, Go, Break, and so on.

Starting µVision2 and Creating a Project

µVision2 is a standard Windows application and started by clicking on the program icon. To

create a new project file select from the µVision2 menu

Project – New Project…. This opens a standard Windows dialog that asks you

for the new project file name.

We suggest that you use a separate folder for each project. You can simply use

73

the icon Create New Folder in this dialog to get a new empty folder. Then

select this folder and enter the file name for the new project, i.e. Project1.

µVision2 creates a new project file with the name PROJECT1.UV2 which contains

a default target and file group name. You can see these names in the Project

Window – Files.

Now use from the menu Project – Select Device for Target and select a CPU

for your project. The Select Device dialog box shows the µVision2 device

database. Just select the microcontroller you use. We are using for our examples the Philips

80C51RD+ CPU. This selection sets necessary tool

options for the 80C51RD+ device and simplifies in this way the tool Configuration

Building Projects and Creating a HEX Files

Typical, the tool settings under Options – Target are all you need to start a new

application. You may translate all source files and line the application with a

click on the Build Target toolbar icon. When you build an application with

syntax errors, µVision2 will display errors and warning messages in the Output

Window – Build page. A double click on a message line opens the source file

on the correct location in a µVision2 editor window. Once you have successfully generated your

application you can start debugging.

After you have tested your application, it is required to create an Intel HEX file to

download the software into an EPROM programmer or simulator. µVision2 creates HEX files

with each build process when Create HEX files under Options for Target – Output is enabled.

You may start your PROM programming utility after the make process when you specify the

program under the option Run User Program #1.

CPU Simulation

µVision2 simulates up to 16 Mbytes of memory from which areas can be

mapped for read, write, or code execution access. The µVision2 simulator traps

and reports illegal memory accesses.

In addition to memory mapping, the simulator also provides support for the

integrated peripherals of the various 8051 derivatives. The on-chip peripherals

of the CPU you have selected are configured from the Device

Database selection

You have made when you create your project target. Refer to page 58 for more

74

Information about selecting a device. You may select and display the on-chip peripheral

components using the Debug menu. You can also change the aspects of each peripheral using the

controls in the dialog boxes.

Start Debugging

You start the debug mode of µVision2 with the Debug – Start/Stop Debug

Session command. Depending on the Options for Target – Debug

Configuration, µVision2 will load the application program and run the startup

code µVision2 saves the editor screen layout and restores the screen layout of the last debug

session. If the program execution stops, µVision2 opens an

editor window with the source text or shows CPU instructions in the disassembly window. The

next executable statement is marked with a yellow arrow. During debugging, most editor

features are still available.

For example, you can use the find command or correct program errors. Program source

text of your application is shown in the same windows. The µVision2 debug mode differs from

the edit mode in the following aspects:

The “Debug Menu and Debug Commands” described below are available. The additional

debug windows are discussed in the following.

The project structure or tool parameters cannot be modified. All build Commands are

disabled.

Disassembly Window

The Disassembly window shows your target program as mixed source and assembly

program or just assembly code. A trace history of previously executed instructions may be

displayed with Debug – View Trace Records. To enable the trace history, set Debug –

Enable/Disable Trace Recording.

If you select the Disassembly Window as the active window all program step commands

work on CPU instruction level rather than program source lines. You can select a text line and

set or modify code breakpoints using toolbar buttons or the context menu commands.

You may use the dialog Debug – Inline Assembly… to modify the CPU instructions.

That allows you to correct mistakes or to make temporary changes to the target program you are

debugging.

75

SOURCE CODE

1. Click on the Keil uVision Icon on Desktop

2. The following fig will appear

3. Click on the Project menu from the title bar

4. Then Click on New Project

76

5. Save the Project by typing suitable project name with no extension in u r own folder sited in either C:\ or D:\

6. Then Click on Save button above.

7. Select the component for u r project. i.e. Atmel……

8. Click on the + Symbol beside of Atmel

77

9. Select AT89C51 as shown below

10. Then Click on “OK”

11. The Following fig will appear

12. Then Click either YES or NO………mostly “NO”

78

13. Now your project is ready to USE

14. Now double click on the Target1, you would get another option “Source group 1” as

shown in next page.

15. Click on the file option from menu bar and select “new”

16. The next screen will be as shown in next page, and just maximize it by double

clicking on its blue boarder.

79

17. Now start writing program in either in “C” or “ASM”

18. For a program written in Assembly, then save it with extension “. asm” and for “C”

based program save it with extension “ .C”

19. Now right click on Source group 1 and click on “Add files to Group Source”

80

20. Now you will get another window, on which by default “C” files will appear.

21. Now select as per your file extension given while saving the file

22. Click only one time on option “ADD”

23. Now Press function key F7 to compile. Any error will appear if so happen.

81

24. If the file contains no error, then press Control+F5 simultaneously.

25. The new window is as follows

26. Then Click “OK”

27. Now Click on the Peripherals from menu bar, and check your required port as shown

in fig below

82

28. Drag the port a side and click in the program file.

29. Now keep Pressing function key “F11” slowly and observe.

30. You are running your program successfully

83

5.6 Flash Magic:

Features:

Straightforward and intuitive user interface

Five simple steps to erasing and programming a device and setting any options desired

Programs Intel Hex Files

Automatic verifying after programming

Fills unused flash to increase firmware security

Ability to automatically program checksums. Using the supplied checksum calculation

routine your firmware can easily verify the integrity of a Flash block, ensuring no

unauthorized or corrupted code can ever be executed

Program security bits

Check which Flash blocks are blank or in use with the ability to easily erase all blocks in use

Read the device signature

Read any section of Flash and save as an Intel Hex File

Reprogram the Boot Vector and Status Byte with the help of confirmation features that

prevent accidentally programming incorrect values

Displays the contents of Flash in ASCII and Hexadecimal formats

Single-click access to the manual, Flash Magic home page and NXP Microcontrollers home

page

Ability to use high-speed serial communications on devices that support it. Flash Magic

calculates the highest baud rate that both the device and your PC can use and switches to that

baud rate transparently

Command Line interface allowing Flash Magic to be used in IDEs and Batch Files

Manual in PDF format

supports half-duplex communications

84

Verify Hex Files previously programmed

Save and open settings

Able to reset Rx2 and 66x devices (revision G or higher)

Able to control the DTR and RTS RS232 signals when connected to RST and /PSEN to place

the device into Boot ROM and Execute modes automatically. An example circuit diagram is

included in the Manual. This is essential for ISP with target hardware that is hard to access.

This enables us to send commands to place the device in Boot ROM mode, with support for

command line interfaces. The installation includes an example project for the Keil and

Raisonance 8051 compilers that show how to build support for this feature into applications.

Able to play any Wave file when finished programming.

built in automated version checker - helps ensure you always have the latest version.

Powerful, flexible Just In Time Code feature. Write your own JIT Modules to generate last

minute code for programming. Uses include:

Serial number generation

Copy protection and copy authorization

Storing program date and time - manufacture date

Storing program operator and location

Lookup table generation

Language tables or language selection

Centralized record keeping

Obtaining latest firmware from the Corporate Web site or project intranet

Requirements:

Flash Magic works on any versions of Windows, except Windows 95. 10Mb of disk

space is required. As mentioned earlier, we are automating two different routines in our project

and hence we used the method of polling to continuously monitor those tasks and act accordingly

SOFTWARE USED:

85

1. Embedded C

2. Keil IDE

3. Uc-Flash

HARDWARE USED:

1. Micro Controllers(AT89S52)

2. Power Supply

3. ZIGBEE Transceivers

4. LCD

5. PS2 CABLE

6. Keypad(PS2)

RESULT:

According to this project we can implement a data communication system in which

ZIGBEE technology is used by which one can communicate with more than one, wirelessly

86

RESULTS AND CONCLUSION

Advantages

1. The implementation of Zig-bee will make communication wireless like chatting system.

Disadvantages

1. This technology can be used only up to range of 100m.

Applications

1. This system chatting application and military applications .

RESULT:

According to this project we can implement a data communication system in which

ZIGBEE technology is used by which one can communicate with more than one, wirelessly

CONCLUSION

The project “MESSENGER DEVELOPMENT WITHOUT INTERNET

USING ZIG-BEE TECHNOLOGY” has been successfully designed and tested.

Integrating features of all the hardware components used have developed it. Presence of

every module has been reasoned out and placed carefully thus contributing to the best

working of the unit. Secondly, using highly advanced IC’s and with the help of growing

technology the project has been successfully implemented.

87

BIBLIOGRAPHY

NAME OF THE SITES

1 WWW.MITEL.DATABOOK.COM

2 WWW.ATMEL.DATABOOK.COM

3 WWW.FRANKLIN.COM

4 WWW.KEIL.COM

5 www.ask.com

6 www.wikipedia.com

7 www.palowireless.com/zigbee

8 www.howstuffworks.com

REFERENCES

9 8051-MICROCONTROLLER AND EMBEDDED SYSTEM.

Mohd. Mazidi.

10 EMBEDDED SOFTWARE PRIMER.

David .E. Simon.

11 ZIGBEE WIRELESS NETWORKS AND TRANSCEIVERS Shahin farahani

88

http://WWW.KEIL.COM/

http://WWW.FRANKLIN.COM/

http://WWW.ATMEL.DATABOOK.COM/

http://WWW.MITEL.DATABOOK.COM/

messenger development without internet using zigbee technology

Documents

exact behavior

a51 macro

sequence spread

sink source

program status

inverting

special function

idle mode