MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

UNIT V RECTIFIERS AND POWER SUPPLIES

PART –A (2 MARK QUESTIONS)

1. Draw the full wave bridge rectifier circuit (NOV/DEC 2009)

2. What are the advantages of SMPS over conventional regulators?

(NOV/DEC 2009) (APR/MAY 2010)

1. Light weight since the transformer is too small and it it operates at high

frequency of 50Hz-1MHz.

2. Output voltage is well regulated and controlled by duty cycle and there is

little resistive loss since the transistor fully on or off during switching.

3. Greater efficiency since the switching transistor dissipates very little heat.

The SMPS can fail and can cause very high output voltage that destroys the

equipment.

3. Compare the half-wave and full-wave rectifiers. (APR/MAY 2010)

(NOV/DEC’12)

Efficiency is double for a full wave bridge rectifier.

The residual ac ripples (before filtering) is very low in the

output of a bridge rectifier. The same ripple percentage is very

high in half wave rectifier.

higher output voltage, Higher transformer utilization factor

(TUF) and higher output power.

MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

4. Write down the expression for ripple factor of LC filter in FWR.

(NOV/DEC 2011)

Ripple factor = 1.194/LC

5. Distinguish between line regulation and load regulation. (NOV/DEC

2011)

Load regulation is the capability to maintain a constant voltage (or current) level

on the output channel of a power supply despite changes in the supply's load.

Line regulation is the capability to maintain a constant output voltage level on

the output channel of a power supply despite changes to the input voltage level.

6. Briefly explain the working of Zener regulator. (NOV/DEC 2010)

As the input voltage increases the current through the Zener

diode increases but the voltage drop remains constant - a feature of zener

diodes. Therefore since the current in the circuit has increased the voltage

drop across the resistor increases by an amount equal to the difference

between the input voltage and the zener voltage of the diode.

7. Give the ripple factor of inductance filter connected to FWR.

(NOV/DEC 2010)

Ripple factor =RL/3 2 ωL

8. What are the advantage of bridge rectifier over the centre tapped

part counter.

1. Bulky centre tapped transformer is not required.

2. Transformer utilization factor is high.

9. Draw half wave voltage doubler circuit.

10. Define transformer utilization factor.

MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

TUF=dc power delivered to the load/ac rating of the transformer

secondary.

11. What is voltage Multiplier?

Voltage multiplier is a modified capacitor filter circuit that delivers a dc voltage twice or rnore times of the peak value (amplitude) of the input ac voltage. Such power supplies are used for high-voltage and low-current devices such as cathode-ray tubes (the picture tubes in TV receivers, oscilloscopes and computer display).

12. What is meant by ripple factor?

It is a measure of percentage of ac component presented at the load.

13. What are the limitations of using zener diode regulator?

The zener diode regulator has limitations of range. The load current range

for which regulation is maintained, is the difference between maximum

allowable zener current and minimum current required for the zener to

operate in breakdown region.

14. Indicate two advantages of bleeder resistor in bridge rectifier?

A bleeder resistor is an electrical component that absorbs electrical power in

unregulatedpower supply outputs to improve voltage regulation.

15. Differentiate series and shunt voltage regulator.

16. What are the different types of rectifiers?

Half wave rectifiers

Full wave rectifiers

Bridge rectifiers

MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

17. A power supply has 4% voltage regulation and an open circuit

voltage of 48V DC. Calculate the full load voltage. (NOV/DEC’12)

Load regulation = (Vno load – Vfull load) / Vfull load

18. Define transformer utilization factor.

TUF = dc power delivered to the load/ac rating of transformer secondary

= Pdc /Pac . rated

PART- B (16 MARK QUESTIONS

1. Explain the circuit of voltage regulator and also discuss the short

circuit protection mechanism.(NOV/DEC 2009)

An ideal power supply maintains a constant voltage at its output terminals

under all operating conditions. The output voltage of a practical power

supply changes with load generally dropping as load current increases as

shown in fig. 1.

Fig. 1

The terminal voltage when full load current is drawn is called full load voltage (VFL). The no load voltage is the terminal voltage when zero current is drawn from the supply, that is, the open circuit terminal voltage.

Power supply performance is measured in terms of percent voltage regulation, which indicates its ability to maintain a constant voltage. It is defined as

The Thevenin's equivalent of a power supply is shown in fig. 2. The Thevenin voltage is the no-load voltage VNL and the Thevenin resistance

MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

is called the output resistance Ro. Let the full load current be IFL. Therefore, the full load resistance RFL is given by

Fig. 2

From the equivalent circuit, we have

and the voltage regulation is given by

An unregulated power supply consists of a transformer (step down), a rectifier and a filter. These power supplies are not good for some applications where constant voltage is required irrespective of external disturbances. The main disturbances are:

As the load current varies, the output voltage also varies because of its poor regulation.

The dc output voltage varies directly with ac input supply. The input voltage may vary over a wide range thus dc voltage also changes.

The dc output voltage varies with the temperature if semiconductor devices are used.

MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

An electronic voltage regulator is essentially a controller used along with unregulated power supply to stabilize the output dc voltage against three major disturbances

Load current (IL)

Supply voltage (Vi)

Temperature (T)

Fig. 3, shows the basic block diagram of voltage regulator. where

Vi = unregulated dc voltage.

Vo = regulated dc voltage.

Fig. 3

Since the output dc voltage VLo depends on the input unregulated dc voltage Vi, load current IL and the temperature t, then the change ΔVo in output voltage of a power supply can be expressed as follows

VO = VO(Vi, IL, T)

Take partial derivative of VO, we get,

MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

SV gives variation in output voltage only due to unregulated dc voltage. RO gives the output voltage variation only due to load current. ST gives the variation in output voltage only due to temperature.

The smaller the value of the three coefficients, the better the regulations of power supply. The input voltage variation is either due to input supply fluctuations or presence of ripples due to inadequate filtering.

2. Explain the power control method using SCR. (NOV/DEC 2009)

(NOV/DEC’12) (NOV/DEC 2009) (NOV/DEC 2011)

Silicon-controlled rectifier A silicon-controlled rectifier (or semiconductor-

controlled rectifier) is a four-layer solid state device that controls current. The

name "silicon controlled rectifier" or SCR is General Electric's trade name for a

type of thyristor. The SCR was developed by a team of power engineers led by

Gordon Hall and commercialised by Frank W. "Bill" Gutzwiller in 1957. Theory of

operation An SCR is a type of rectifier, controlled by a logic gate signal. It is a

four-layer, three-terminal device. A p-type layer acts as an anode and an n-type

layer as a cathode; the p-type layer closer to the n-type(cathode) acts as a gate.

It is unidirectional in nature. Modes of operation In the normal "off" state, the

device restricts current to the leakage current. When the gate to cathode voltage

exceeds a certain threshold, the device turns "on" and conducts current. The

device will remain in the "on" state even after gate current is removed so long as

current through the device remains above the holding current. Once current falls

below the holding current for an appropriate period of time, the device will switch

"off". If the applied voltage increases rapidly enough, capacitive coupling may

induce enough charge into the gate to trigger the device into the "on" state; this

is referred to as "dv/dt triggering." This is usually prevented by limiting the rate of

voltage rise across the device, perhaps by using a snubber. "dv/dt triggering"

may not switch the SCR into full conduction rapidly and the partially-triggered

SCR may dissipate more power than is usual, possibly harming the device.

SCRs can also be triggered by increasing the forward voltage beyond their rated

breakdown voltage (also called as breakover voltage), but again, this does not

rapidly switch the entire device into conduction and so may be harmful so this

mode of operation is also usually avoided. Also, the actual breakdown voltage

may be substantially higher than the rated breakdown voltage, so the exact

trigger point will vary from device to device.

MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

The advantages of SCR Controls over other temperature control methods

Improved response time. Closer process control. Extended heater life. Reduced maintenance costs. Silent operation. No arcing and sparking. Reduced peak power consumption.

3. Derive the expressions for the rectification efficiency, ripple factor,

transformer utilization factor, form factor and peak factor of

(i) half wave rectifier (ii) full wave rectifier. (APR/MAY 2010)

Ripple factor for Half-wave rectification

By definition the effective (ie rms) value of total load current is given by

MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

ripple factor r = 1.21

It is clear that a.c. component exceeds dc component in the output of a half-wave

rectifier.

Efficiency:

η = Pdc/Pac

Vac = √Vrms2 - Vdc

2

FF = Vrms / Vdc

RF = Vac/Vdc

MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

Ripple Factor

The ripple factor for a Full Wave Rectifier is given by

The average voltage or the dc voltage available across the load resistance is

RMS value of the voltage at the load resistance is

Efficiency

Efficiency, is the ratio of dc output power to ac input power

The maximum efficiency of a Full Wave Rectifier is 81.2%.

Transformer Utilization Factor

Transformer Utilization Factor, TUF can be used to determine the rating of a

transformer secondary. It is determined by considering

the primary and the secondary winding separately and it gives a value of 0.693.

Form Factor

Form factor is defined as the ratio of the rms value of the output voltage to the

MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

average value of the output voltage.

Peak Factor

Peak factor is defined as the ratio of the peak value of the output voltage to the rms value of the output voltage.

Peak inverse voltage for Full Wave Rectifier is 2Vm because the entire secondary voltage appears across the non-conducting diode.

This concludes the explanation of the various factors associated with Full Wave Rectifier.

4. Explain the operation of Voltage multiplier (APR/MAY 2010)

Voltage multiplier is a modified capacitor filter circuit that delivers a dc voltage

twice or more times of the peak value (amplitude) of the input ac voltage. Such

power supplies are used for high-voltage and low-current devices such as

cathode-ray tubes (the picture tubes in TV receivers, oscilloscopes and computer

display). Here we will consider half-wave voltage doubler, full-wave voltage

doubler and voltage tripler and quadrupler.

Half-Wave Voltage Doubler

The circuit of a half-wave voltage doubler is given in figure shown below. During

the positive half cycle of the ac input, voltage, diode D1 being forward biased

conducts (diode D2 does not conduct because it is reverse-biased) and charges

capacitor C1 upto peak values of secondary voltage Vsmax with the polarity, as

marked in figure shown below.

MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

During the negative half-cycle of the input voltage

diode D2 gets forward biased and conducts charging capacitor C2. For the

negative half cycle, the lower end of the transformer secondary is positive while

upper end is negative. The polarity of the capacitor C2 has also been marked in

the figure. Now starting from the bottom of the transformer secondary and moving

clockwise and applying Kirchhoffs voltage law to the outer loop we have

-Vsmax – Vc1 + Vc2 = 0

Or

Vc2 = Vsmax + Vc1= Vsmax + Vsmax = 2Vsmax = Twice the peak value of the

transformer secondary voltage. (Since Vc1 = Vsmax)

During the next positive half-.cycle diode D2 is reverse-biased and so acts as an

open and capacitor C2discharges through the load If there is no load across the

capacitor, C2 both capacitors stay charged – C1 to Vsmax and C2 to 2Vsmax. If, as

expected there is a load connected to the output terminals of the voltage doubler,

the capacitor C2 discharges a little bit and consequently the voltage across

capacitor C2 drops slightly. The capacitor C2 gets recharged again in the next

half-cycle. The ripple frequency in this case will be the signal frequency (that is,

50 Hz for supply mains.)

Full-Wave Voltage Doubler

The circuit diagram for a full-wave voltage doubler is given in the figure shown

below. During the positive cycle of the ac input voltage, diode D1 gets forward

biased and so conducts charging the capacitor C1 to a peak voltage Vsmax with

polarity indicated in the figure, while diode D2 is reverse-biased and does not

conduct.During the negative half-cycle, diode D2 being forward biased conducts

and charges the capacitor C2with polarity shown in the figure while diode D1 does

not conduct. With no load connected to the output terminals, the output voltage

MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

will be equal to sum of voltages across capacitors C1 and C2 that is, VC1 + VC2or

(Vs max + Vs max) or 2 Vs max. When the load is connected to the output terminals,

the output voltage VLwill be somewhat less than 2 Vs max. The input voltage and

output voltage waveforms are also shown in the figure below.

Voltage Tripler and Quadruples

The half-wave voltage doubler, shown in the earlier figure can be extended to

provide any multiple of the peak input voltage (that is, 3 Vs max, 4 Vs max or 5

Vs max), as illustrated in the figure shown below. It is obvious from the pattern of

the circuit connections how additional diodes and capacitors are to be connected

to provide output voltage, 5,6,7 or 8 times the peak input voltage from a supply

transformer of rating only Vsmax, and each diode in the circuit of PIV rating 2

Vs max. If load is small and the capacitors have little leakage, extremely high dc

voltages can be obtained from such a circuit using many sections to step-up the

dc voltage.

In operation capacitor C1 is charged through diode Dl to a peak value of

transformer secondary voltage, Vsmax during first positive half-cycle of the ac input

voltage. During the negative half cycle capacitor C2 is charged to twice the peak

voltage 2 Vs developed by the sum of voltages across capacitor C1 and the

transformer secondary. During the second positive half-cycle, diode D3 conducts

and the voltage across capacitor C2 charges the capacitor C3 to the same 2

Vg max peak voltage. During the negative half-cycle diodes D2 and D4 conduct

allowing capacitor C3 to charge capacitor C4 to peak voltage 2 VS max. From the

fogure shown below it is obvious that the voltage across capacitor C2 is 2 Vs max,

across capacitors C1 and C3it is 3 Vs max and across capacitors C2 and C4 it is 4

Vs max.

If additional diodes (each diode of PIV rating 2 Vs max) and capacitors (each

capacitor of voltage rating 2 Vsmax) are used, each capacitor will be charged to 2

Vs max. Measuring from the top of the transformer secondary winding (figure

below) will give odd multiples of Vg max at the output, while measuring from the

bottom of transformer secondary winding will give even multiples of the peak

voltage, Vs max.

Tripler and Quadruplar

MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

Some electronic devices, such as cathode ray tubes (in picture tubes in TV

receivers, oscilloscopes and computer display) need dc power supply at high

voltage with low current. This requirement can be met with either by employing a

step-up transformer with a rectifier circuit or by employing voltage multiplier.

Since transformers are very bulky and costly, voltage multipliers are preferred. By

using voltage multipliers, the voltage level is usually raised well into the hundreds

or thousands of volts.

Generally such circuits are employed when both the supply voltage and load are

maintained constant.

5. Describe how output voltage can be regulated with respect to line

variations and load variations using SMPS. (16) (NOV/DEC 2010)

(NOV/DEC 2011) (NOV/DEC’12)

It uses a switching regulator to convert electric power

efficiently. SMPS transfers electric power from a source ( AC mains) to the load

by converting the characteristics of current and voltage. SMPS always provide a

well regulated power to the load irrespective of the input variations. SMPS

incorporates a Pass transistor that switches very fast typically at 50Hz and 1

MHz between the on and off states to minimize the energy waste. SMPS

regulates the output power by varying the on to off time using minimum voltage

so that efficiency is very high compared to the linear power supply.

The SMPS essentially has

1. Input rectifier

2. Inverter

3. Voltage converter

4. Output regulator

Input rectifier

The AC input from mains is first rectified in the SMPS using a rectifier to convert it

into DC. The rectifier consisting of a full wave diode bridge or module that

produces an unregulated DC voltage to the Smoothing capacitor. The input AC

MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

passing into the rectifier has AC voltage pulses that may reduce the power factor.

So control techniques are used to force the average input current to follow the

sine wave.

Inverter

This stage converts the rectified DC into AC using a power oscillator. The

power oscillator has a small output transformer with a few windings at the

frequency 20-100 kHz. Switching is controlled by a MOSFET amplifier. The

output AC voltage is usually isolated optically from the input AC by using

an Optocoupler IC for safety reasons.

Input

6. (i) Explain the working of FWR with CLC filter and derive for its

ripple filter. (12) (ii) Compare HWR and FWR with respect to output

average voltage and ripple factor. (4) (NOV/DEC 2010)

LC Filter: - The ripple factor is directly proportional to the load resistance RL in the inductor filter and inversely proportional to RL in the capacitor

filter. Therefore if these two filters are combined as LC filter or L section filter as shown in figure the ripple factor will be independent of RL.

Input rectifier

and filter

Chopper/controller

Inverter Output transformer Output rectifier

and filter

MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

If the value of inductance is increased it will increase the time of conduction. At some critical value of inductance, one diode, either D1 or D2 will always conducting.

From Fourier series, the output voltage can be expressed as

The dc output voltage,

The ripple factor

CLC or p Filter

The above figure shows CLC or p type filter, which basically consists of a capacitor filter, followed by LC section. This filter offers a fairly

smooth output and is characterized by highly peaked diode currents and poor regulation. As in L section filter the analysis is obtained as follows.

MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

Comparison between HWR and FWR

Parameter HWR FWR

No. of Diodes 1 2

Need of Centre tapping

in secondary of the

transformer winding

No Yes

Average dc voltage Vdc Vm/π 2Vm/π

Average d.c. current Idc Im/π 2Im/π

Ripple Factor γ 1.21 0.48

Maximum Rectification

Efficiency η

40.6 % 81.2 %

Form Factor 1.57 1.11

T.U.F 0.287 0.693

7. Explain how Zener diode acts as a regulator.

As long as the input voltage is a few volts more than the desired output voltage,

the voltage across the zener diode will be stable.As the input voltage increases

the current through the Zener diode increases but the voltage drop remains

constant - a feature of zener diodes. Therefore since the current in the circuit has

increased the voltage drop across the resistor increases by an amount equal to

the difference between the input voltage and the zener voltage of the diode. the

current flowing in the diode is determined using Ohm's law and the known voltage

drop across the resistor R;

IDiode = (UIN - UOUT) / RΩ

The value of R must satisfy two conditions :

1. R must be small enough that the current through D keeps D in reverse

breakdown. The value of this current is given in the data sheet for D. For

example, the common BZX79C5V6[7] device, a 5.6 V 0.5 W zener diode, has a

MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

recommended reverse current of 5 mA. If insufficient current exists through D,

then UOUT is unregulated and less than the nominal breakdown voltage (this

differs to voltage regulator tubes where the output voltage will be higher than

nominal and could rise as high as UIN). When calculating R, allowance must be

made for any current through the external load, not shown in this diagram,

connected across UOUT.

2. R must be large enough that the current through D does not destroy the

device. If the current through D is ID, its breakdown voltage VB and its maximum

power dissipationPMAX correlate as such: .

A load may be placed across the diode in this reference circuit, and as long as

the zener stays in reverse breakdown, the diode provides a stable voltage

source to the load. Zener diodes in this configuration are often used as stable

references for more advanced voltage regulator circuits.

Shunt regulators are simple, but the requirements that the ballast resistor be

small enough to avoid excessive voltage drop during worst-case operation (low

input voltage concurrent with high load current) tends to leave a lot of current

flowing in the diode much of the time, making for a fairly wasteful regulator with

high quiescent power dissipation, only suitable for smaller loads.

These devices are also encountered, typically in series with a base-emitter

junction, in transistor stages where selective choice of a device centered around

the avalanche or zener point can be used to introduce compensating

temperature co-efficient balancing of the transistor PN junction. An example of

this kind of use would be a DC error amplifier used in aregulated power

supply circuit feedback loop system.

Zener diodes are also used in surge protectors to limit transient voltage spikes.

Another notable application of the zener diode is the use of noise caused by

its avalanche breakdown in a random number generator.

8. Explain in detail about Bridge rectifier circuit. (16)

MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

EC 2205 – ELECTRONIC CIRCUITS I -III SEM ECE

In the circuit diagram, 4 diodes are arranged in the form of a bridge. The

transformer secondary is connected to two diametrically opposite points of the

bridge at points A & C. The load resistance RL is connected to bridge through

points B and D.

During the first half cycle

During first half cycle of the input voltage, the upper end of the transformer

secondary winding is positive with respect to the lower end. Thus during the first

half cycle diodes D1 and D3 are forward biased and current flows through arm

AB, enters the load resistance RL, and returns back flowing through arm DC.

During this half of each input cycle, the diodes D2 and D4 are reverse biased and

current is not allowed to flow in arms AD and BC.

During the second half cycle

During second half cycle of the input voltage, the lower end of the transformer

secondary winding is positive with respect to the upper end. Thus diodes D2 and

D4 become forward biased and current flows through arm CB, enters the load

resistance RL, and returns back to the source flowing through arm DA. Flow of

current has been shown by dotted arrows in the figure. Thus the direction of flow

of current through the load resistance RL remains the same during both half

cycles of the input supply voltage.