lte-advancedovercoming design challenges for 4g phy architectures”

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1 “LTE-Advanced: Overcoming Design Challenges for 4G PHY Architectures” 2011 Greater insight. Greater confidence. Copyright © 2011 Agilent Technologies Agenda Standards Overview LTE-Advanced - New Features LTE-Advanced - Channel Model Introduction to Agilent SystemVue Introduction to Agilent SystemVue Design Challenges Working algorithmic reference Flexible early verification & project NRE Carrier Aggregation & RF stress MIMO & Channel considerations Verification increasing Copyright © 2011 Agilent Technologies 2011 Greater insight. Greater confidence. Verification increasing Conclusion and Q&A 2

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Page 1: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

1

“LTE-Advanced:Overcoming Design Challenges

for 4G PHY Architectures”

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.Greater insight. Greater confidence.

Copyright © 2011 Agilent Technologies

Agenda

Standards Overview• LTE-Advanced - New Features• LTE-Advanced - Channel Model

Introduction to Agilent SystemVueIntroduction to Agilent SystemVue

Design Challenges• Working algorithmic reference• Flexible early verification & project NRE• Carrier Aggregation & RF stress• MIMO & Channel considerations• Verification increasing

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

• Verification increasing

Conclusion and Q&A

2

Page 2: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

2

LTE-Advanced Requirement

Performance indicators LTERelease 8

IMT-Advanced LTE-AdvancedRelease 10

Peak data rate DL 300 Mb/s 1Gb/s 1 Gb/sUL 75 Mb/s 500 Mb/s

Peak spectrum DL 15 [bps/Hz] 15 [bps/Hz] 30 [bps/Hz]Peak spectrum efficiency [bps/Hz]

DL 15 [bps/Hz] 15 [bps/Hz] 30 [bps/Hz]UL 3.75 [bps/Hz] 6.75 [bps/Hz] 15 [bps/Hz]

Control plane latency < 100 ms 100 ms < 50 msUser plane latency < 5 ms 10 ms < Rel – 8 LTEScalable bandwidth support Up to 20 MHz Up to 40 MHz Up to 100 MHzVoIP capacity 200 Active users per

cell in 5 MHzUp to 200 UEs per

cell in 5 MHz3 times higher than

that in LTE

Cell spectrum efficiency(bps/Hz)

DL 2x2 1.69 2.44x2 1.87 2.6 2.64x4 2.67 3.7

UL 1x2 0.735 1.2

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

2x4 - 2.0Cell edge spectrum efficiency(bps/Hz)

DL 2x2 0.05 0.074x2 0.06 0.075 0.094x4 0.08 0.12

UL 1x2 0.024 0.042x4 - 0.07

3

Release 10 Activity (LTE-Advanced)

LTE-Advanced Enhancements (relative to Release 8/9, LTE)

Emerging Technologies(Release 10 & beyond)

• Carrier aggregation (CA)- Contiguous and non-contiguous- Control channel design for UL/DL

• Enhanced multiple access scheme- Clustered SC-FDMA- Simultaneous Control and Data

• Enhanced MIMO transmission

• Relaying (multi-hop transmission)

• Coordinated multipoint (CoMP) transmission and reception

• Support for heterogeneous networks

• LTE self-optimizing networks (SON)

• HeNB and HeNB mobility

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

• Enhanced MIMO transmission- Downlink 8 antennas, 8 streams- Uplink 4 antennas, 4 streams

enhancements

• CPE RF requirements

4

Page 3: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

3

LTE Key Parameters (review)LTE-A builds on top of LTE Parameters and Frame Structure

UL adopts single carrier FDMA (SC-FDMA )• allows for commonality with the downlink OFDMA scheme

Access DL OFDMAAccess scheme

DL OFDMAUL SC-FDMA

Bandwidth 1.4, 3, 5, 10, 15, 20 MHzMinimum TTI 1 msSubcarrier spacing 15 kHzCyclic prefix length

Short 4.7 usLong 16.7 us

Modulation QPSK, 16-QAM, 64-QAMS ti l lti l i Si l l f UL UE

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

Spatial multiplexing Single layer for UL per UEUp to 4 layers for DL per UEMU-MIMO supported for UL and DL

REV-090003r1 IMT-Advanced Evaluation Workshop 17 – 18 December, 2009, Beijing

5

LTE Frame Structure (review)

Supports both FDD and TDD frame structures

One radio frame 10ms

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

One slot

One radio frame 10ms

FDD

4 5 6 7 14 15 16 17 18 19

UL

DL fDL

fUL

fDL/UL

special subframe

one subframe

TDDUL

special subframe

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

Stefan Parkvall et al “The Evolution of LTE towards IMT-Advanced,” Journal of Communications, Vol. 4, No. 3, April 2009

0 1 2 8 9 10 11 12

fDL/UL

DWPTS GP UpPTS

TDDDL

6

Page 4: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

4

LTE-A Enhancement #1: Carrier Aggregation• Wider bandwidth transmission using carrier

aggregation (CA) – support higher data rate– system bandwidths up to 100 MHz (5 component carriers

(CCs))

20 MHzLTE terminal

20 MHzLTE terminal

• Backward compatible with Rel-8 LTE when overlaid in IMT carrier bands.

• Supports both contiguous(figure a) and non-contiguous(figure b) carrier aggregation.

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

20 MHz

LTE-Advanced terminal, 100MHz

(a) Contiguous carrier aggregation

… …(b) Non-contiguous carrier aggregation

20 MHz

LTE-Advanced terminal, 100MHz

7

Downlink Multiple Access Scheme with CA

Downlink OFDMA with component carrier (CC) based structure

• One transport block is mapped within CC

Channel coding

Channel coding

Channel coding

Channel coding

Transportblock 1

Transport block 2

Transport block 3

Transport block 4

one CC

• Parallel-type transmission for multi-CC transmission (in good alignment with Release 8 specifications)

• Cross-carrier scheduling is possible– DL control channels (such as PDCCH,

PCFICH, and PHICH) are updated to support cross carrier sched ling

HARQ HARQ HARQ HARQ

Modulation Modulation Modulation Modulation

Mapping Mapping Mapping Mapping

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

cross-carrier scheduling. – Add a Carrier Indicator Field (CIF) to DCI.

20MHz CC1

One eNB

20MHz CC2 20MHz CC3 20MHz CC4

8

Page 5: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

5

LTE-A Enhancement #2: Uplink Multiple Access Scheme

Uplink adopts Clustered DFT S OFDM

from DFT

ToIFFT

0

Uplink adopts Clustered DFT-S-OFDM• allows non-contiguous (clustered) groups of

subcarriers as well as contiguous subcarriers to be allocated for transmission by a single UE.

• support dynamic switching between Rel.8 single cluster transmission and Rel.10 clustered transmission

Simultaneous PUCCH and PUSCH transmission

0

from DFT

ToIFFT

0

0

(a) Contiguous subcarriers allocation

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

Simultaneous PUCCH and PUSCH transmission

0

(b) non-contiguous subcarriers allocation PUSCH PUSCH

PUCCH

CC CC

9

Uplink Multiple Access Scheme with CA

• Achieve wider bandwidth by adopting parallel multi-CC transmission to satisfy requirements for peak data rate while maintaining

Channel coding

Channel coding

Channel coding

HARQ HARQ HARQ

Transportblock 1

Transport block 2

Transport block 3

Channel coding

HARQ

Transport block 4

backward compatibility.

• Each transport block is mapped to a single component carrier.

• A UE may be scheduled over multiple component carriers simultaneously

Modulation Modulation Modulation

RB mapping

RB mapping

RBmapping

DFT DFT DFT

Modulation

RBmapping

DFT

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

simultaneously

CC1 20MHz CC2 20MHz CC3 20MHz CC4 20MHz

One UE

10

Page 6: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

6

Uplink PUSCH Processing in LTE-Advanced

Figure (a) shows the same channel coding procedure as LTE.

Data arrives to the coding unit in the form of a maximum of two transport blocks every t i i ti i t l (TTI) UL ll

Transport block CRC attachment

Code block segmentationCode block CRC attachment

Channel coding

transmission time interval (TTI) per UL cell.

Figure (b) shows the uplink physical channel processing including MIMO processing.

Up to two codewords can be supported.

Rate matching

Code block attachment

Data and control multiplexing

Channel coding

CQI

Channel Interleaver

Channel coding

RI

Channel coding

ACK/NACK

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

(a) Transport channel processing for UL-SCH (b) Overview of uplink physical channel processing

Scrambling Modulation mapper

Layer

MapperPrecoding

Resource element mapper

OFDM signalgeneration

Scrambling Modulation mapper

Resource element mapper

OFDM signalgeneration

codewords layers antenna ports

Transform precoder

Transform precoder

11

LTE-A Enhancement #3: multiple antenna transmission

• From 4 antennas/streams to 8 antennas/streams– Baseline being 4x4 with 4 UE Receive Antennas– Peak data rate reached with 8x8 SU-MIMO

• From 1 antenna/stream to 4 antennas/streams1, 2 or 4 transmitters

New for LTE-A

– Baseline being 2x2 with 2 UE Transmit Antennae– Peak data rate reached with 4x4 SU-MIMO

• Focus is initially on downlink beamsteering up to 4x2 antennas – SM is less attractive

• Challenges of higher order antenna transmission– Creates need for tower-mounted remote radio

heads

UE

transmitters and 2, 4 or 8 receivers

2, 4 or 8 transmitters and 2, 4 or 8 receivers

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

heads– Increased power consumption– Increased product costs– Physical space for the antennae at both eNB and UE

eNodeB

receivers

12

Page 7: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

7

Enhanced Downlink MIMO Transmission Scheme

LTE DL MIMO uses antenna ports with cell-specific reference signals (CRS)LTE-Advanced DL MIMO uses antenna ports with UE-specific reference

signals (DM-RS)CRS0

Precoding

… …Layer Mapper

Resource element mapper

Resource element mapper

……

CRSN-1

DM-RS0 CSI-RS0

(a) CRS-based MIMO

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

Precoding

… …Layer Mapper

Resource element mapper

Resource element mapper

……CSI-RSN-1DM-RSM-1

(b) DM-RS-based MIMO

CSI reference signals (CSI-RS)

13

• Geometry-based stochastic model• Similar to WINNER II MIMO channel model• S x U, N Clusters (multipath)

LTE-Advanced MIMO Channel Model

Array 2

Array 1(S Tx elements)

Array 2(U Rx elements)

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

14

Page 8: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

8

Array 1(S Tx

elements)

Array 2(U Rx

elements)

LTE-Advanced MIMO Channel Model

The impulse response matrix of the U x S MIMO channel

( ) ( )∑=

=N

nn tt

1;; ττ HH

( ) ( ) ( ) ( )∫∫= ϕφφϕφτϕτ ddtt Ttxnrxn ,,;; FhFH

Where: – Ftx and Frx are antenna array response matrices

for the transmitter (Tx) and the receiver (Rx). – hn is the dual-polarized propagation channel response matrix for cluster n.

The channel from Tx antenna element s to Rx element u for cluster nis expressed as ( ) ( )T

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

is expressed as( ) ( )

( )( )( )

( )( ) ( )( )( ) ( )mnmn

stxmnurxmn

mnHstx

mnVstx

HHmnHVmn

VHmnVVmnT

mnHurx

mnVurxM

mnsu

tjrjrj

FF

aFF

tH

,,

,,1

0,,1

0

,,,

,,,

,,,,

,,,,

,,,

,,,

1,,

2exp 2exp2exp

;

ττδπυφπλϕπλ

φφ

ααα

ϕϕ

τ

−×

⋅⋅×

⎥⎦

⎤⎢⎣

⎡⎥⎦

⎤⎢⎣

⎡⎥⎦

⎤⎢⎣

⎡=

−−

=∑

15

LTE-Advanced MIMO Channel Model (cont’d)

• Stage 1 of 3 consists of two steps. 1. First, the propagation scenario is selected. 2. Then, the network layout and the antenna configuration are determined.

• In Stage 2 of 3, large-scale and small-scale parameters are defined.

260

90

120

Antenna 1 gain pattern

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

0.5

1

1.5

30

210

60

240270

120

300

150

330

180 0

Antenna 2 gain pattern

Antenna pattern

16

Page 9: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

9

LTE-Advanced MIMO Channel Model (cont’d)

• In Stage 3, channel impulse responses (ChIRs) are calculated. Please note antenna pattern should be input to ChIR generation to calculate correlation matrix.

Channel coefficient generation procedure

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

17

Agenda

Standards Overview• LTE-Advanced - New Features• LTE-Advanced - Channel Model

Introduction to Agilent SystemVueIntroduction to Agilent SystemVue

Design Challenges• Working algorithmic reference• Flexible early verification & project NRE• Carrier Aggregation & RF stress• MIMO & Channel considerations• Verification increasing

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

• Verification increasing

Conclusion and Q&A

18

Page 10: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

10

Unified architecture, verification tools for Layer 1 CommsAugments general purpose environments, or, stands on its own

Cross-domain PHY modeling framework, for Model-Based Design

Agilent SystemVueCross domain PHY modeling framework, for Model Based Design

Baseband AlgorithmsDataflow Simulation

Baseband AlgorithmsDataflow Simulation

RF Sys ArchitectureRF Simulators

PHY IP PHY IP

TESTTESTRF Hardware FlowsRFIC / MMIC

Hardware SiP / BoardHardware

Baseband Hardware Flows

GPP/ARMSoftware

DSP/ASSPSoftware

FPGA/ASIC/SoCHardware

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

PHY system integrationand verification

Complete a working PHY using combinations of Software, RF/BB Hardware, Simulation, and Measurements

19

Integrated, top-down Comms ESL flow Cross-domain model-based design: RF, Comms, and C++/HDL

Dataflow Simulation

MEASUREMENT, ANALYSISSystem designRF Architecture

Baseband designPHY Reference

Handwritten HDL

Custom IP HDL Simulator(s)

SIMULATED H/W

Dataflow Simulation

.m/C++ ALGORITHM

AlgorithmsC++, .m

VSA softwareFlexDCA software

Infiniium ScopeMXA / PXATarget-neutral

HDL Generation

PHY Reference

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

.bitFiles

FPGASynthesis

FPGASynthesis

FPGA Target

REAL HARDWARE

SIMULATED H/W

DIGITAL BITS, or MODULATED CARRIERS

MXG / ESG Logic Analyzer

Wideband arbs RF sensor

20

Page 11: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

11

Agenda

Standards Overview• LTE-Advanced - New Features• LTE-Advanced - Channel Model

Introduction to Agilent SystemVueIntroduction to Agilent SystemVue

Design Challenges• Working algorithmic reference• Flexible early verification & project NRE• Carrier Aggregation & RF stress• MIMO & Channel considerations• Verification increasing

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

• Verification increasing

Conclusion and Q&A

21

• As a design progresses :System Architecture Algorithm RTL finished hardware– How many different IP references get written, used, thrown away? (NRE)

Design Challenge #1 – Working Algorithmic Reference

– Are they compatible? Flexible? Updated? – Are they from a trusted source?– Can you re-use tests and scripting?

• Are the BB and RF teams working from the same IP references?

• Everyone needs some level of algorithm reference

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

Everyone needs some level of algorithm reference.

• Now able to deliver this IP throughout the design flow

22

Page 12: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

12

SystemVue W1918 LTE-Advanced baseband libraryWhat is included?W1918 LTE-Advance BVL includes: Release 8

LTERelease 10

LTE-Advanced

Compiled dataflow simulation blocks 104 parts 66 parts

C++ “exploration” source code Optional, add-on not yet available

Packaged MIMO Sources/Receivers, w/GUI 10 ref designs 4 ref designs

Testbenches / Reference Examples 16 examples 10 (to date)

Works with existing instrument H/W Yes Yes

Works with Agilent 89600B VSA and SignalStudio software personalities

Yes Yes

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

SignalStudio software personalities

Works with Agilent W1716 DPD Yes, integrated Yes, integrated

Works with Agilent W1715 MIMO Channelfor simulation-based fading

Yes Yes, extended for LTE-A

23

W1918 LTE-Advanced baseband verification library An open, “Golden Reference” for model-based design

Algorithmic Development Environment

Code-generation

User IP.m math code

C++ RTL

Test Vectors & scripts

HDL test bench

FPGA Development Environment

FPGA Hardware Test SYSTEMVUE OUTPUT VECTOR

SYSTEMVUE OUTPUT VECTOR

HDL VECTORSYSTEMVUE INPUT VECTOR

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

24

Code-generationWin32 DLL

C++ (special option*) FPGA VECTORSYSTEMVUE INPUT VECTOR

*LTE source code exploration library (W1912) is a special option

Page 13: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

13

Algorithmic lifecycle, for Model-Based Design

ALGORITHMIC MODELING…

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

25

THAT STAYS IN TOUCH WITH RF & SYSTEM-LEVEL

PERFORMANCE

SystemVue LTE-Advanced Library

Downlink Enhancement• Higher order DL MIMO: Up to 8 Tx 8 Rx Antennas• Support transmission to both R10 UEs and R8 UEs in a single source• Use DMRS to demodulate PDSCHUse DMRS to demodulate PDSCH• Precoding Codebook can be customized• Virtual Antenna Mapping: mapping matrix can be customized

Uplink Enhancement• Support Enhanced Uplink Multiple Access (clustered DFT-S-OFDM)• Support Uplink MIMO: up to 4 Tx and 4 Rx antennas

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

pp p p

Carrier Aggregation• Support both inter and intra-band Carrier Aggregation

for both downlink and uplink

26

Page 14: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

14

• How do you verify a standard that keeps Evolving? (the E in LTE-A)

• Configuring standard-compliant test benches (such as TS 36.101-104) i S i ti N R i E i i (NRE) j t t

Design Challenge #2 – Flexible early verification & NRE

requires Scripting, Non-Recurring Engineering (NRE) project costs, and Reference IP

• Many tests also require a completed, operational system, with closed feedback loop (e.g. – for Throughput testing).

• SystemVue libraries typically provide

1 f fi d b h i l d d

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

– 5-15 of pre-configured testbenches, per wireless standard– Complete working reference PHY to start with.– Parameterized, fully-coded, modifiable Sources, Receivers, etc– Specialized measurements for Throughput, EVM, ACLR, etc

27

Dynamic Dataflow (simulation technology enhancement )Enables dynamic MAC-like changes during simulation, while preserving timed RF

CODED MIMORCVR

CODED MIMO

SOURCE HARQ

Receiver requests dynamic Source changes Link converges to highest Throughput

Updated “throughput” status during simulation as the

RF TXnonlinearity,phase noise

RF RXnonlinearity,

noise

8x8 MIMO

Channelantennas

fadingdoppler

interference

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

Updated throughput status during simulation, as the LTE/LTE-A link adapts to an optimal PHY configuration

28

Page 15: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

15

LTE-Advanced DL ThroughputThroughput measurements, up to 8x8, w/active HARQ

• Up to 8x8 MIMO• Fading, RF impairments• Fully coded/decoded

ACK/NACK

Tx RF Rx RFFr eq

Ou tp u tTim in g =Eq u a lTo InputN=1

D1 {De la y @Da ta Flo w M o d e ls}

Ou tp u tTim in g =Eq ua lTo InputN=1

D1 0 {De la y @Da ta Flow M o d e ls}

Fully coded/decoded• Closed loop, with

Active HARQ

LTE-LTE-

LTE-A BB Source

MIMOChannel LTE-A BB Receiver

Re

m

R3 {Re c tTo Cx @Da ta Flo w M o d e ls}

DeMod IAm p

Fr eqPhase

Q

FCa rrie r=2 e +9Hz [FCa rrier]Ou tp u tTyp e =I/Q

D4

NoiseDens ity

NDe n s i ty =6.6 6 7 e -1 2 W [NDe n sity]NDe n s i ty Ty p e=Co n s ta n t no is e density

A3

NoiseDens ity

NDe n s i ty =6.6 6 7 e -1 2 W [NDe n sity]NDe n s i ty Ty p e=Co n s ta n t no is e density

A8

Re

Im

R8 {Re c tToCx @Da ta Flow M o d e ls}

DeMod IAm p

Fr eqPhase

Q

FCa rrie r=2 e +9Hz [FCa rrier]Ou tp u tTyp e =I/Q

D9

Re

m

R5 {Re c tTo Cx@Da ta Flo w M o d e ls}

NoiseDens ity

NDe n s i ty =6 .66 7 e -1 2 W [NDe n sity]NDe n s i ty Ty p e =Co n s ta n t n ois e density

A5

NoiseDens ity

NDe n s i ty =6 .66 7 e -1 2 W [NDe n sity]NDe n s i ty Ty p e =Co n s ta n t n ois e density

A7

Re

Im

R7 {Re c tToCx @Da ta Flow M o d e ls}

DeModI

Am p

Fr eqPhase

Q

FCarrie r=2 e +9 Hz [FCa rrier]Ou tp u tTy pe =I/Q

D6

NoiseDens ity

NDen s i ty =6 .6 6 7e -1 2 W [NDe nsity]NDe ns i ty Ty p e =Con s ta n t n o is e density

A6

DeMod IAm p

PhaseQ

FCa rrie r=2 e +9 Hz [FCa rrier]Ou tp u tTy p e =I/Q

D7

Re

m

R6 {Re c tTo Cx@Da ta Flo w M o d e ls}

DeModI

Am p

Fr eqPhase

Q

FCarrie r=2 e +9 Hz [FCa rrier]Ou tp u tTy pe =I/Q

D8

LTEAdvance_Channel

Th eta M s=0Th eta Bs=0

Rx An te n n a Pa tte rn Ty p e =Om niDi re c tionalRx Po s i ti o n_ Y=0 ;0 .5 [[0, 0.5]]Rx Po s i ti o n_ X=0 ;0 [[0 , 0.0]]

Nu m b e ro fRx=2Tx Ro tatio n An g le=0

Tx An te n n a Pa tte rn Ty p e =Om niDi re ctionalTx Po s i tio n _ Y=0 ;2 [[0, 2]]

Tx Po s i ti o n_ X=0 ;0 [[0 , 0.0]]Nu m b e ro fTx=2

Se e d =0Ch a n n e lL in kDi re c tio n =Downlink

Sa m p le Ra te =5 e 6HzCa rrie rFre qu e n c y =2 .5e9Hz

L TEAd v a n ce Sc e n a rio Typ e=InHL 3 {L TEAd v a n c e _ Ch an n e l@M IM O Ch a n n e l M odels}

Sa m p leRa te =7 .6 8 e +6 Hz [Sa m p lin gRate]Po we r=1 W

Freq u e n c y =2 e+9 Hz [FCa rrier]O1

ModO UT

Q UADO UT

Fr eqPhaseQ

Am p

FCa rrie r=2 e +9 Hz [FCarrier]In pu tTy p e =I/Q

M8

Re

Im

C9

ModO UT

Q UADO UT

Fr eqPhaseQ

Am p

FCa rrie r=2 e +9 Hz [FCarrier]In pu tTy p e =I/Q

M7

Re

Im

C8

ModO UT

Q UADO UT

Fr eqPhaseQ

Am p

FCa rrie r=2 e +9 Hz [FCarrier]In pu tTy p e =I/Q

M6

Re

Im

C7

ModO UT

Q UADO UT

Fr eqPhaseQ

Am p

FCa rrie r=2 e +9 Hz [FCarrier]In pu tTy p e =I/Q

M5

Re

Im

C6

ModO UT

Q UADO UT

Fr eqPhaseQ

IAm p

FCa rrie r=2 e+9 Hz [FCa rrier]In p u tTy p e =I/Q

M4

Re

Im

C5

1 1 0 1 0

Da ta Pa ttern =PN15B4 {Da ta Pa tte rn @Da ta Flo w M od e ls}

1 1 0 1 0

Da ta Pa ttern =PN9B2 {Da ta Pa tte rn @Da ta Flo w M od e ls}

U E 1 _ D a ta

H A R Q _ B its

f r m _TD

f r m _FD

U E 1 _ M o d S y m bols

U E 1 _ Ch a n n e lB its

S C _ S t a tusU E 1 _ PM I

L TE_A

DL

Src

UEs _ n _SCID=0 ;0 ;0 ;0;0 ;0 [[0 , 0 , 0, 0 , 0 , 0]]Us erDe fin e d An tM a p p in g M a trix=NO

L TE_ A_ DL _ Src _1

A n t 1 _ TD

A n t 2 _ TD

U E 1 _ R a w B its

U E 1 _ C h a n n e lB its

U E 1 _ M o d S y m bols

U E 2 _ M o d S y m bols

U E 3 _ M o d S y m bols

U E 4 _ M o d S y m bols

U E 5 _ M o d S y m bols

U E 6 _ M o d S y m bols

P D C C H _ M o d S y m bols

P H I C H _ M o d S y m bols

P C F I C H _ M o d S y m bols

P B C H _ M o d S y m bols

S S S _ M o d S y m bols

P S S _ M o d S y m bols

D a t aO ut

U E 1 _ H A R Q _ B itsU E 1 _ T BS

U E 1 _ PM I

L TE_A

DL

Ba s e band

Re c e iver

UEs _ n _ SCID=0 ;0 ;0 ;0 ;0 ;0 [[0 , 0 , 0 , 0 , 0, 0]]LTE_ A_ DL _ Rcv_1

LTE-

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

29

LTEAdvancedChannel Model

AdvancedDownlink

MIMO source

BER/FER and throughput

NoiseDens ity

NDen s i ty =6 .6 6 7e -1 2 W [NDe nsity]NDe ns i ty Ty p e =Con s ta n t n o is e density

A2

DeMod IAm p

Fr eqPhase

Q

FCa rrie r=2 e +9 Hz [FCa rrier]Ou tp u tTy p e =I/Q

D2

Re

m

R1 {Re c tTo Cx@Da ta Flo w M o d e ls}

NoiseDens ity

NDe n s i ty =6 .66 7 e -1 2 W [NDe n sity]NDe n s i ty Ty p e =Co n s ta n t n ois e density

A1

Re

Im

R2 {Re c tTo Cx@Da ta Flo w M o d e ls}

DeModI

Am p

Fr eqPhase

Q

FCarrie r=2 e +9 Hz [FCa rrier]Ou tp u tTy pe =I/Q

D3

DeModI

Am p

Fr eqPhase

Q

FCarrie r=2 e +9 Hz [FCa rrier]Ou tp u tTy pe =I/Q

D5

Re

m

R4 {Re c tTo Cx@Da ta Flo w M o d e ls}

NoiseDens ity

NDe n s i ty =6 .66 7 e -1 2 W [NDe n sity]NDe n s i ty Ty p e =Co n s ta n t n ois e density

A4

Co rre la tio n M a tri x Ou tp u tFla g=NOCh a n n e lCo e ffi c ie n tOu tp u tFlag=NO

M s Bs Dis ta n c e=10MUs e Pa thL o s s M o d e l=NO

Us e In tra Clu s te rDe la y s=NOUs e M a n u alPro p Co n d =NO

Us e Sh ad o wM o d e l=NOUs e Po la ri s e =NO

Us e Fix e d CDL Pa ra m e te r=YESDro p Inte rv a l=0 .05s

M SDi re c tio n =30M SVe lo c i ty=50

Th eta M s=0

ModO UT

Q UADO UT

Fr eqPhaseQ

IAm p

FCa rrie r=2 e+9 Hz [FCa rrier]In p u tTy p e =I/Q

M3

Re

Im

C4

ModO UT

Q UADO UT

Fr eqPhaseQ

Am p

FCa rrie r=2 e +9Hz [FCa rrier]In p u tTyp e =I/Q

M2

Re

Im

C3

Re

Im

C2

ModO UT

Q UADO UT

Fr eqPhaseQ

Am p

FCa rrie r=2 e +9Hz [FCa rrier]In p u tTyp e =I/Q

M1

1 1 0 1 0

Da ta Pa tte rn =PN9B3 {Da ta Pa tte rn @Da ta Flo w M od e ls}

TEST

REF

Bi ts Pe rFra m e =100Sta rtSto pOp tio n =Sa m ples

B1 {BER_ FER@Da ta Flo w M o d e ls }

LTEAdvancedDownlink

MIMO Receiver

Hybrid Simulation/Test – Manually closing a loopLTE FDD UL Throughput Test (TS 36.141), or BER/BLER

Signal GeneratorSystemVue – Generates signal, then closes the loop

STEP 1

Filter X

~

Filter A/D 1 2 3 4

DUGainDPDFilterX

~

A/D

RU DU

CPRI

SystemVue – LTE decode

Customer Hardware eNodeB receiver

STEP 2

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

Signal AnalyzerVSA 89600 waveform recording

y

30

Page 16: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

16

Pre-configured LTE-Advanced MIMO Sources & Receivers3 Levels of User Interaction are supported

High level GUI Detailed piecesor

Simplified, tabbed GUI

U E 1 _ Data

H A R Q _ Bits

f rm _TD

f rm _FD

U E 1 _ M odSym bols

U E 1 _ C h a nnelBits

S C _ S tatusU E 1 _PM I

LTE_A

DL

Src

LTE_A_DL_Src_5

UEs CDD Mode=1;1;1;1;1;1[[1 1 1 111]]UEs_MIMO_Mode=0;0;0;0;0;0 [[0,0,0,0,0,0]]

ShowMIMO_Parameters=YESSS_PerTxAnt=NO

RB_MappingType=LocalizedUEs_RevMode=1;1;1;0;0;0 [[1, 1, 1, 0, 0, 0]]

CellID_Group=0CellID_Sector=0

CyclicPrefix=NormalOversamplingOption=Ratio 2

Bandwidth=BW 5 MHzSpecialSF_Config=Config 0

TDD_Config=Config 0FrameMode=FDD

ShowSystemParameters=YES

Scriptable schematic

Open, parameterized, reference design

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

UE1_MappingType=0;0;0;0;0;0;0;0;0;0 [[0,0,0,0,0,0,0,0,0,0]]555;2555;2555;2555;2555;2555;25... [[2555,2555,2555,2555,2555,2555,255

UE1_Config=Transport block sizeUE1_PMI_Delay=6

UE1_PMI_Granularity=25UE1_CL_Precoding_Enable=NO

UE1_MaxHARQTrans=4UE1_NumHARQ=8

UE1_HARQ_Enable=NOShowUE1_Parameters=YES

UEs_NumOfLayers=8;8;8;2;2;2 [[8,8,8,2,2,2]]UEs_NumOfCWs=2;2;2;2;2;2 [[2,2,2,2,2,2]]UEs_CdBlk_Index=0;0;0;0;0;0 [[0,0,0,0,0,0]]UEs_CDD_Mode=1;1;1;1;1;1 [[1,1,1,1,1,1]]

MIMO DL Source subnetwork

31

Inside the SystemVue LTE-Advanced Downlink Source

Control Channels

in put o u tput

PM I

LTE DL

LayMapPrecoder

Num TxAnt s=Tx2 [ CRS_Num Ant Por t s]PCFI CH_LayMapPrecoder

CellI D_Gr oup=0 [ CellI D_Gr oup]CellI D_Sect or=0 [ CellI D_Sect or ]CyclicPref ix=Nor m al [ CyclicPref ix]

PBCH_Scr am bler

Num Bit s=2B2

Per iodic=YESO f f set =0V

Explicit Values=240; 0; 0; 0; 0; 0; 0; 0; 0; 0V [ BCH_Bit s]W1 { WaveFor m@Dat a Flow M odels}

Re

Im

R6 {Rect ToCx@Dat a Flow Models}

Re

Im

C9 { CxToRect @Dat a Flow M odels}

Table(n)

PCFI CH_M apper 1

I nf oBit sSize=40 [ 24+16]ChannelType=BCHPBCH_ConvCoder

[ ]Dynamic

# r ows # cols

For mat =ColumnM ajorD3 { Dynam icPack_M @Dat a Flow Models}

LTE

DL_HI

HI =1; - 1; -1; -1; -1; -1; - 1; -1 [HI]PHI CH_Ng=Ng 1/ 6 [ PHI CH_Ng]

PDCCH_SymsPerSF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_SymsPerSF]CyclicPref ix=Norm al [ CyclicPref ix]

Bandwidt h=BW 5 M Hz [ Bandwidt h]Fram eM ode=FDD [ Fram eMode]

HI

LTE

DL_CFI

PDCCH_SymsPerSF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_SymsPerSF]Bandwidt h=BW 5 M Hz [ Bandwidt h]Fram eM ode=FDD [ Fram eMode]

DL_CFI

LTE PHI CH

LayM apPrecoder

PHI CH_Ng=Ng 1/ 6 [ PHI CH_Ng]PDCCH_Sym sPerSF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPerSF]

CellI D_G r oup=0 [ CellI D_G roup]CellI D_Sect or =0 [ CellI D_Sect or ]CyclicPr ef ix=Nor mal [ CyclicPr ef ix]

Num TxAnt s=Tx2 [ CRS_Num Ant Por t s]Bandwidt h=BW 5 M Hz [ Bandwidt h]Fr am eM ode=FDD [ Fram eM ode]

PHI CH_LayM apPrecoder

In

O ut

M odSym

LTE

PCFI CH

Scrambler

PDCCH_Sym sPerSF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPerSF]CellI D_G r oup=0 [ CellI D_G roup]CellI D_Sect or =0 [ CellI D_Sect or ]

Bandwidt h=BW 5 M Hz [ Bandwidt h]Fr am eM ode=FDD [ Fram eM ode]

L4

in put o u tput

PM I

LTE DL

LayMapPrecoder

Num TxAnt s=Tx2 [ CRS_NumAnt Por t s]PBCH_LayM apPrecoder

PDSCHs--->UE2~6

L T E _ A _ D L _ V ir t ualAntMapping

T x _ A ntennaI n p u tPorts

Ant MappingM at r ix=1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0 [ Ant M appingMat rix]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]

Num TxAnt s=Tx8 [ NumTxAnt s]UE_RevMode=0

PHI CH_Vir t ualAnt M apping

L T E _ A _ D L _ V ir t ualAntMapping

T x _ A ntennaI n p u tPorts

Ant MappingM at r ix=1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0 [ Ant M appingMat rix]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]

Num TxAnt s=Tx8 [ NumTxAnt s]UE_RevMode=0

PCFI CH_Vir t ualAnt Mapping

L T E _ A _ D L _ V ir t ualAntM apping

T x _ A ntennaI n p u tPorts

Ant M appingM at r ix=1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0 [ Ant M appingM at rix]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]

Num TxAnt s=Tx8 [ Num TxAnt s]UE_RevM ode=0

PBCH_Vir t ualAnt Mapping

LTE_A

M I M O Mapper

PDCCH_Sym sPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPerSF]Num O f Layers=8 [ UEs_Num O f Layers( 3) ]

RB_Alloc=0; 0 [ UE3_RB_Alloc]RB_AllocType=St ar t RB + Num RBs [ RB_AllocType]

CyclicPr ef ix=Nor mal [ CyclicPr ef ix]CRS_NumAnt Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]

Num TxAnt s=Tx8 [ NumTxAnt s]Bandwidt h=BW 5 M Hz [ Bandwidt h]Fr am eM ode=FDD [ Fr am eM ode]

CW2_M appingType=QPSK [ UE3_CW2_M appingType]CW1_M appingType=QPSK [ UE3_CW1_M appingType]

CW2_Dat aPat t ern=PN9CW1_Dat aPat t ern=PN9

UE_RevMode=Release_10 [ UEs_RevM ode(3) ]UE3_M apper

LTE_A

M I M O M apper

PDCCH_Sym sPerSF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPerSF]Num O f Layers=2 [ UEs_Num O f Layers( 5) ]

RB_Alloc=0; 0 [ UE5_RB_Alloc]RB_AllocType=St ar t RB + NumRBs [ RB_AllocType]

CyclicPr ef ix=Norm al [ CyclicPr ef ix]CRS_NumAnt Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]

Num TxAnt s=Tx8 [ Num TxAnt s]Bandwidt h=BW 5 M Hz [ Bandwidt h]Fr am eM ode=FDD [ Fram eM ode]

CW2_M appingType=QPSK [ UE5_CW2_M appingType]CW1_M appingType=QPSK [ UE5_CW1_M appingType]

CW2_Dat aPat t er n=PN9CW1_Dat aPat t er n=PN9

UE_RevM ode=Release_8 [ UEs_RevM ode(5) ]UE5_M apper

LTE_A

M I M O M apper

PDCCH_SymsPerSF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_SymsPer SF]Num Of Layer s=2 [ UEs_NumO f Layer s(6) ]

RB_Alloc=0; 0 [ UE6_RB_Alloc]RB_AllocType=St ar t RB + Num RBs [ RB_AllocType]

CyclicPref ix=Norm al [ CyclicPref ix]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]

Num TxAnt s=Tx8 [ Num TxAnt s]Bandwidt h=BW 5 M Hz [ Bandwidt h]Fram eM ode=FDD [ Fram eMode]

CW2_M appingType=Q PSK [ UE6_CW2_M appingType]CW1_M appingType=Q PSK [ UE6_CW1_M appingType]

CW2_Dat aPat t ern=PN9CW1_Dat aPat t ern=PN9

UE_RevM ode=Release_8 [ UEs_RevM ode( 6) ]UE6_Mapper

PM I

in put o u tput

PM I

LTE_A DL

LayMapPrecoder

Pr ecodingM at r ix=Real Ar ray (8x8) UserDef inedPrecoder =YES [ User Def inedPr ecoder (3) ]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]

Num O f Layer s=8 [ UEs_Num Of Layer s(3) ]NumO f CWs=2 [ UEs_Num Of CWs( 3) ]

CDD_M ode=Zero-Delay [ UEs_CDD_Mode( 3) ]MI M O_M ode=Spat ial_M ux [ UEs_M I M O _M ode(3)]

UE_RevMode=1 [ UEs_RevM ode(3) ]UE3_LayM apPr ecoder

PMI

in put o u tput

PMI

LTE_A DL

LayM apPrecoder

UserDef inedPrecoder=NO [ UserDef inedPr ecoder (5) ]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]

CL_Precoding_Enable=NONum Of Layer s=2 [ UEs_NumO f Layer s(5) ]

NumO f CWs=2 [ UEs_NumO f CWs( 5) ]CdBlk_I ndex=0 [ UEs_CdBlk_I ndex( 5) ]

CDD_Mode=Zero- Delay [ UEs_CDD_M ode( 5) ]M I MO _Mode=Spat ial_M ux [ UEs_M I M O _M ode(5)]

UE_RevMode=0 [ UEs_RevM ode(5) ]UE5_LayM apPr ecoder

in put o u tput

PMI

LTE_A DL

LayM apPrecoder

UserDef inedPrecoder=NO [ UserDef inedPr ecoder (6) ]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]

CL_Precoding_Enable=NONum Of Layer s=2 [ UEs_NumO f Layer s(6) ]

NumO f CWs=2 [ UEs_NumO f CWs( 6) ]CdBlk_I ndex=0 [ UEs_CdBlk_I ndex( 6) ]

CDD_Mode=Zero- Delay [ UEs_CDD_M ode( 6) ]M I MO _Mode=Spat ial_M ux [ UEs_M I M O _M ode(6)]

UE_RevMode=0 [ UEs_RevM ode(6) ]UE6_LayM apPr ecoder

L T E _ A _ D L _ V ir t ualAntMapping

T x _ A n tennaI n p u tPorts

Ant M appingM at r ix=Real Ar r ay (1x64) Num O f Layers=8 [ UEs_Num Of Layer s( 3) ]

Num TxAnt s=Tx8 [ Num TxAnt s]UE_RevM ode=1 [ UEs_RevM ode(3) ]

UE3_Vir t ualAnt MappingL T E _ A _ D L _ V ir t ualAntM apping

T x _ A n tennaI n p u tPorts

Ant M appingM at r ix=1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0 [ UE5_Ant M appingM at r ix]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]

NumTxAnt s=Tx8 [ Num TxAnt s]UE_RevMode=0 [ UEs_RevM ode(5) ]

UE5_Vir t ualAnt M apping

L T E _ A _ D L _ V ir t ualAntM apping

T x _ A n tennaI n p u tPorts

Ant M appingM at r ix=1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0 [ UE6_Ant M appingMat r ix]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]

NumTxAnt s=Tx8 [ Num TxAnt s]UE_RevM ode=0 [ UEs_RevMode( 6) ]

UE6_Vir t ualAnt M apping

UE1_Data

HARQ_Bits

frm_TD

frm_FD

UE1_ModSymbols

UE1_ChannelBits

SC_StatusUE1_PMI

LTE_A

DL

Src

LTE_A_DL_Src_1 {LTE_A_DL_Src@LTE Advanced Models}

LTE

ConvCoder

PDCCH_Sym sPerSF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_SymsPerSF]CyclicPref ix=Norm al [ CyclicPr ef ix]

Bandwidt h=BW 5 MHz [ Bandwidt h]Fr am eM ode=FDD [ FrameM ode]

L20 {LTE_ConvCoder @LTE 8. 9 Models}

LTE

BCH Generat or

PHI CH_Ng=Ng 1/ 6 [ PHI CH_Ng]Fr am eI ncr eased=YES

FrameNum=0Bandwidt h=BW 5 M Hz [ Bandwidt h]

BCH_Bit s { LTE_BCH_G en@LTE 8. 9 M odels}

[ ]

Form at =Colum nM ajorNumCols=1

Num Rows=40 [ 24+16]P11 {Pack_M @Dat a Flow M odels}

LTE

PBCH_CRC

BCH_BlockSize=24Num TxAnt s=Tx2

PBCH_CRC

LTE

PBCH_Rat eM at ch

BCH_BlockSize=24CyclicPref ix=Norm al [ CyclicPref ix]

PBCH_Rat eM at ch

LTE

PBCH_Scr am bler

LTE

ConvCoder [ ]

Form at =Colum nM ajorNumCols=1

Num Rows=120 [ 3*( 24+16) ]U1 {Unpack_M @Dat a Flow M odels}

LTE

DL_DCI _G en

UE_n_RNTI =1 [ UE1_n_RNTI ]PDCCH_Com mon_DCI _Form at s=-1; -1; - 1; - 1 [ PDCCH_Com m on_DCI _Form at s]

PDCCH_Com m on_AggreLevel=4 [ PDCCH_Com m on_AggreLevel]PDCCH_UE_DCI _For mat s=0; -1; -1; -1; - 1; - 1 [ PDCCH_UE_DCI _Form at s]

PDCCH_UE_AggreLevel=1 [ PDCCH_UE_AggreLevel]PHI CH_Ng=Ng 1/ 6 [ PHI CH_Ng]

PDCCH_SymsPerSF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_SymsPerSF]CyclicPref ix=Norm al [ CyclicPref ix]

Bandwidt h=BW 5 M Hz [ Bandwidt h]Fram eM ode=FDD [ Fram eMode]

DCI {LTE_DL_DCI _G en@LTE 8. 9 M odels}

LTE

DL_DCI _CRC

DisplayPor t Rat es=NOPHI CH_Ng=Ng 1/ 6 [ PHI CH_Ng]UE_TxAnt Select ion=Non_conf ig

PDCCH_Sym sPerSF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPerSF]CyclicPr ef ix=Norm al [ CyclicPr ef ix]

Num TxAnt s=Tx2 [ CRS_Num Ant Por t s]Bandwidt h=BW 5 M Hz [ Bandwidt h]Fr am eM ode=FDD [ FrameM ode]

L19 { LTE_DL_DCI _CRC@LTE 8. 9 M odels}

LTE

DL_DCI _Rat eM at ch

DisplayPor t Rat es=NOBandwidt h=BW 5 M Hz [ Bandwidt h]Fram eMode=FDD [ Fr am eM ode]

L21 {LTE_DL_DCI _Rat eM at ch@LTE 8. 9 Models}

LTE

PDCCH_M ux

DisplayPor t Rat es=NOCyclicPr ef ix=Norm al [ CyclicPr ef ix]

Bandwidt h=BW 5 M Hz [ Bandwidt h]Fr am eM ode=FDD [ Fram eM ode]

L22 { LTE_PDCCH_Mux@LTE 8. 9 M odels}

D a taIn

D a taO ut

M odSym

LTE

PDCCH

Scrambler

PHI CH_Ng=Ng 1/ 6 [ PHI CH_Ng]PDCCH_Sym sPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPerSF]

CellI D_G r oup=0 [ CellI D_G r oup]CellI D_Sect or =0 [ CellI D_Sect or ]CyclicPr ef ix=Nor mal [ CyclicPref ix]

Num TxAnt s=Tx2 [ CRS_Num Ant Por t s]Bandwidt h=BW 5 M Hz [ Bandwidt h]Fram eMode=FDD [ Fr am eM ode]

L30 { LTE_PDCCH_Scram bler@LTE 8. 9 M odels}

LTE PDCCH

I nt er leaver

PHI CH_Ng=Ng 1/ 6 [ PHI CH_Ng]PDCCH_Sym sPerSF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPerSF]

CellI D_G roup=0 [ CellI D_G roup]CellI D_Sect or =0 [ CellI D_Sect or ]CyclicPr ef ix=Norm al [ CyclicPr ef ix]

Num TxAnt s=Tx2 [ CRS_Num Ant Por t s]Bandwidt h=BW 5 M Hz [ Bandwidt h]Fr am eM ode=FDD [ Fram eM ode]

L5

D a taIn

Qm

D a taO ut

LTE

M apper

Qm

M appingType=0; 0; 0; 0; 0; 0; 0; 0; 0; 0 [ [ 0, 0, 0, 0, 0, 0, 0, 0,0,0]]UE1_CW2_M apper

Bus=YESDat a Type=I nt eger

PO RT=7UE1_HARQ _Bit s {DATAPO RT}

D a taIn

Qm

D a taOut

LTE

Mapper

Qm

M appingType=0; 0; 0; 0; 0; 0; 0; 0; 0; 0 [ [ 0, 0, 0, 0, 0, 0, 0, 0,0,0]]UE1_CW1_M apper

Bus=YESDat a Type=I nt eger

PO RT=1UE1_Dat a { DATAPORT}

Bus=NODat a Type=I nt eger M at r ix

PO RT=8UE1_PM I {DATAPO RT}

Bus=YESDat a Type=Complex

PO RT=3f rm _FD {DATAPO RT}

Bus=YESDat a Type=I nt eger

PO RT=6SC_St at us {DATAPO RT}

Bus=YESDat a Type=I nt eger M at r ix

PO RT=5UE1_ChannelBit s {DATAPO RT}

Bus=YESDat a Type=Com plex Mat r ix

PO RT=4UE1_M odSym bols { DATAPORT}

Bus=YESDat a Type=Com plex

PO RT=2f rm _TD { DATAPORT}

LTE_A

DL_M uxSlot

Num TxAnt s=Tx8 [ Num TxAnt s]CyclicPref ix=Norm al [ CyclicPr ef ix]

O versam plingO pt ion=Rat io 2 [ Pr e_O versam p]Bandwidt h=BW 5 MHz [ Bandwidt h]

L6 {LTE_A_DL_M uxSlot @LTE Advanced M odels}

LTE

SpecShaping

CI _St ar t Pos=-3 [ CI _St ar t Pos]CyclicI nt er val=6 [ CyclicI nt er val]

WindowType=Tukey [ WindowType]Spect r um ShapingType=Tim eWindowing [ Spect r um ShapingType]

Num TxAnt s=Tx8 [ Num TxAnt s]CyclicPr ef ix=Norm al [ CyclicPr ef ix]

O ver sam plingO pt ion=Rat io 2 [ O versam plingO pt ion]Bandwidt h=BW 5 M Hz [ Bandwidt h]

Spect rum Shaper

Multiplexer, OFDM Modulator, Framing and Spectrum Shaping

PDSCHs--->UE1

Physical Signals

L T E _ A _ D L _ V ir t ualAntM apping

T x _ A ntennaI n p u tPorts

Ant M appingMat r ix=1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0 [ Ant M appingM at rix]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]

NumTxAnt s=Tx8 [ Num TxAnt s]UE_RevM ode=0

PDCCH_Vir t ualAnt M apping1

LTE_A

M I M O M apper

PDCCH_Sym sPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPerSF]Num O f Layers=2 [ UEs_Num O f Layers(4) ]

RB_Alloc=0; 0 [ UE4_RB_Alloc]RB_AllocType=St ar t RB + Num RBs [ RB_AllocType]

CyclicPref ix=Nor mal [ CyclicPref ix]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]

Num TxAnt s=Tx8 [ NumTxAnt s]Bandwidt h=BW 5 M Hz [ Bandwidt h]Fram eMode=FDD [ Fr am eM ode]

CW2_M appingType=QPSK [ UE4_CW2_M appingType]CW1_M appingType=QPSK [ UE4_CW1_M appingType]

CW2_Dat aPat t ern=PN9CW1_Dat aPat t ern=PN9

UE_RevM ode=Release_8 [ UEs_RevM ode(4) ]UE4_M apper

LTE_A

M I M O M apper

PDCCH_SymsPerSF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPer SF]Num Of Layer s=8 [ UEs_NumO f Layer s(2) ]

RB_Alloc=0; 0 [ UE2_RB_Alloc]RB_AllocType=St ar t RB + Num RBs [ RB_AllocType]

CyclicPref ix=Norm al [ CyclicPref ix]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]

NumTxAnt s=Tx8 [ Num TxAnt s]Bandwidt h=BW 5 M Hz [ Bandwidt h]FrameM ode=FDD [ Fram eMode]

CW2_M appingType=Q PSK [ UE2_CW2_M appingType]CW1_M appingType=Q PSK [ UE2_CW1_M appingType]

CW2_Dat aPat t ern=PN9CW1_Dat aPat t ern=PN9

UE_RevM ode=Release_10 [ UEs_RevM ode( 2) ]UE2_Mapper

in put o u tput

PMI

LTE DL

LayMapPrecoder

Num TxAnt s=Tx2 [ CRS_Num Ant Por t s]PDCCH_LayM apPrecoder

in put o u tput

PM I

LTE_A DL

LayM apPr ecoder

Pr ecodingM at r ix=Real Ar ray (8x8) UserDef inedPrecoder =YES [ User Def inedPr ecoder (1) ]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]

Num O f Layer s=8 [ UEs_Num Of Layer s(1) ]Num Of CWs=2 [ UEs_Num Of CWs( 1) ]

CDD_M ode=Zero-Delay [ UEs_CDD_Mode( 1) ]MI M O_M ode=Spat ial_M ux [ UEs_M I M O _M ode(1)]

UE_RevMode=1 [ UEs_RevM ode(1) ]UE1_LayM apPr ecoder

in put o u tput

PM I

LTE_A DL

LayM apPrecoder

Pr ecodingM at r ix=Real Ar r ay (8x8) UserDef inedPrecoder =YES [ User Def inedPr ecoder ( 2) ]CRS_NumAnt Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]

Num O f Layers=8 [ UEs_Num Of Layer s( 2) ]Num Of CWs=2 [ UEs_Num O f CWs( 2) ]

CDD_M ode=Zero-Delay [ UEs_CDD_Mode(2) ]M I M O_M ode=Spat ial_Mux [ UEs_M I M O _M ode( 2)]

UE_RevM ode=1 [ UEs_RevM ode(2) ]UE2_LayMapPrecoder

in put o u tput

PMI

LTE_A DL

LayM apPrecoder

UserDef inedPrecoder=NO [ UserDef inedPr ecoder (4) ]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]

CL_Precoding_Enable=NONum Of Layer s=2 [ UEs_NumO f Layer s(4) ]

NumO f CWs=2 [ UEs_NumO f CWs( 4) ]CdBlk_I ndex=0 [ UEs_CdBlk_I ndex( 4) ]

CDD_Mode=Zero- Delay [ UEs_CDD_M ode( 4) ]M I MO _Mode=Spat ial_M ux [ UEs_M I M O _M ode(4)]

UE_RevMode=0 [ UEs_RevM ode(4) ]UE4_LayM apPr ecoder

LTE

PSCH

CellI D Sect or=0 [ CellI D Sect or ]L2

[ ]

NumCols=1Num Rows=72

P2 { Pack_M @Dat a Flow Models}

[ ]

Form at =Colum nM ajorNumCols=1

Num Rows=72P1 { Pack_M @Dat a Flow Models}

LTE

SSCH

CellI D_G roup=0 [ CellI D_G roup]CellI D_Sect or=0 [ CellI D_Sect or ]

L1

PM I

L a y e r _ Symbol M I M O _Symbol

LTE_A

DL_M I M O

Precoder

DM RS2 Precoder

PM I

L a y e r _ Symbol M I M O _Symbol

LTE_A

DL_M I M O

Precoder

Pr ecodingM at r ix=Real Ar r ay (8x8) UserDef inedPrecoder =YES [ User Def inedPr ecoder ( 3) ]

CL_Precoding_Enable=NONum O f Layers=8 [ UEs_Num O f Layer s( 3) ]CDD_M ode=Zero-Delay [ UEs_CDD_Mode(3) ]

M I M O_M ode=Spat ial_Mux [ UEs_M I M O _M ode( 3)]CRS_NumAnt Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]

UE_RevM ode=1 [ UEs_RevM ode(3) ]DM RS3_Precoder

PM I

L a y e r _ Symbol M I M O_Symbol

LTE_A

DL_M I M O

Pr ecoder

UserDef inedPrecoder =NO [ User Def inedPr ecoder (6) ]CL_Precoding_Enable=NO

Num O f Layer s=2 [ UEs_Num Of Layer s(6) ]CdBlk_I ndex=0 [ UEs_CdBlk_I ndex( 6) ]

CDD_M ode=Zero-Delay [ UEs_CDD_Mode( 6) ]MI M O_M ode=Spat ial_M ux [ UEs_M I M O _M ode(6)]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]

UE_RevMode=0 [ UEs_RevM ode(6) ]Disabled: O PEN

DM RS6_Precoder

PM I

L a y e r _ Symbol M I M O_Symbol

LTE_A

DL_M I M O

Pr ecoder

DM RS5 Precoder

NumTxAnt s=Tx8 [ Num TxAnt s]O versamplingOpt ion=Rat io 2 [ Pre_O versam p]

Bandwidt h=BW 5 M Hz [ Bandwidt h]LTE_A_DL_OFDM _M odulat or

L T E _ A _ D L _ V ir t ualAntMapping

T x _ A n tennaI n p u tPorts

DM RS2 Vir t ualAnt M apping

L T E _ A _ D L _ V ir t ualAntMapping

T x _ A n tennaI n p u tPorts

Ant M appingM at r ix=Real Ar r ay (1x64) Num O f Layers=8 [ UEs_Num Of Layer s( 3) ]

Num TxAnt s=Tx8 [ Num TxAnt s]UE_RevM ode=1 [ UEs_RevM ode(3) ]

DM RS3_Vir t ualAnt M apping

L T E _ A _ D L _ V ir t ualAntMapping

T x _ A n tennaI n p u tPorts

Ant M appingM at r ix=1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0 [ UE6_Ant M appingM at r ix]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]

Num TxAnt s=Tx8 [ Num TxAnt s]UE_RevMode=0 [ UEs_RevM ode(6) ]

Disabled: O PENDMRS6_Vir t ualAnt M apping

L T E _ A _ D L _ V ir t ualAntMapping

T x _ A n tennaI n p u tPorts

DMRS5 Vir t ualAnt M apping

L T E _ A _ D L _ V ir t ualAntMapping

T x _ A n tennaI n p u tPorts

Ant M appingM at r ix=Real Ar r ay (1x64) Num O f Layers=8 [ UEs_Num Of Layer s( 1) ]

Num TxAnt s=Tx8 [ Num TxAnt s]UE_RevM ode=1 [ UEs_RevM ode(1) ]

UE1_Vir t ualAnt Mapping

L T E _ A _ D L _ V ir t ualAntMapping

T x _ A n tennaI n p u tPorts

Ant M appingM at r ix=Real Ar r ay (1x64) Num O f Layers=8 [ UEs_Num O f Layers( 2) ]

Num TxAnt s=Tx8 [ Num TxAnt s]UE_RevM ode=1 [ UEs_RevM ode( 2) ]

UE2_Vir t ualAnt M apping

L T E _ A _ D L _ V ir t ualAntMapping

T x _ A n tennaI n p u tPorts

Ant M appingM at r ix=1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0 [ UE4_Ant M appingM at r ix]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]

Num TxAnt s=Tx8 [ Num TxAnt s]UE_RevMode=0 [ UEs_RevM ode(4) ]

UE4_Vir t ualAnt M apping

LTE_A

DL DM RS

Bandwidt h=BW 5 MHz [ Bandwidt h]Fram eM ode=FDD [ Fram eMode]

DM RS2

LTE_A

DL DM RS

DisplayPor t Rat es=NODM RS_O O C=Real Ar ray (8x4)

User Def inedO O C=YES [ UserDef inedO O C]n_SCI D=0 [ UE3_n_SCI D]

Num Of Layer s=8 [ UEs_Num Of Layer s(3) ]RB_Alloc=0; 0 [ UE3_RB_Alloc]

RB_AllocType=St ar t RB + Num RBs [ RB_AllocType]CellI D_G roup=0 [ CellI D_G roup]CellI D_Sect or=0 [ CellI D_Sect or ]CyclicPref ix=Norm al [ CyclicPref ix]

Bandwidt h=BW 5 MHz [ Bandwidt h]Fram eM ode=FDD [ Fram eMode]

DM RS3

LTE_A

DL DM RS

DisplayPor t Rat es=NODM RS_O OC=Real Ar ray (8x4)

UserDef inedO O C=YES [ UserDef inedOO C]n_SCI D=0 [ UE6_n_SCI D]

Num O f Layers=2 [ UEs_Num O f Layers( 6) ]RB_Alloc=0; 0 [ UE6_RB_Alloc]

RB_AllocType=St ar t RB + Num RBs [ RB_AllocType]CellI D_G r oup=0 [ CellI D_G roup]CellI D_Sect or =0 [ CellI D_Sect or ]CyclicPr ef ix=Nor mal [ CyclicPr ef ix]

Bandwidt h=BW 5 M Hz [ Bandwidt h]Fr am eM ode=FDD [ Fr am eM ode]

Disabled: O PENDM RS6

LTE_A

DL DM RS

Fr am eM ode=FDD [ Fr am eM ode]Disabled: O PEN

DM RS5

Range check Display messages

LTE_A DL Sr c

RangeCheck

LTE_DL_M I M O _4Ant _Sr c_RangeCheck

D a taIn

H A R Q _ Bits

D a taOut

Qm

LTE_ADL

ChannelCoder

MI MO _Mode=Spat ial_M ux [ UEs_M I M O _M ode(1)]RB_AllocType=St ar t RB + Num RBs [ RB_AllocType]

ChBit _Conf ig=REs per subf ram eq=1

RV_Sequence=0; 1; 2; 3 [ UE1_RV_Sequence]UE_Cat egory=Cat egor y 1 [ UE1_Cat egor y]

NumO f Layers=4 [ UE1_CW2_NumO f Layer s]DM RS_Num Ant Por t s=8 [ UEs_Num Of Layer s( 1) ]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]

M appingType=0; 0; 0; 0; 0; 0; 0; 0; 0; 0 [ UE1_CW2_M appingType]Payload=2555; 2555; 2555; 2555; 2555; 2555; 2555; 25. . . [ UE1_CW2_Payload]

Payload_Conf ig=Tr anspor t block size [ UE1_Conf ig]HARQ _Enable=NO [ UE1_HARQ _Enable]

UE_RevM ode=Release_10 [ UEs_RevM ode( 1) ]UE1_CW2_ChannelCoder

D a taIn

H A R Q _ Bits

D a taOut

Qm

LTE_ADL

ChannelCoder

M I M O _M ode=Spat ial_M ux [ UEs_M I MO _M ode( 1)]RB_AllocType=St ar t RB + Num RBs [ RB_AllocType]

ChBit _Conf ig=REs per subf r am eq=0

RV_Sequence=0; 1; 2; 3 [ UE1_RV_Sequence]UE_Cat egory=Cat egory 1 [ UE1_Cat egory]

Num Of Layer s=4 [ UE1_CW1_Num O f Layers]DM RS_Num Ant Por t s=8 [ UEs_Num O f Layers(1) ]CRS_NumAnt Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]

M appingType=0; 0; 0; 0; 0; 0; 0; 0; 0; 0 [ UE1_CW1_M appingType]Payload=2555; 2555; 2555; 2555; 2555; 2555; 2555; 25. . . [ UE1_CW1_Payload]

Payload_Conf ig=Transpor t block size [ UE1_Conf ig]n_RNTI =1 [ UE1_n_RNTI ]

HARQ _Enable=NO [ UE1_HARQ_Enable]UE_RevM ode=Release_10 [ UEs_RevM ode(1) ]

UE1_CW1_ChannelCoder

P ilo ts

P S CH

S S CH

P B CH

P C F ICH

P H I CH

P D C CH

D a t a _UE6

D a t a _UE5

D a t a _UE4

D a t a _UE3

D a t a _UE2

D a t a _UE1

D a taOut

S t dOut

S C _ S tatus

D M R S _UE1

D M R S _UE2

D M R S _UE3

D M R S _UE6

C S I _RS

D M R S _UE4

D M R S _UE5

LTE_A

DL_M uxO FDM Sym

L3 {LTE_A_DL_MuxO FDMSym @LTE Advanced M odels}

PDCCH Rb=0 [ PDCCH Rb]PDCCH_Ra=0 [ PDCCH_Ra]PBCH_Rb=0 [ PBCH_Rb]PBCH_Ra=0 [ PBCH_Ra]

PHI CH_Rb=0 [ PHI CH_Rb]PHI CH_Ra=0 [ PHI CH_Ra]

PCFI CH_Rb=0 [ PCFI CH_Rb]RS_EPRE=-25 [ RS_EPRE]

PHI CH_Ng=Ng 1/ 6 [ PHI CH_Ng]PHI CH_Durat ion=Norm al_Durat ion [ PHI CH_Dur at ion]

PDCCH_Sym sPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPer SF]UE6_RB_Alloc=0; 0 [ UE6_RB_Alloc]UE5_RB_Alloc=0; 0 [ UE5_RB_Alloc]UE4_RB_Alloc=0; 0 [ UE4_RB_Alloc]UE3_RB_Alloc=0; 0 [ UE3_RB_Alloc]UE2_RB_Alloc=0; 0 [ UE2_RB_Alloc]UE1_RB_Alloc=0; 8 [ UE1_RB_Alloc]

RB_AllocType=St ar t RB + Num RBs [ RB_AllocType]SS_Per TxAnt =NO [ SS_PerTxAnt ]

RB_MappingType=Localized [ RB_M appingType]UEs_Num O f Layers=8; 8; 8; 2; 2; 2 [ UEs_Num Of Layer s]UEs_M I M O _M ode=0; 0; 0; 0; 0; 0 [ UEs_MI M O_Mode]

UEs_RevM ode=1; 1; 1; 0; 0; 0 [ UEs_RevM ode]CellI D_Gr oup=0 [ CellI D_Gr oup]CellI D_Sect or=0 [ CellI D_Sect or ]CyclicPref ix=Nor m al [ CyclicPref ix]

CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]NumTxAnt s=Tx8 [ Num TxAnt s]

Bandwidt h=BW 5 M Hz [ Bandwidt h]FrameMode=FDD [ Fr am eM ode]

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

LTE

DL_Pilot

DisplayPor t Rat es=NOCellI D_G roup=0 [ CellI D_G roup]CellI D_Sect or=0 [ CellI D_Sect or ]CyclicPref ix=Norm al [ CyclicPref ix]

NumTxAnt s=Tx2 [ CRS_Num Ant Por t s]Bandwidt h=BW 5 M Hz [ Bandwidt h]

Ref erenceSymbol

Ce _Sect o 0 [ Ce _Sect o ]Form at =Colum nM ajor

u Cos

PM I

L a y e r _ Symbol M I M O _Symbol

LTE_A

DL_M I M O

Precoder

Pr ecodingM at r ix=Real Ar r ay (8x8) UserDef inedPrecoder =YES [ User Def inedPr ecoder ( 1) ]

CL_Precoding_Enable=NONum O f Layers=8 [ UEs_Num O f Layer s( 1) ]CDD_M ode=Zero-Delay [ UEs_CDD_Mode(1) ]

M I M O_M ode=Spat ial_Mux [ UEs_M I M O _M ode( 1)]CRS_NumAnt Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]

UE_RevM ode=1 [ UEs_RevM ode(1) ]DM RS1_Precoder

Pr ecodingM at r ix=Real Ar r ay (8x8) UserDef inedPrecoder =YES [ User Def inedPr ecoder ( 2) ]

CL_Precoding_Enable=NONum O f Layers=8 [ UEs_Num O f Layer s( 2) ]CDD_M ode=Zero-Delay [ UEs_CDD_Mode(2) ]

M I M O_M ode=Spat ial_Mux [ UEs_M I M O _M ode( 2)]CRS_NumAnt Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]

UE_RevM ode=1 [ UEs_RevM ode(2) ]S _ ecode

UserDef inedPrecoder =NO [ User Def inedPr ecoder (5) ]CL_Precoding_Enable=NO

Num O f Layer s=2 [ UEs_Num Of Layer s(5) ]CdBlk_I ndex=0 [ UEs_CdBlk_I ndex( 5) ]

CDD_M ode=Zero-Delay [ UEs_CDD_Mode( 5) ]MI M O_M ode=Spat ial_M ux [ UEs_M I M O _M ode(5)]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]

UE_RevMode=0 [ UEs_RevM ode(5) ]Disabled: O PEN

S5_ ecode

PM I

L a y e r _ Symbol M I M O_Symbol

LTE_A

DL_M I M O

Pr ecoder

UserDef inedPrecoder =NO [ User Def inedPr ecoder (4) ]CL_Precoding_Enable=NO

Num O f Layer s=2 [ UEs_Num Of Layer s(4) ]CdBlk_I ndex=0 [ UEs_CdBlk_I ndex( 4) ]

CDD_M ode=Zero-Delay [ UEs_CDD_Mode( 4) ]MI M O_M ode=Spat ial_M ux [ UEs_M I M O _M ode(4)]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]

UE_RevMode=0 [ UEs_RevM ode(4) ]Disabled: O PEN

DM RS4_Precoder

L T E _ A _ D L _ V ir t ualAntMapping

T x _ A n tennaI n p u tPorts

Ant M appingM at r ix=Real Ar r ay (1x64) Num O f Layers=8 [ UEs_Num Of Layer s( 1) ]

Num TxAnt s=Tx8 [ Num TxAnt s]UE_RevM ode=1 [ UEs_RevM ode(1) ]

DM RS1_Vir t ualAnt M apping

Ant M appingM at r ix=Real Ar r ay (1x64) Num O f Layers=8 [ UEs_Num Of Layer s( 2) ]

Num TxAnt s=Tx8 [ Num TxAnt s]UE_RevM ode=1 [ UEs_RevM ode(2) ]

S _ t ua t app g

Ant M appingM at r ix=1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0 [ UE5_Ant M appingM at r ix]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]

Num TxAnt s=Tx8 [ Num TxAnt s]UE_RevMode=0 [ UEs_RevM ode(5) ]

Disabled: O PENS5_ t ua t app g

L T E _ A _ D L _ V ir t ualAntMapping

T x _ A n tennaI n p u tPorts

Ant M appingM at r ix=1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0 [ UE4_Ant M appingM at r ix]CRS_Num Ant Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]

Num TxAnt s=Tx8 [ Num TxAnt s]UE_RevMode=0 [ UEs_RevM ode(4) ]

Disabled: O PENDMRS4_Vir t ualAnt M apping

LTE_A

DL DM RS

DisplayPor t Rat es=NODM RS_O O C=Real Ar ray (8x4)

User Def inedO O C=YES [ UserDef inedO O C]n_SCI D=0 [ UE1_n_SCI D]

Num Of Layer s=8 [ UEs_Num Of Layer s(1) ]RB_Alloc=0; 8 [ UE1_RB_Alloc]

RB_AllocType=St ar t RB + Num RBs [ RB_AllocType]CellI D_G roup=0 [ CellI D_G roup]CellI D_Sect or=0 [ CellI D_Sect or ]CyclicPref ix=Norm al [ CyclicPref ix]

Bandwidt h=BW 5 MHz [ Bandwidt h]Fram eM ode=FDD [ Fram eMode]

DM RS1

DisplayPor t Rat es=NODM RS_O O C=Real Ar ray (8x4)

User Def inedO O C=YES [ UserDef inedO O C]n_SCI D=0 [ UE2_n_SCI D]

Num Of Layer s=8 [ UEs_Num Of Layer s(2) ]RB_Alloc=0; 0 [ UE2_RB_Alloc]

RB_AllocType=St ar t RB + Num RBs [ RB_AllocType]CellI D_G roup=0 [ CellI D_G roup]CellI D_Sect or=0 [ CellI D_Sect or ]CyclicPref ix=Norm al [ CyclicPref ix]

DisplayPor t Rat es=NODM RS_O OC=Real Ar ray (8x4)

UserDef inedO O C=YES [ UserDef inedOO C]n_SCI D=0 [ UE5_n_SCI D]

Num O f Layers=2 [ UEs_Num O f Layers( 5) ]RB_Alloc=0; 0 [ UE5_RB_Alloc]

RB_AllocType=St ar t RB + Num RBs [ RB_AllocType]CellI D_G r oup=0 [ CellI D_G roup]CellI D_Sect or =0 [ CellI D_Sect or ]CyclicPr ef ix=Nor mal [ CyclicPr ef ix]

Bandwidt h=BW 5 M Hz [ Bandwidt h]

LTE_A

DL DM RS

DisplayPor t Rat es=NODM RS_O OC=Real Ar ray (8x4)

UserDef inedO O C=YES [ UserDef inedOO C]n_SCI D=0 [ UE4_n_SCI D]

Num O f Layers=2 [ UEs_Num O f Layers( 4) ]RB_Alloc=0; 0 [ UE4_RB_Alloc]

RB_AllocType=St ar t RB + Num RBs [ RB_AllocType]CellI D_G r oup=0 [ CellI D_G roup]CellI D_Sect or =0 [ CellI D_Sect or ]CyclicPr ef ix=Nor mal [ CyclicPr ef ix]

Bandwidt h=BW 5 M Hz [ Bandwidt h]Fr am eM ode=FDD [ Fr am eM ode]

Disabled: O PENDM RS4

Ant M appingMat r ix=1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0 [ Ant M appingM at rix]DisplayPor t Rat es=NO

DM RS_Ra=0; 0; 0; 0; 0; 0 [ DM RS_Ra]SSS_Ra=0 [ SSS_Ra]PSS_Ra=0 [ PSS_Ra]

UEs_Pa=0; 0; 0; 0; 0; 0 [ UEs_Pa]PDSCH_Power Rat io=p_B/ p_A = 1 [ PDSCH_PowerRat io]

CC _ b 0 [ CC _ b]

• Up to 2 codewords in input• Up to 8 layers (antenna ports)

32

Page 17: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

17

Tabbed GUI of the SystemVue LTE-Advanced DL Source

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

33

SystemVue LTE-Advanced Downlink TXMixed allocation of Rel10 and Rel8 RB’s

RB 0-4 allocated for R10 UERB 0-4 allocated for R10 UE

RB 15-24 not allocated to any UERB 15-24 not allocated to any UE

RB 5-14 allocated for R8 UERB 5-14 allocated for R8 UE

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

34

Page 18: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

18

Enhanced Uplink Multiple Access Design and test challenges

• Clustered SC-FDMA increases PAR by a few dB adding to transmitter linearity challenges

• Simultaneous PUCCH and PUSCH also increases PAR• Both feature create multi-carrier signals within the channel

bandwidth• High power narrow PUCCH plus single or clustered SC-FDMA

creates large opportunity for in-channel and adjacent channel spur generation– May require 3 to 4 dB power amp backoff for Rel-8 PA

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

May require 3 to 4 dB power amp backoff for Rel 8 PA– Some scenarios may require 10 dB backoff.

35

Inside the SystemVue LTE-Advanced Uplink Source

HARQ_Bits

DataIn

RI_In

HARQACK_In

CQI_In

Frame

FRM_FD

Data_FD

PUSCH_ModSymbols

SC_Status

PUSCH_ChannelBits

LTE_A

UL

Src

LTE_A_UL_Src_1 {LTE_A_UL_Src@LTE Advanced Models}

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

• Up to 2 codewords in input• Up to 4 layers (antenna ports)• Clustered DFT-S-OFDM

36

Page 19: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

19

Tabbed UI of the SystemVue LTE-Advanced Uplink Source

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

37

SystemVue LTE-Advanced Uplink TX, w/2-layer MIMOClustered SC-FDMA

Cluster 1 PUSCHCluster 1 PUSCH

PUCCHPUCCH

Cluster 2 PUSCHCluster 2 PUSCH

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

CCDF ~ 8dBAt 0.001%CCDF ~ 8dBAt 0.001%

The use of clustered SC-FDMA increases the PAPR above non-clustered SC-FDMA, but not as much as full OFDM which can exceed the PAPR of Gaussian noise

38

Page 20: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

20

• Increased bandwidth of Carrier Aggregation drives PAPR to extreme levels

C t F t R d ti t t i ti l t ff t thi i

Design Challenge #3 – Carrier Aggregation stressing RF

• Crest-Factor Reduction strategies are essential to offset this increase

• Increased RF bandwidth also exposes frequency-dependence and other analog degradations, which crosses multiple CC’s

• Combinations of several factors: Non-contiguous Carrier Aggregation, the multitude of possible RF Bands, and number of MIMO layers make these RF designs a true challenge.

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

g g

• How do you translate real RF limitations back up to system-level performance? Can you correlate PHY simulations with measurements?

39

Using SystemVue to make LTE-Advanced CA signalsScenario number

Deployment scenarioTransmission BWs of LTE‐A carriers

# of LTE‐A component carriersBands for LTE‐A 

carriersDuplex modes

1Single‐band contiguous spec. alloc. @ 3.5GHz band for FDD

UL: 40 MHz

DL: 80 MHz

UL: Contiguous 2x20 MHz CCsDL: Contiguous 4x20 MHz CCs

3.5 GHz band FDD

2Single‐band contiguous  spec. alloc. @ Band 40 for TDD

100 MHz Contiguous 5x20 MHz CCsBand 40 (2.3 GHz)

TDD

4Single‐band, non‐contiguous spec. alloc. @ 3.5GHz band for FDD

UL: 40 MHz

DL: 80 MHz

UL: Non‐contiguous 1x20 + 1x20 MHz CCsDL: Non‐contiguous 2x20 + 2x20 MHz CCs

3.5 GHz band FDD

Re

Im1 1 0 1 0

1 1 0 1 0

UE1_Dat a

HARQ _Bit s

f r m _TD

f r m _FD

UE1_M odSym bols

UE1_ChannelBit s

SC_St at usUE1_PM I

LTE_A

DL

Src

UEs_n_SCID=0;0;0;0;0;0 [[0, 0, 0, 0, 0, 0]]UserDefinedAntMappingMatrix=NO

LTE_A_DL_Src_2

CCDF

Stop=10msStart=0s

CCDF_CA

CCDF

Stop=10msStart=0sWoCA

ModOUT

QUADOUT

FreqPhas eQ

IAm p

Re

Im

ModOUT

QUADOUT

FreqPhas eQ

IAm p

1 1 0 1 0

1 1 0 1 0

UE1_Dat a

HARQ _Bit s

f r m _TD

f r m _FD

UE1_M odSym bols

UE1_ChannelBit s

SC_St at usUE1_PM I

LTE_A

DL

Src

UEs_n_SCID=0;0;0;0;0;0 [[0, 0, 0, 0, 0, 0]]UserDefinedAntMappingMatrix=NO

LTE_A_DL_Src_1

20 MHz CCs

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

Env

FcChange

Spect rum Anal yzer

Re

Im1 1 0 1 0

1 1 0 1 0

UE1_Dat a

HARQ _Bit s

f r m _TD

f r m _FD

UE1_M odSym bols

UE1_ChannelBit s

SC_St at usUE1_PM I

LTE_A

DL

Src

UEs_n_SCID=0;0;0;0;0;0 [[0, 0, 0, 0, 0, 0]]UserDefinedAntMappingMatrix=NO

LTE_A_DL_Src_4

ModOUT

QUADOUT

FreqPhas eQ

IAm p

Re

Im1 1 0 1 0

1 1 0 1 0

UE1_Dat a

HARQ _Bit s

f r m _TD

f r m _FD

UE1_M odSym bols

UE1_ChannelBit s

SC_St at usUE1_PM I

LTE_A

DL

Src

UEs_n_SCID=0;0;0;0;0;0 [[0, 0, 0, 0, 0, 0]]UserDefinedAntMappingMatrix=NO

LTE_A_DL_Src_3

ModOUT

QUADOUT

FreqPhas eQ

IAm p

CCs

40

80 MHz total

Page 21: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

21

FDD and TDD LTE-Advanced Carrier Aggregation (DL)

Scenario 1 FDD DL Scenario 4 FDD DL Scenario 4 FDD UL

Scenario Link Configuration PAPR of single CC,before aggregation

PAPR with CCs, after aggregation

S i 1 FDD DL 4 20 MH CC 8 45 dB 9 98 dB

Scenario 2 TDD DL

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

Scenario 1 FDD DL 4x20 MHz CCs 8.45 dB 9.98 dB

Scenario 2 TDD DL 5x20 MHz CCs 9.17 dB 11.71 dB

Scenario 4 FDD DL 2x20+2x20MHz 8.38 dB 9.58 dB

FDD UL 20 + 20MHz 5.79 dB 6.86 dB

41

Validating early Standards proposals (such as CA)

Early Algorithm validationSoftware defined

Leverage a system/algorithm tool for early architecture “reality check”“How far away is my existing design?” “Can I fix it cheaply in software?”

Early Algorithm validationEarly RF architecture validationTrusted 3rd party IP reference

Software-definedinstruments help with emerging standards

support

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

42

Page 22: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

22

• Models/corrects for PA nonlinearities and memory effects

• Works with test equipment

Digital Pre-Distortion (DPD)

6C-GSMMemory Effects

• Works with test equipment,and RF circuit co-simulation

• Achieves 15-20dB for 20MHz LTE; now being evaluated for LTE-A

• Quickly assesses the

LTE

LTE-A

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

“correctability” of a PA

• Can model the “dirty” PAfor inclusion in Layer 1 link-level architecture studies

43

Digital Pre-Distortion (DPD)

Additional DPD considerations• Wizard-based or manual UI

• Built-in signal generation

• LTE/LTE-A Crest-Factor Reduction

• Iterative model extraction, convergence

• Built-in links to calibrated test equip, AWGs, up/down converters, digitizers

• Memory Effect PA model based on measurements

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

Additional capabilities for the DPD Modeler• Modeling & Code Generation – Develop & deploy your own algorithms

• Scriptable, with external API links

• Encapsulate a methodology, create a custom UI

44

Page 23: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

23

DPD of LTE-Advanced, using M9330A/M9392A 2x20MHz + 2x20MHz non-contiguous CCs, (100MHz signal BW)

For BW 140-250 MHz, Agilent M9392A is available

- 12bits ADC- up to 250MHz bandwidth

over 2 5GHz- over 2.5GHz - may require wideband AWG

For BW < 140 MHz: Agilent PXA is recommended

- 14bits ADC- can reach down to -100dBm- greater DPD improvements

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

45

Sampling rate=245.76MHz

Simulation vs. Measurement DPD Extraction Approaches

SIMULATION-BASED DPD(predictive)

• ADS & GoldenGate Circuits as simulated RF DUTs- Complex loading, memory FX, dynamic behaviors

• NVNA X-parameter measurement model,- Great for smaller solid-state devicesCO-SIM, MODELS

CO-SIM, MODELS

ADS

GG

External Trigger

89600VSA

89600VSA

M9392A PXI VSA (>140MHz)or N9030A PXA (<140 MHz)

X-parametersX-parameters

RF DUTN5241,2 PNA-X

MEASUREMENT-BASED DPD

CO SIM, MODELS

MODEL

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

46

Attenuator N5182 MXG

or E8257D PSGas external modulatorM9330A AWG if > 100 MHz

I,Q RF

RF DUT

Page 24: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

24

• MIMO “multiplicity” is adding to the verification effort; Do 8x4 and 8x8 provide the performance for an ROI?

• Virtual techniques (Agilent MIMO OTA approach and simulation links

Design Challenge #4 – MIMO and Channel considerations

Virtual techniques (Agilent MIMO OTA approach, and simulation links from bottom-up EDA flows) can bridge gaps

• A surprising level of accuracy is attainable at the algorithm/architecture stage of a design

• Comparable algorithms can be used in both simulation and at-speed hardware faders; this symmetry can ease the transition to verification

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

47

LTE-Advanced Channel Modelling in SystemVuePredictive, simulation-based fading, from 3DEM analyses

from Agilent EMPro simulations

PHYSICAL ANTENNA PATTERNS

FILES W1715 MIMO CHANNEL MODEL

LTEAdvance_Channel

from Anechoic measurements

antenna pattern file 1

antenna pattern file 2

. . .

MSVelocity=5.4e-3 [MsVelocity]RxAntennaPatternType=UserDefine3D

ChannelLinkDirection=DownlinkSampleRate=15.36e+6Hz [SamplingRate]

CarrierFrequency=2e+9Hz [FCarrier]LTEAdvanceScenarioType=InH

L2 {LTEAdvance_Channel@MIMO Channel Models}

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

antenna pattern file N

48

Page 25: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

25

LTE-Advanced Channel Modelling in SystemVue

Antenna Patterns, loaded by human Throughput % vs. array rotation angle(with/without human)

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

49

SystemVue 2x2 MIMO Downlink ThroughputExperimental & Simulated results vs. Angle-of-Arrival

0.98

1

1.02

2x2 LTE-A Throughput %

It is possible to get early, realistic system-level results for MIMO

0 50 100 150 200 250 300 3500.84

0.86

0.88

0.9

0.92

0.94

0.96

Thro

ughp

ut F

acto

r

Experiment ResultsSimulation Results

Incorporate preliminary designs for - Baseband PHY, and user IP- Industrial design & Antenna placement- RF transceivers (pre-tapeout)- Interference, and signaling environment

Challenge: Simulation speed, and amount of actual coverage testing

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

AoA in degree

Transition from Simulations to Test

DUT

50

Page 26: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

26

Verification dimensionality expanding vs.– BB PHY operating modes of LTE-Advanced, LTE, 3G, WLAN, MIMO– RF Spectral allocations/bands, and analog control settings– Semiconductor processes battery and environmental conditions

Design Challenge #5 – Verification increasing dramatically

Semiconductor processes, battery, and environmental conditions

Scripting, regressions, IP exchange, and testbenches across domains

– RF models have been simplistic in Baseband in order to be fast

– Baseband Algorithms are dumbed down to static modes for CW RF– no frequency response, no memory effects, noise, or dynamic phenomena

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

The next generation of tools are addressing these challenges

51

Fast Circuit Envelope (FCE) Verification Modeling

• FCE behavioral model is exported from RFIC circuit tools

• Runs native at the system-level in

1000’s of analog transistors

• Runs native at the system-level in seconds, without needing EDA licenses

• Accounts for– Power-dependence– Frequency-dependence– Nonlinear memory effects– Frequency translation

FastCircuitEnvelopeFastCircuitEnvelope

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

Frequency translation– ZeroIF/DC and RF carriers– Multiple I/O ports– Internal nodes

File='SIM_PA_2p505GHz_m7dBm_level1_ampaccu... PA {FastCircuitEnvelope@Data Flow Models}

File='SIM_PA_2p505GHz_m7dBm_level1_ampaccu... PA {FastCircuitEnvelope@Data Flow Models}

52

Page 27: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

27

Fast Circuit Envelope (FCE) Verification ModelingExample: FCE model used in an LTE Uplink test

Coded LTE UL5 MHz sourceS t V W1910/W1918 lib

1 1 0 1 0

DataPattern=PN9B3 {DataPattern@Data Flow Models}

1 1 0 1 0

DataPattern=PN9B2 {DataPattern@Data Flow Models}

1 1 0 1 0

HARQ_Bits

DataIn

RI_In

HARQACK_In

CQI_In

Frame

FRM_FD

Data_FD

PUSCH_ModSymbols

SC_Status

PUSCH_ChannelBits

LTE

UL

Src

CellID Sector=0Cy clicPref ix=Normal

Ov ersamplingOption=Ratio 2 [Ov ersamplingOption]Bandwidth=BW 5 MHz [Bandwidth]

FrameMode=FDDLTE_UL_Src_1 {LTE_UL_Src@LTE 8.9 Models} Re

Im

CxToRect

Adjust input signal magnitude

SampleRate=15.36e+6Hz [SamplingRate]Power=0.01W

Frequency =2.505GHzO1

Manage-Model1. GoldenGate Cosim2. FCE level 1, amplitude accuracy 52. FCE level 3, amplitude accuracy 5, frequency accuracy 12. FCE level 3, amplitude accuracy 5, frequency accuracy 2

FastCircuitEnvelope

File='SIM_PA_2p505GHz_m7dBm_lev el1_ampaccu... PA {FastCircuitEnv elope@Data Flow Models}

ModOUT

QUADOUT

FreqPhaseQ

IAmp

InputTy pe=I/QModulator

VSA_89600_Sink

VSATitle='Simulation outputV1 {VSA_89600_Sink@Data Flow Models}

NomGain = -15 -50 -15

Gain=0.178 [10 (̂NomGain/20)]G1 {Gain@Data Flow Models}

SystemVue W1910/W1918 library

TUNE MODE

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

FrameNum=0n_RNTI=0

CellID_Group=0_

RFIC CMOS PA “FastCircuitEnvelope” model

Exported from GoldenGate

89600 VSA LTE demod

53

SCRIPTABLE ENVIRONMENTSCRIPTABLE PARAMETERS

Reliable system-level performance in seconds.Nominal LTE result (0.4% EVM) LTE result – Compressing PA (20% EVM)

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

Pout = +19.3dBm, ACLR=23dBcCPU time = 3 sec (150k points)

Pout = +10.6dBm, ACLR=37dBcCPU time = 3 sec (150k points)

54

Page 28: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

28

Deepest Insights: Direct circuit envelope co-simulation

LTE FDD Uplink Closed-Loop HARQ Cosimulation with Two GoldenGate Instances

GoldenGate Transmitter Mixer

GoldenGate Receiver LNA

LTE

ThroughputCRC

TBS

StatusUpdatePeriod=1SubframeStop=1 [SubframeStop]

SubframeStart=1L1 {LTE_Throughput@LTE 8.9 Models}

1 1 0 1 0

DataPattern=PN9B2 {DataPattern@Data Flow Models}

1 1 0 1 0

DataPattern=PN9B1 {DataPattern@Data Flow Models}

HARQ_Bits

CQI_In

SC_Status

PUSCH_Cha nnelBits

LTE FRM _FDHARQ_ BitsTBS

OutputTiming=BeforeInputN=7

D1 {Delay@Data Flow Models}

CLOSED-LOOP LTE UL

Throughput2.625GHz Cosim

Receiver LNA Cosim

1 1 0 1 0

DataPattern=PN9B3 {DataPattern@Data Flow Models}

1 1 0 1 0

DataPattern=PN9B4 {DataPattern@Data Flow Models} For cosim demo purpose:

Attenuate signal to fit the operation range of mixer and LNA

DataIn

RI_In

HARQACK_In

Frame

FRM _FD

Da ta _FD

PUSCH_M od Symbols

UL

Src

RB_Alloc=0;6 [RB_Alloc]RB_AllocType=StartRB + NumRBs [RB_AllocType]

RV_Sequence=0;1;2;3 [[0,1,2,3]]MappingType=1 [MappingType]

Enable64QAM=YESPayload=0.75 [Payload]

Payload_Config=Code rate [Payload_Config]MaxHARQTrans=4

NumHARQ=8HARQ_Enable=YES [HARQ_Enable]

PUCCH_PUSCH=PUSCHShowPUSCH_Parameters=YES

Printf_RB_SF_Alloc=NOHalfCarr ierShift_Enable=YES

CellID_Group=0CellID_Sector=0

CyclicPrefix=Normal [CyclicPrefix]OversamplingOption=Ratio 1 [OversamplingOption]

Bandwidth=BW 1.4 MHz [Bandwidth]FrameMode=FDD [FrameMode]ShowSystemParameters=YES

UL_SrcNoise

Density

NDensity=584.2e-15W [NDensity]NDensityType=Constant noise density

AWGN

Golden GateCosimS Y S TEM_O UTPUT

BB_Q _I n

BB_I _I n

BlockSize=192 [CosimBlockSize]Path='GG_example_mixer

GG_mixer {GoldenGateCosim@Data Flow Models}

GoldenGateCosim

BlockSize=192 [CosimBlockSize]Path='GG_example_LNA

GG_LNA {GoldenGateCosim@Data Flow Models}

DeMod IAmp

FreqPhase

Q

FCarrier=2.625GHzOutputType=I/Q

Demodulator

Re

Im

RectToCx

Frame

UE_ RawBits

PUSCH_ Chan nelBits

RI_Out

HARQACK_ Out

CQI_Out

PUSCH_M odSymbols

PUSCH_ FD

PUCCH_Sym

LTE

ULReceiver

MaxHARQTrans=4NumHARQ=8

HARQ_Enable=YES [HARQ_Enable]PUCCH_PUSCH=PUSCH

ShowPUSCH_Parameters=YESHalfCarr ierShift_Enable=YES

CellID_Group=0CellID_Sector=0

CyclicPrefix=Normal [CyclicPrefix]OversamplingOption=Ratio 1 [OversamplingOption]

Bandwidth=BW 1.4 MHz [Bandwidth]FrameMode=FDD [FrameMode]ShowSystemParameters=YES

UL_Receiver

Re

Im

CxToRectGain=0.05

G1 {Gain@Data Flow Models}

T

SampleRate=1.92e+6Hz [SamplingRate]S1 {SetSampleRate@Data Flow Models}

RFIC environmt(remote Linux)

Upconvert/TX RFIC

RFIC environmt(remote Linux)

Upconvert/TX RFIC

RFIC environmt(remote Linux)

LowNoise Amp RFIC

RFIC environmt(remote Linux)

LowNoise Amp RFIC• Dynamic RF behavior• Standards-compliant

Hi h

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

I,Q RF RF RF

• High accuracy• Directly uses the

design databases (not an indirect model)

55

Other approaches: Native RF System modeling Bringing RF System Architectures up to the PHY-level

From X-parameters

• Dedicated simulator for RF system architecture• Local RF analog effects (e.g. - X-parameters)• Drag &drop the whole RF chain into Dataflow

Abl t d MIMO d Z IF hit t

Drag & DropDataflow modeling “on the fly”

• Able to do MIMO and ZeroIF architecturesTo PHY system

performanceTo RF SystemArchitectures

To PHY-level Systems

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

Page 29: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

29

Agenda

Standards Overview• LTE-Advanced - New Features• LTE-Advanced - Channel Model

Introduction to Agilent SystemVueIntroduction to Agilent SystemVue

Design Challenges• Working algorithmic reference• Flexible early verification & project NRE• Carrier Aggregation & RF stress• MIMO & Channel considerations• Verification increasing

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

• Verification increasing

Conclusion and Q&A

57

System-level tools and LTE-Advanced algorithmic libraryFlexible PHY algorithm reference from Concept to R&D Test

• Accelerate your Physical Layer (PHY) design process

• Save time with a trusted open• Save time with a trusted, open, independent IP reference

• Validate BB & RF integration early

• Streamline verification and NRE

• Fill strategic gaps using simulation

• Interoperate with test equipment, hil th St d d l

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

even while the Standard evolves

• Re-use the same Agilent assets throughout process

58

Page 30: LTE-AdvancedOvercoming Design Challenges for 4G PHY Architectures”

30

LTE-Advanced PHY presents significant new BB and RF design challenges

The EDA tools are also providing significant new capabilities to address these challenges. What was shown today is already available.

Conclusion

Seen today:– “instrument grade” Standards IP reference, usable throughout the design process– Modular top-down ESL design approach across both Baseband and RF domains– High-performance measurement and modeling techniques – Open SW/HW platform, with single-vendor worldwide apps & support

Vi it t i l A il t i t d i d t t d h

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

Visit us at regional Agilent seminar tours and industry trade shows, or on the web at http://www.agilent.com/find/eesof-systemvue-lte-advanced

59

Thanks!

Copyright © 2011 Agilent Technologies

2011 Greater insight.Greater confidence.

60