Dr. C. SarithaDr. C. Saritha

Lecturer in ElectronicsLecturer in Electronics

SSBN Degree & PG CollegeSSBN Degree & PG College

ANANTAPURANANTAPUR

Introduction.Introduction. Characteristics.Characteristics. Resistor Transistor Logic.Resistor Transistor Logic. Diode Transistor Logic.Diode Transistor Logic. Transistor-Transistor Transistor-Transistor

Logic.Logic. Emitter coupled Logic. Emitter coupled Logic.

Fan in Fan in : The number of inputs that the : The number of inputs that the gate can handle properly with out gate can handle properly with out disturbing the output level.disturbing the output level.

Fan out Fan out : The number of inputs that : The number of inputs that can driven simultaneously by the output can driven simultaneously by the output with out disturbing the output level.with out disturbing the output level.

Noise immunity Noise immunity : Noise immunity is the : Noise immunity is the ability of the logic circuit to tolerate the ability of the logic circuit to tolerate the noise voltage.noise voltage.

Noise MarginNoise Margin : The quantative measure : The quantative measure of noise immunity is called noise margin.of noise immunity is called noise margin.

Propagation Delay Propagation Delay : The propagation : The propagation delay of gate is the average transition delay of gate is the average transition delay time for the signal to propagate delay time for the signal to propagate from input to outputfrom input to output

It is measured in nanosecondsIt is measured in nanoseconds

Threshold Voltage Threshold Voltage : The voltage at which : The voltage at which the circuit changes from one state to the circuit changes from one state to another stateanother state

Operating SpeedOperating Speed : The speed of : The speed of operation of the logic gate is the operation of the logic gate is the time that elapses between giving time that elapses between giving input and getting output.input and getting output.

Power Dissipation Power Dissipation : The power : The power dissipation is defined as power dissipation is defined as power needed by the logic circuit.needed by the logic circuit.

RTL is the first logic family which is RTL is the first logic family which is not available in monolithic form.not available in monolithic form.

The basic circuit of the RTL logic The basic circuit of the RTL logic family is the NOR.family is the NOR.

Each input is associated with one Each input is associated with one resistor and one transistor.resistor and one transistor.

The collector of the transistor are The collector of the transistor are tied together at the outputtied together at the output

The voltage levels for the circuit are The voltage levels for the circuit are 0.2v for the low level and from 1 to 0.2v for the low level and from 1 to 3.6v for the high level3.6v for the high level

CIRCUIT DIAGRAM

AA BB Y=A+BY=A+B

00 00 11

00 11 00

11 00 00

11 11 00

WorkingWorking::

If any input is highIf any input is high. The . The

corresponding transistor is driven corresponding transistor is driven into saturation and the output goes into saturation and the output goes low, regardless of the states of the low, regardless of the states of the other transistor.other transistor.

If all inputs are lowIf all inputs are low. Then all . Then all transistor are in cutoff state and the transistor are in cutoff state and the output of the circuit goes high.output of the circuit goes high.

Characteristics :Characteristics :

It has a fan-out of 5.It has a fan-out of 5. Propagation delay is 25 ns.Propagation delay is 25 ns. Power dissipation is 12 mw.Power dissipation is 12 mw. Noise margin for low signal input is Noise margin for low signal input is

0.4 v.0.4 v. Poor noise immunity.Poor noise immunity. Low speed.Low speed.

DTL was first commercial available IC DTL was first commercial available IC logic family in 53/73 series.logic family in 53/73 series.

The basic circuit in the DTL logic is the The basic circuit in the DTL logic is the NAND gate.NAND gate.

Each input associated with one diode.Each input associated with one diode.

The diode and resistor form an AND The diode and resistor form an AND gate.gate.

The transistor services as a NOR gateThe transistor services as a NOR gate

circuit diagramcircuit diagram

AA BB Y=A.BY=A.B

00 00 11

00 11 11

11 00 11

11 11 00

Truth table

working :-working :-

If any input is low:-If any input is low:- The corresponding diode conducts The corresponding diode conducts

current through Vcurrent through Vcccc and resistor into and resistor into the input node.the input node.

The voltage at point p is equal to the The voltage at point p is equal to the input voltage + diode drop.input voltage + diode drop.

This is a insufficient voltage for This is a insufficient voltage for conduction of a transistor.conduction of a transistor.

Since the voltage at point p is 0v Since the voltage at point p is 0v then the transistor is cut off state then the transistor is cut off state and the output is logic 1.and the output is logic 1.

If all inputs are high:-If all inputs are high:-

The transistor is driven into The transistor is driven into saturation region.saturation region.

The voltage at point p is high.The voltage at point p is high.

Hence the output is low.Hence the output is low.

characteristics :-characteristics :-

It has fan-out of 8.It has fan-out of 8. It has high noise immunity. It has high noise immunity. Power dissipation is 12mw.Power dissipation is 12mw. Propagation delay is average 30ns.Propagation delay is average 30ns. Noise margin is about 0.7V.Noise margin is about 0.7V.

It can perform many digital function It can perform many digital function and have achieved the most and have achieved the most popularity.popularity.

TTL IC are given the numerical TTL IC are given the numerical designation as 5400 and 7400 seriesdesignation as 5400 and 7400 series

The basic circuit of TTL with totem The basic circuit of TTL with totem pole output stage is NAND gatepole output stage is NAND gate

TTL uses a multi-miter transistor at TTL uses a multi-miter transistor at the input and is fast saturation logic the input and is fast saturation logic circuit.circuit.

The output transistor Q3 and Q4 form The output transistor Q3 and Q4 form a totem-pole connection.a totem-pole connection.

This extra output stage is known as This extra output stage is known as totem-pole stage because three totem-pole stage because three output components Q3 and Q4 and output components Q3 and Q4 and Diode are stacked on one another.Diode are stacked on one another.

This arrangement will increase the This arrangement will increase the speed the speed of operation and also speed the speed of operation and also increase output current capability.increase output current capability.

The function of diode in this circuit The function of diode in this circuit prevent both Q3 and Q4 being turned prevent both Q3 and Q4 being turned ON simultaneously The function of ON simultaneously The function of diode in this circuit prevent both Q3 diode in this circuit prevent both Q3 and Q4 being turned ON simultaneouslyand Q4 being turned ON simultaneously

Circuit Diagram

AA BB Y=A.BY=A.B

00 00 11

00 11 11

11 00 11

11 11 00

Working:-Working:-

• A=0,B=0;A=1,B=0;A=0,B=1;A=0,B=0;A=1,B=0;A=0,B=1; The emitter base junction of Q1 The emitter base junction of Q1

turns on.turns on.

The collector potential of Q1 falls to The collector potential of Q1 falls to 0v,then Q2 turns off.0v,then Q2 turns off.

Therefore, at point M we have 0volt Therefore, at point M we have 0volt i.e., the base voltage of Q2 is 0volt.i.e., the base voltage of Q2 is 0volt.

So that, Q2 is also turns off.So that, Q2 is also turns off.

But at the same time we have L=+VBut at the same time we have L=+VCCCC, , this voltage is applied on the base of Q4this voltage is applied on the base of Q4

As a result transistor Q3 is turned ON.As a result transistor Q3 is turned ON. Therefore, the output voltage is given by Therefore, the output voltage is given by

VV00=+V=+VCCCC-[Voltage drop -[Voltage drop in in R4+drop in diode ‘D’]R4+drop in diode ‘D’]

A=1,B=1;A=1,B=1; When both input are high then emitter When both input are high then emitter

base junction of transistor Q1 becomes base junction of transistor Q1 becomes reverse bias. Hence Q1 is turned off.reverse bias. Hence Q1 is turned off.

However its collector base junction is However its collector base junction is forward bias, supplying base current to forward bias, supplying base current to the transistor Q2. Hence Q2 turns ON.the transistor Q2. Hence Q2 turns ON.

As a result collector potential of Q2 As a result collector potential of Q2 becomes “0” volts.becomes “0” volts.

Now if L=0volt is applied to the base Now if L=0volt is applied to the base of Q3, it is turns off .of Q3, it is turns off .

At the same time Q4 is turn ON. At the same time Q4 is turn ON. Then its collector potential nearly Then its collector potential nearly equal to 0volts.equal to 0volts.

Hence the output is low or logic o.Hence the output is low or logic o.

characteristics:-characteristics:-

TTL has greater speed than DTL.TTL has greater speed than DTL. Less noise immunity.Less noise immunity. Power dissipation is 10mw.Power dissipation is 10mw. It has fan-in of 6 and fan-out of 10.It has fan-in of 6 and fan-out of 10. Propagation time delay is 5-15nsec.Propagation time delay is 5-15nsec.

ECL is non saturated digital logic ECL is non saturated digital logic family.family.

The output of ECL provides OR The output of ECL provides OR and NOR function.and NOR function.

Each input is connected to the Each input is connected to the base of transistor.base of transistor.

The circuit consists of three parts.The circuit consists of three parts.

1.differential input amplifier.1.differential input amplifier.

2.Internal temperature and voltage 2.Internal temperature and voltage compensated bias network.compensated bias network.

3.emittor follower output. 3.emittor follower output.

The emitter output requires a pull The emitter output requires a pull down resistor for current flow.down resistor for current flow.

In this logic family we consider the In this logic family we consider the logic 0 as -1.6v and logic 1 as -0.8v.logic 0 as -1.6v and logic 1 as -0.8v.

Circuit Diagram

AA BB Y=A+BY=A+B

00 00 11

00 11 00

11 00 00

11 11 00

workingworking:-:-

A=0,B=0;A=0,B=0; If all inputs are at low level(-1.6v),the If all inputs are at low level(-1.6v),the

transistor are turn OFF and Q3 transistor are turn OFF and Q3 conducts .conducts .

Then at point L the potential is 0volts is Then at point L the potential is 0volts is applied to the base of Q5,it is to be turn applied to the base of Q5,it is to be turn OFF.OFF.

So, the output of OR gate is logic ‘o’.So, the output of OR gate is logic ‘o’.

At the same time , the potential at At the same time , the potential at point M= vcc is applied to the base point M= vcc is applied to the base of Q6,it is to be turn ON.of Q6,it is to be turn ON.

So, the output of NOR is at logic 1.So, the output of NOR is at logic 1.

A=0,B=0,A=0,B=1,A=1,B=0;A=0,B=0,A=0,B=1,A=1,B=0; The corresponding transistor is The corresponding transistor is

turned ON and Q3is turned OFF.turned ON and Q3is turned OFF.

Because its voltage needs at least Because its voltage needs at least 0.6v to start conduction on.0.6v to start conduction on.

An input of -0.8v causes the An input of -0.8v causes the transistor to conduct and apply -1.6v transistor to conduct and apply -1.6v on the remaining emitterson the remaining emitters

Therefore,Q3 is cut off. The voltage in Therefore,Q3 is cut off. The voltage in resistor R2 flows into the base of resistor R2 flows into the base of Q5(L=VQ5(L=Vcccc) then Q5 is turned ON.) then Q5 is turned ON.

The output is at logic 1.The output is at logic 1.

At the same time, at point M the At the same time, at point M the voltage is 0v is applied to the base of voltage is 0v is applied to the base of the transistor Q6,it is to be turns off. the transistor Q6,it is to be turns off. So, the NOR output is logic 0.So, the NOR output is logic 0.

CharacteristicsCharacteristics :- :-

Propagation delay is very Propagation delay is very LOW(<1ns)LOW(<1ns)

ECL is fastest logic family.ECL is fastest logic family.

ECL circuit usually operate with –Ve ECL circuit usually operate with –Ve supplies (+Ve terminal is connected supplies (+Ve terminal is connected to ground).to ground).