linear technology linear technology · cover article new ltc®1435 ... hassan malik and jim...

FEBRUARY 1996 VOLUME VI NUMBER 1

continued on page 3

New LTC1435–LTC1439DC/DC ControllersFeature Valueand Performance

by Randy Flatness, Steve Hobrechtand Milton Wilcox

IntroductionThe new LTC1435–LTC1439 multiple-output DC/DC controllers bringunprecedented levels of value to sup-plies for notebook computers andother battery-powered equipment,while eliminating previous perfor-mance barriers. For example, a newAdaptive Power™ output stage allowstwo previously incompatible param-eters, constant frequency operationand good low current efficiency, tocoexist in the same power supply. Asecond breakthrough allows N-chan-nel power MOSFETs to be usedexclusively, while maintaining lowdropout operation previously avail-able only with P-channel MOSFETs.Other innovations include an auxiliarylinear regulator loop, a phase-locked

loop (PLL) to synchronize the oscillatorto an external source, a self-containedpower-on-reset (POR) timer and pro-grammable run delays useful forstaging output voltages.

Excellent system functionalitymeans that 1-, 2-, 3- or even 4-outputpower supplies are easily constructedusing a minimum number of induc-tors. Table 1 illustrates a few of themany possible output combinationsand the magnetics required.

For maximum flexibility, internalresistive feedback dividers are select-able via programming pins for 3.3V,5V and 12V output voltages, or aregulator may be configured with anadjustable output voltage to meet anyprocessor requirement.

snoitanibmocegatlovtuptuoelbissopfoselpmaxE.1elbaT

rebmuNtraP egakcaP segatloVtuptuO *scitengaM

5341CTL OSnip-61 V9–V5.1elbatsujdA L)1(

6341CTL POSQnip-42 V9.2/V3.3 L)1(

7341CTL POSSnip-82 V21/V5 T)1(

8341CTL POSSnip-82 V3.3/V5 L)2(

9341CTL POSSnip-63 V9.2/V3.3/V5 L)2(

V21/V9.2/V3.3/V5 T)1(,L)1(

remrofsnarT=T,rotcudnI=L*

, LTC and LT are registered trademarks of Linear Technology Corporation.Adaptive Power, Burst Mode and C-Load are trademarks of Linear Technology Corporation.

IN THIS ISSUE . . .COVER ARTICLENew LTC®1435–LTC1439 DC/DCControllers Feature Valueand Performance................. 1Randy Flatness, Steve Hobrechtand Milton Wilcox

Editor’s Page....................... 2Richard Markell

LTC in the News .................. 2

DESIGN FEATURESNew 12-Bit ADC Squeezes100ksps from 10mW ........... 7William C. Rempfer and Ringo Lee

The LT®1511 3A BatteryCharger Charges All BatteryTypes, Including Lithium-Ion......................................... 11

Chiawei Liao

LTC1520 High Speed LineReceiver Provides PrecisionPropagation Delay and Skew......................................... 14

Victor Fleury

The LTC1446 and LTC1446L:World’s First Dual 12-Bit DACsin SO-8 Packages .............. 16Hassan Malik and Jim Brubaker

LT1490/LT1491 Over-the-TopDual and Quad MicropowerRail-to-Rail Op Amps ......... 18Jim Coelho-Sousae

LT1512/LT1513 BatteryChargers Operate with InputVoltages Above or Below theBattery Voltage ................. 20Bob Essaff

DESIGN IDEAS ............. 24–35(complete list on page 24)

DESIGN INFORMATIONSimple Resistive SurgeProtection forInterface Circuits .............. 36Bryan Nevins

New Device Cameos ........... 38

LINEAR TECHNOLOGY LINEAR TECHNOLOGY LINEAR TECHNOLOGY

2 Linear Technology Magazine • February 1996

EDITOR'S PAGE

On BreadboardingNew integrated circuits don’t come

easy these days. Marketeers wouldhave you build a new Pentium® Proclass microprocessor in a few months.Never mind the half-million transis-tors that all have to work correctly forthe product to come out right the firsttime.

Simulation may be the way to gowhen faced with one-half million tran-sistors and a year’s time to market,but what about in the analog worldwhere LTC excels? No analog productin this or perhaps even the next cen-tury will have one-tenth the transistorcount of a microprocessor. The semi-conductor world has come to relyheavily on simulations; and, in fact,we at LTC do our share of simula-tions; but, as the photo shows, wealso do our share of breadboarding.

It may be that the mere mention ofbreadboarding shows my age. Whatcould be simpler than building a cir-cuit from discrete transistors, diodes,resistors, chewing gum and pianowire? Once built, the circuit can betested node by node, and after thedesign is proven to work over itsrequired electrical and environmen-tal parameters, it can be put intoproduction.

In the IC design world, the simula-tion is king because breadboarding ishard. Transistors don’t come out of acatalog; instead they are “kit parts”—the types of transistors that can bemade on a particular wafer-fab pro-cess. All capacitors must be smallvalues, since only these are supportedby the IC process; and so forth and soon. The implementation is not easy,but the reward justifies the labors.What is the reward?

The reward is an IC that works thefirst time—or at least the second time.Breadboarding makes you look at thecircuit from a system point of view.Can it be integrated into the system inwhich it is intended to work? Are allthe hooks there? Breadboarding isnot always an option because of theincreased complexity of today’s ICs,but we try to use it whenever we canto complement simulation. Bread-boarding helps us get it right “the firsttime.”

This issue of Linear Technologybegins our sixth year of publication.We have expanded our publishingschedule to four times per year. Wecontinue to ask for feedback from ourreadership. Call, FAX or write to us atthe numbers on the back page.

by Richard Markell

Figure 1. Breadboard of upcoming LTC microprocessor product?

continued on page 22

LTC in the News...The only company in the history ofSilicon Valley to achieve continuoussales growth over 40 consecutivequarters is Linear Technology Corp.In January, LTC announced recordsecond-quarter net sales of more than$96 million, an increase of 55% overthe same quarter of 1995.

“This solid 10-year record vali-dates both the strength of our marketand the effectiveness of our strategyto be a broad-based supplier of highperformance analog circuits,” saidRobert Swanson, president and CEO.“We attained record levels of salesand profits and generated an addi-tional $20 million in cash,” he said.

Shortly before LTC ended its sec-ond fiscal quarter, Forbes magazineagain listed the company on its “HonorRoll” of “The Best Small Companiesin America.” It was the sixth year ina row in which Linear Technologywas included among “only a handfulof companies (that) have what it takesto be a long-term repeater on our 200Best Small Companies in Americalist.” The magazine made specialmention of LTC and observed that a$10,000 investment in Linear sixyears ago would be worth about$170,000 today.

“All chip companies are not cre-ated equal,” said the influential CabotMarket Letter for investors in its De-cember 1, 1995, issue. “LinearTechnology is ... the leader in itsmarket. (The company’s) chips don’tdeal with data. They interact with thereal world to monitor, amplify ortransform continuous analog signalsassociated with real-world phenom-ena like temperature, pressure,weight, position, height, speed orsound.

“That’s diversity in the extreme.In fact, LTC markets over 4,700different products to over 9,000manufacturers worldwide. Industrialapplications use 40% of the firm’soutput, computers 30%, telecom-munications 15%, military 10% andother 5%. International sales ac-count for about half of the total.”

Pentium is a registered trademark of Intel Corporation.

Linear Technology Magazine • February 1996 3

A Brief History of HighEfficiency DC/DC ConversionThe 90% efficiency barrier was de-molished several years ago, at least athigh output currents, by DC/DC con-trollers adapted to drive externalsynchronous power MOSFETs, whichlargely eliminated the catch-diodelosses. However, the efficiency of theseconverters plummeted when the out-put current dropped, because thefixed-gate-charge losses for the largeMOSFETs became an increasing per-centage of the power delivered to theload. Expressed differently, the qui-escent (unloaded) current wasunacceptably high—often over 10mA.

Linear Technology’s LTC1148 fam-ily of DC/DC controllers introducedin late 1992 was the first in the indus-try to extend high efficiency operationover the entire load range required bynotebook computers and other por-table electronics. This breakthroughwas achieved through Burst Mode™operation, which turns both synchro-nous MOSFETs off for increasingperiods as the load current drops. Inthis way, the gate charge losses aremade proportional to the load cur-rent, thus maintaining high efficiency.Along with the gate-charge savingscame an attendant reduction in qui-escent current, to less than 200µA forthe LTC1148.

Burst Mode operation receivedimmediate acceptance and is in usetoday in a wide range of battery-powered electronics. However, theapproach of intermittently operatinglarge power MOSFETs at low outputcurrents carries one drawback: theoperating frequency must inherentlybe variable, and will enter the audiorange at some currents. This draw-back, while not a problem in manyapplications, is becoming an increas-ing concern as communications andmultimedia features are added toportable computers.

The LTC143X family controllers usea constant frequency, current modePWM architecture in which the usercan set the oscillator frequency from50kHz to 400kHz via an external ca-pacitor. But how to break through theconstant frequency/low current effi-ciency barrier?

Adaptive Power Mode—Constant Frequencywithout the Efficiency HitAdaptive Power mode, available in allfamily members except the LTC1435and LTC1438, optimizes efficiencywithout changing frequency by auto-matically switching between the twooutput stages shown in Figure 1. Thefirst stage uses large synchronous N-channel MOSFETs when operating athigh currents, and the second uses asmall (0.5Ω) N-channel MOSFET and

Schottky diode when operating at lowcurrents. The transition point betweenthe two output stages scales with themaximum current, which is set bythe current sense resistor for eachregulator. The large MOSFETs oper-ate above approximately 5% of themaximum output current, whereasthe small MOSFET operates belowthis current level, but at the sameconstant frequency.

Because the low current “baby”MOSFET (available in SOT-23) hasmuch lower gate charge than the largesynchronous MOSFETs, far less effi-ciency loss is incurred as the loadcurrent drops. Eventually, as the loadcurrent is reduced below approxi-mately 1% of the maximum current,the loop begins skipping cycles andthe frequency does begin to decrease.However, it does not enter the audioregion until the load current has falleneven further. This performance comesat little penalty in quiescent current,which, at around 200µA, is nearly aslow as that of the LTC1148.

Burst Mode operation is also pos-sible in all LTC1435–LTC1439controllers for even higher efficien-cies at the expense of more frequencyvariability. To activate Burst Modeoperation, the small MOSFET is sim-ply not installed. When the loadcurrent falls to where both largeMOSFETs are turned off, the outputcapacitor supports the load until theerror amplifier increases the ITH pin

+

SWITCH DRIVE

SWITCH NODE

SYNCHRONOUS MOSFET DRIVERS

HIGH CURRENT

OPERATION

LOW CURRENT

OPERATION

VIN

VOUT

COUTSMALL MOSFET DRIVER

L RSENSE

OUTPUT CURRENT

50

100

90

80

70

60

EFFI

CIEN

CY (%

)

10A1mA 10mA 1A100mA

(1)

(2)

(3)

Figure 1. Adaptive Power output stage automatically switches to efficiency-saving smallMOSFET at low currents, while continuing to operate at a constant frequency.

Figure 2. 10V to 5V conversion efficiencyversus output current for three operatingmodes: 1) forced continuous operation; 2)Adaptive Power mode (constant frequency);and 3) Burst Mode.

LTC1435–LTC1439, continued from page 1

DESIGN FEATURES


voltage to 0.6V, at which point thelarge MOSFETs resume operation.

Whether in Adaptive Power modeor Burst Mode, the large MOSFETscan always be forced into continuousoperation, independent of load cur-rent, by forcing the SFB pin low (moreon this later). Figure 2 gives a com-parison of efficiencies in a 3A regulatorfor the three possible operating modes:forced continuous operation, Adap-tive Power mode and Burst Mode.

Low Dropout withoutP-Channel MOSFETsAn important feature of the LTC1148family is its ability to stay in regula-tion with the input voltage only slightlyabove the output, a condition knownas low dropout. The LTC1148 achievesthis by using a P-channel MOSFETswitch that can operate at up to 100%duty cycle; in other words, it canconnect the output to the input indropout mode. This feature is impor-tant because it allows the maximumenergy to be extracted from low volt-age battery packs such as twolithium-ion cells (5.4V typical end-of-life voltage).

The LTC143X family changes to anall N-channel output stage to accruethe benefits of lower RDS(ON) and lowercost than corresponding P-channelMOSFETs. Driving N-channel MOS-FETs requires the floating high-sidedriver shown in Figure 3; however,

the bootstrap capacitor powering thefloating driver requires periodic re-charging, which can occur only whenthe top MOSFET is turned off and thebottom MOSFET is turned on. In pastN-channel controllers, this rechargeinterval was guaranteed by forcing aminimum off-time during every oscil-lator cycle.

To relieve the duty cycle limitationresulting from minimum off-time con-trol, the LTC1435–LTC1439 detectthe onset of dropout by counting thenumber of oscillator pulses that havepassed without the top MOSFET turn-ing off. Only when the count reaches10 is a minimum off-time forced. Thisextends the duty cycle capability fromaround 90% to 99% while still guar-anteeing that the top MOSFETbootstrap capacitor remains charged.Thus, dropout performance compa-rable to the LTC1148 can be achieved.

Auxiliary OutputVoltages Made EasyThe new LTC143X family of DC/DCcontrollers has also been designedwith many “hooks” to make the addi-tion of extra output voltages easy, ascan be seen from two representativeapplications. The first, shown in Fig-ure 4, is a cost effective LTC1437switcher/linear combination with 5V/3A and 12V/200mA outputs. Themain switcher loop is set to 5V bystrapping the VPROG pin high. Other

output options include 3.3V (VPROGlow) and adjustable (VPROG open).

The 12V output in Figure 4’s cir-cuit is provided by the auxiliary linearregulator operating in conjunctionwith a secondary winding feedbackloop using the SFB pin mentionedearlier. The turns ratio for the trans-former is 1:2.2, resulting in asecondary output voltage of approxi-mately 15V. The secondary resistivedivider causes the SFB pin voltage todrop below the internal 1.19V refer-ence if the secondary output is loadedand the 5V output has little or noload. This forces continuous opera-tion as necessary to guaranteesufficient headroom for the linearregulator to maintain 12V regulationindependent of the 5V load. The aux-iliary output is turned on and off withthe AUX ON pin.

The auxiliary regulator can also beused in an adjustable mode, deter-mined by the voltage on the AUX DRpin. When the AUX DR voltage ishigher than 9.5V, as is the case inFigure 4, the regulator automaticallyconfigures itself for fixed 12V opera-tion using an internal AUX FBresistive divider. When AUX DR isless than 8.5V, the internal divider isremoved and the user can adjust theoutput voltage via an external dividerreferenced to 1.19V. The external aux-iliary regulator PNP pass transistor issized for the desired output current;

+SWITCH

DRIVE

FORCED MINIMUM OFF-TIME

LOW-SIDE DRIVER

BOOTSTRAP CAPACITOR

FLOATING HIGH-SIDE

DRIVER

VOUT

COUT

L RSENSE÷10 COUNTER

CLOCK

RESET

OSCILLATOR

INT VCC VIN

Figure 3. Operation at up to 99% duty cycle is made possible by ÷ 10 counter logic, which ensures low dropout.

DESIGN FEATURES


in this case a SOT-223 device is usedto deliver up to 200mA.

Synchronizable, Triple-Output, Low Dropout SupplyThe LTC1439-based supply shown inFigure 5 is an example of how threelogic supply voltages, 5V, 3.3V and2.9V, can be easily derived using onlytwo simple inductors. The two mainDC/DC controller loops are used tosupply 5V/3A and 3.3V/5.5A. Up to2.5A of the 3.3V output current isthen used to supply a 2.9V outputusing the adjustable capability of theauxiliary linear regulator.

The 2.9V output also illustratesthe use of an external NPN pass tran-sistor with the auxiliary regulator.Because only 0.4V is dropped across

the NPN transistor, 2.9V efficiencyremains in the 85% range. And thanksto the 99% duty cycle capability of theswitcher loops, Figure 5’s supply canmaintain all three output voltages inregulation down to VIN = 5.2V with a2A load on the 5V output.

The phase-locked loops built intothe LTC1437 and LTC1439 offer aconvenient means of synchronizationfor the applications in Figures 4 and5. The internal oscillator is actually avoltage-controlled oscillator (VCO)controlled by the voltage on the PLLLPF pin. When no PLL IN signal ispresent, the PLL LPF goes low, caus-ing the oscillator to run at its minimumfrequency (fMIN = 180kHz with COSC =56pF). Applying a 3.3V or 5V logicsignal of any duty cycle to the PLL IN

pin will cause the oscillator frequencyto lock to the logic signal frequencyand to track it up to a maximum offMAX = 2 × fMIN. A logic signal may alsobe coupled to PLL LPF to effect a 2:1frequency shift, provided that the ini-tial frequency has been set to lessthan 200kHz.

Starting Up in SequencePower supply sequencing upon initialapplication of input power is a criticalissue. This is particularly true in ap-plications where the controllers areleft on continually, which will fre-quently be the case since the quiescentcurrent is very low. The LTC143Xfamily has unique combined run andsoft-start pins and power-on-reset

10k0.01µF

10k

51pF

VIN 28V (MAX)

COSC

PLL IN

VPROG

PLL LPF

RUN/SS

LBO

POR

SFB

ITH

LBI

BG

SENSE+

SW

TGS

TGL

SENSE–

VO SENSE

EXT VCC

AUX FB

AUX DR

BOOSTINT VCC VIN DR VCC

SGND PGND AUX ON

T1 = DALE LPE-8562-A092 *CENTRAL SEMICONDUCTOR

LTC1436

0.1µF

EXT. CLOCK

56pF

510pF

+

IRF7403

IRLML2803

IRF7403

MBRS140

*CMDSH-3

1000pF

2.2µF

0.033Ω

VOUT1 5V/3A

VOUT2 12V/200mA

100µF 10V ×2

+4.7µF 25V

0.1µF

+

+

3.3µF 35V

+

22µF 35V ×20.1µF

100

100

T1MBRS1100

100k

47k

1MEG

ZETEX FZT749

26V

Figure 4. High efficiency, constant-frequency, dual-output supply delivers 3A at 5V and 250mA at 12V.

DESIGN FEATURES


10

VIN 5.2V-25V

BG1

SENSE1+

SW1

BG1

TGS1

TGL1

SENSE1–

EXT VCC

PLL IN

ITH1

PLL LPF

RUN/SS1

COSC

BOOST1

BG2

SENSE2+

SW2

TGS2

TGL2

SENSE2–

VO SENSE2

AUX ON

ITH2

AUX FB

RUN/SS2

AUX DR

BOOST2SFB1 INT VCC VIN VPROG1 VPROG2

LB1 LB0 SGND PGND POR2

+

Si4412

IRLML2803

Si4412

MBRS140

*CMDSH-3

1000pF

0.1µF

1000pF

0.033Ω

100µF 10V ×2

+ 22µF 35V ×2

0.1µF

100

100

10k1000pF

LTC1439

0.1µF

EXT. CLOCK

10µH

220pF

10k0.01µF

56pF

+

Si4410

IRLML2803

Si4410

MBRS140

*CMDSH-3

1000pF

4.7nF

2.2µF

0.02Ω

VOUT2 3.3V/3A

VOUT3 2.9V/2.5A

VOUT1 5V/3A

221k

47k

100

100µF 10V ×2

+330µF 6.3V

0.1µF

+

+

22µF 35V ×2

0.1µF

100

100

10k1000pF

0.05µF

10µH

220pF

51pF

316k

20

ZETEX ZTX849

MMBT2907ALT1

*CENTRAL SEMICONDUCTOR

outputs that greatly ease start-upsequencing and reset issues.

The RUN/SS pins have internal3µA pull-ups whenever VIN is present.An external capacitor to ground ischarged by this current to provideboth a start delay and soft-start char-acteristic. At initial application ofinput power, or following a shutdown,the RUN/SS voltage will be low. Asthe RUN/SS voltage ramps up, theassociated controller remains shutdown until the voltage reaches 1.3V.Thus by using different value capaci-tors for the two RUN/SS pins in anLTC1438 or LTC1439, one controllercan be forced to always start beforethe other.

Once the RUN/SS voltage passes1.3V, the controller starts with theinitial peak inductor current at ap-

proximately one third of its maxi-mum value and ramps up from there,reaching normal operation at 3V. Fig-ure 6 is a photograph showing the3.3V output staged to start 10msbefore the 5V output when power isfirst applied to Figure 5’s circuit.

Power-On ResetMonitor IncludedAn internal regulation monitor iscontinually monitoring the main con-troller output in the LTC1436/LTC1437, and the controller 2 output(3.3V in Figure 5) in the LTC1438/LTC1439. When out of regulation orin shutdown mode, the POR opendrain output pulls low. At start-up,once the output voltage has reached5% of its final value, an internal timeris started, after which the POR pin is

released. The timer is accomplishedby counting 216 oscillator cycles, yield-ing a delay-to-release reset ofapproximately 300ms in a typical ap-plication.

Figure 5. High efficiency, constant-frequency, triple-output logic supply features 200mV dropout.

Figure 6. Start-up of 3.3V and 5V supplies iseasily staged upon initial application of inputpower.

DESIGN FEATURES



New 12-Bit ADC Squeezes100ksps from 10mW by William C. Rempfer

and Ringo LeeUntil now, 12-bit 100ksps ADCs

have needed as much as 100mW to dotheir jobs. That has changed with thenew LTC1274 and LTC1277. Thesecomplete, parallel-output 12-bit ADCssample at 100ksps while drawing only10mW. They have some new featuresthat make them very attractive forapplications in the 100ksps rangeand below:

Complete ADC with referenceand sample-and-hold

10mW power dissipation from 5Vor ±5V supplies

Nap and Sleep power-downmodes

Reference Ready (REFRDY) signalindicating wake-up from Sleepmode

Unipolar/bipolar conversions Separate conversion-start input High-Z analog inputs can be

MUXed or AC coupled 12-bit or 2-byte parallel I/O 3V logic supply interface

(LTC1277)This article will describe the new

devices and show how they can beused to save power, improve perfor-mance and simplify the design of newsystems.

10mW, 100ksps and MoreAs Figure 1 shows, the LTC1274 andLTC1277 come complete with aswitched capacitor ADC, a very wideband sample-and-hold, a referenceand power-down circuitry. They pro-vide parallel I/O in a 12-bit (LTC1274)or 8-bit (LTC1277) format. In addi-tion to the normal microprocessorinterface signals, they have conver-sion start inputs and data readyoutputs for latching the parallel datawhen the conversion is complete. Twopower-down modes are available: Napmode drops the supply current from2mA to 160µA and provides instantwake-up. Sleep mode drops supply

12-BIT SWITCHED CAP

ADC

OUTPUT LATCHES

CONTROL LOGIC AND

TIMINGPOWER DOWN CIRCUITRYREFERENCE

SLEEPREFRDY

VREF 2.42V

0V TO 4.096V OR

±2.048V

D11

D0

1212

LTC1274

BUSY

CS

RD

CONVST

AIN+ SAMPLE- AND-HOLD

12-BIT SWITCHED CAP

ADC

OUTPUT LATCHES

CONTROL LOGIC AND

TIMINGPOWER DOWN CIRCUITRYREFERENCE

NAP SLEEP

VLOGIC 3V OR 5V

REFRDY

VREF 2.42V

0V TO 4.096V OR

±2.048V

D7

D0/D8

LTC1277

BUSY

CS

RD

CONVST

HBEN

AIN+

AIN–

SAMPLE- AND-HOLD 1212

current below 1µA, and has a longerwake-up time. A power-good signal(REFRDY) is provided to indicate whenwake-up from Sleep has been achievedand to ensure that the system is oper-ating correctly. The devices areavailable in 24-pin SO-packages incommercial and industrial tempera-ture ranges.

New Features Save PowerFigure 2 shows how the LTC1274 andLTC1277 add to LTC’s low power,high speed ADC family. At 10mW,these new ADCs have the lowest powerdissipation available today. In

Figure 1. The new ADCs come complete with wideband sample-and-hold and reference. Theysample at 100ksps on 10mW and provide novel power-down options.

DESIGN FEATURES

MAXIMUM SAMPLING RATE (sps)

0

100

200

POW

ER D

ISSI

PATI

ON (m

W)

1.5M1M100k 500k

LTC 12-BIT PARALLEL SAMPLING ADCs

LTC1410

LTC1279

160mW + NAP/SLEEP

60mW + NAP

LTC1274/710mW + NAP/SLEEP

Figure 2. The LTC1274/LTC1277 offer verylow power consumption for applications at100ksps and below.


addition, they have two power-downmodes that save even more power.

Take a Nap andWake Up QuicklyTable 1 shows the shutdown optionsavailable. Nap mode allows theLTC1277 to be powered down andreawakened quickly. When NAP istaken low, everything but the refer-ence shuts down and the supplycurrent drops from 2mA to 160µA.When NAP is brought back high, thedevice wakes up instantly (400ns typi-cal). Figure 3 shows the conversiontiming when using Nap mode. First,NAP is taken high and one or moreconversions are performed. After thelast conversion, the NAP pin is takenback low. This method can reduce thepower dissipation by a factor of up to12.5 for slower sample rates (see Fig-ure 4). At sample rates below 10ksps,the current flattens out at the Nap-mode value of 160µA.

Sleep Mode: More Restfulbut Slower Wake-Up.Power drain can be reduced evenfurther with Sleep mode. TakingSLEEP low invokes a complete shut-down of the ADC. The internalreference powers off and the supplycurrent drops to less than 1µA. Whenthe reference is turned off, its outputbypass capacitor starts to discharge.

Bringing SLEEP high powers thedevice back up. A wake-up time isrequired for the internal reference toslew its output back to the desiredvalue and settle. This time is rela-tively slow and variable. It dependson the reference bypassing and load-ing, on the slewing current of theinternal reference and on how far thereference has fallen away from itsdesired value. The longer the device isshut down, the farther the referenceoutput will discharge and the longerthe wake-up time will be. Dependingon these factors, Sleep-mode wake-up time can vary from less than 1msto 40ms.

conversion results may have beenerroneous.

The LTC1274 and LTC1277 solveboth problems with a new outputsignal called REFRDY (referenceready), which monitors the internalreference and indicates when it hassettled. This signal tells the user ex-actly when the system is ready toconvert. No extra power need bewasted in some arbitrarily long delaytime. Also, full assurance is giventhat the device is ready to go and thatthe results will be accurate. Figure 5shows the power-up sequence fromSleep mode. The REFRDY signal indi-cates readiness to convert.

Power the ReferenceFirst, Then the ADCThe LTC1277 can save even morepower during wake-up from Sleepmode. If a converter is awakened fromSleep mode directly to full-powermode, it draws its full supply currentas the reference slews. This is unnec-essary and wastes power. The

NAP POWER OFF POWER ON POWER OFF

CONVST

WAKEUP TIME (400ns TYP.)

BUSY

CONVERSION TIME (6µs TYP.)

DATA OUTPUT OLD DATA AVAILABLE NEW DATA AVAILABLE

SAMPLE RATE (ksps)

160µA

1mA

2mA

SUPP

LY C

URRE

NT

1000 50

NAP MODE BETWEEN

CONVERSIONS

ACTIVE MODE

Figure 3. The LTC1277 wakes up from Nap mode quickly, converts and isthen powered down. Data can be read at any time, even in shutdown.

Figure 4. Using Nap mode between conver-sions cuts power by a factor of up to 12.5 asthe sample rate is reduced. Sleep mode cutspower even more.

DESIGN FEATURES

How Do I Know You’reAwake?... REFRDY!In the past, ADCs with complete shut-down (including the reference) haveoffered no indication of when theconverter’s reference was powered upand ready to operate. Users had towait some arbitrarily long time toallow a worst-case device to wake upunder worst-case conditions. Thiscaused two problems: first, the full-power drain of the converter waswasted during this long delay time.Even worse, since no assurance wasgiven that enough time had elapsed,

The LTC1274 and LTC1277are attractive new

converters. They bring newlevels of power savings,

performance and versatilityto the 12-bit 100ksps

ADC arena

LTC1277 LOGIC INPUTS OPERATING SUPPLY WAKE-UP NAP SLEEP MODE CURRENT TIME

1 1 ACTIVE 2mA — 0 1 NAP 160 µA 400ns X 0 SLEEP 0.3 µA 4ms

Table 1. LTC1277 Shutdown Options


LTC1277 can prevent this waste if theREFRDY output is tied to the NAPinput (see Figure 6). This connectionallows the device to go from Sleepmode to Nap mode until the referenceis ready. REFRDY then releases theADC from Nap mode and the device isready to convert. Figure 6 shows howthe converter draws only 160µA dur-ing the reference settling time insteadof the full 2mA current. This can cutpower dissipation by a factor of two tofour in applications where Sleep modeis used.

Unbeatable AC and DCThe LTC1274 and LTC1277 bringunusually high performance to the100ksps speed range. They offer ex-cellent DC and AC specifications andan extremely linear, wideband sample-and-hold, which is suitable forundersampling. DC specificationsinclude maximum INL and DNL of±1LSB with no missing codes guaran-teed. Figure 7 shows a typical linearityof far better than 12 bits (typically 14

bits). Drift of the internal reference is30ppm/°C max.

AC specifications such as signal tonoise and distortion (SINAD) and THDare specified at 71dB and 76dBminimum. These are very good speci-fications for a 12-bit ADC, but theimpressive thing is that they are speci-fied at twice the Nyquist frequency.This AC performance is made pos-sible by an extremely linear, widebandsample-and-hold design. Figure 8shows a plot of the ADC performanceas the analog input frequency is in-creased. This is the real test of asample-and-hold because, as theinput frequency increases, thesample-and-hold must slew fasterwithout distortion in order to trackthe signal accurately. Also, at highinput slew rates, any excess aperturejitter of the sample-and-hold showsup as a degradation of the noise floor.As the Figure shows, the devices excelin this area with good noise and dis-tortion at 1, 2, 5 or even 10 times theNyquist frequency.

SLEEP POWER OFF POWER ON POWER OFF

CONVST

VREF

REFRDY

Simplify the System DesignThe new converters have both analogand digital features that make themeasier to use and eliminate externalhardware.

SLEEP

NAPVREF

10µF REFRDY

SLEEP

REFRDY

LTC1277

OUTPUT CODE0

–1.00

INTE

GRAL

NON

LINE

ARIT

Y ER

ROR

(LSB

)

–0.50

0

0.50

1.00

512 1024 1536 2048 2560 3072 3584 4096

fSAMPLE = 100kHz

SLEEP

ADC CURRENT DRAIN

SLEEP 0.3µA

NAP 160µA

POWER ON 2mA 0.3µA

CONVST

VREF

REFRDY = NAP

Figure 5. On power-up from Sleep mode, the REFRDY signal indicates when the ADC’sreference has fully awakened from sleep mode and is ready for conversions.

Figure 7. Typical linearity is better than 12bits (typically 14 bits). Linearity is guaran-teed to be ±1LSB maximum over temperature.

Figure 8. The LTC1274/LTC1277 canaccurately sample very wideband inputsignals. Their SINAD and THD are nearlytheoretical at up to five times Nyquist andstill usable at ten times Nyquist.

INPUT FREQUENCY (Hz)

0

90

2 X NYQUIST

80

70

60

50

30

40

10

20

SIGN

AL/(N

OISE

+ D

ISTO

RTIO

N), S

INAD

, (dB

)2M10k 100k 1M

THDSINAD

VIN = 0dB

VIN = −20dB

VIN = −60dB

fSAMPLE = 100kHz

5 X NYQUIST

10 X NYQUISTNYQUIST

DESIGN FEATURES

Figure 6. Tying the LTC1277’s NAP input to its REFRDY output savespower by delaying the turn-on of power until the reference is settled.


Analog FlexibilityFigure 9 shows some of the analogfeatures of the ADCs. Both devicescontain a sample and hold. TheLTC1277 has a differential input thatallows the input range to be offset.The input range for both convertersautomatically switches from 0V–4.096V unipolar with VSS grounded,to ±2.048V bipolar when VSS is tied to−5V. The internal reference can beoverdriven with an external 2.5V ref-erence to improve the full-scaletemperature coefficient. In bipolarmode, the reference pin can be drivenwith an op amp to provide a 2:1 AGCfunction.

The analog inputs are high imped-ance, making them easy to multiplexwith an inexpensive CMOS MUX. Noerrors are caused because no DCcurrents are drawn through the MUX’son resistance. The high-Z inputs alsoeliminate the AC-coupling problemsfound on competitive devices. (Manyof these other converters use inter-nal, resistive level shifters to generate

bipolar input spans. These internalresistors charge up the AC-couplingcap and pull the input up toward fullscale; as a result, part of the signalgets clipped.) To AC couple theLTC1274 and LTC1277, simply use aseries C and an R to ground (or towherever you desire the DC level tobe) on the analog input.

Digital SimplicityThe digital interface is shown in Fig-ure 10. In addition to the well knownmicroprocessor interface signals (CS,RD, etc.), the LTC1274 and LTC1277provide several new signals. A sepa-rate convert-start input (CONVST)allows operation from an externalsample clock, if desired. This freesthe microprocessor from having torequest conversions at precise sampleintervals, which is often impossible.In this mode, the sample signal startsa conversion. When it is complete, theADC interrupts the microprocessor(with the BUSY signal) and themicroprocessor reads the data asyn-

AC COUPLING

CD4051 OR

LTC1391

Hi Z MUXABLE

INPUTAIN+

AIN–

OFFSET

BIPOLAR MODE

UNIPOLAR MODE

VREFINTERNAL REFERENCE

EXTERNAL REFERENCE

2.5V TO 5V

2:1 AGC GAIN ADJUST

2.5V

–5V

VSS

LTC1277

–

+

DATA OUTPUTS

BUSY

VLOGIC

REFRDY

8-BIT BUS (1277) OR 12-BIT DATA (1274)

INTERRUPT TO µP OR LATCH SIGNAL FOR DATA OUTPUT

3V LOGIC INTERFACE SUPPLY (1277)

CONVERSION READY SIGNAL TO µP

fs CONVST

OPERATES FROM EXTERNAL SAMPLE

CLOCK OR µP

Figure 9. Analog flexibility includes easy AC coupling and MUXing, offsetting the input span,unipolar or bipolar inputs and a reference pin that can be overdriven.

chronously. Alternatively, CONVSTcan be tied to RD, which allows themicroprocessor to read data and startconversions in the old fashioned way.

Output data is available as a 12-bitword (LTC1274) or as two 8-bit bytes(LTC1277). Both converters haveBUSY signals that indicate when out-put data is ready to be latched. Anoutput logic supply allows theLTC1277 to interface directly to 3Vsystems.

ConclusionThe LTC1274 and LTC1277 are at-tractive new converters. They bringnew levels of power savings, perfor-mance and versatility to the 12-bit100ksps ADC arena. Their 10mWpower levels and novel shutdownmodes must be considered by power-sensitive designers. The cleanwideband sampling capability and lownoise make them ideal for signal-capture applications. And the flexiblefeature set can simplify the systemdesign. These devices are a “mustsee” for users of sampling ADCs.

DESIGN FEATURES

Figure 10. The digital hookup is simple, withan external conversion start input, 8- or 12-bit data outputs, data-ready signal (BUSY),reference-ready signal (REFRDY) and a 3Vlogic-interface supply (LTC1277).

Authors can be contacted at (408) 432-1900


The LT1511 3A Battery ChargerCharges All Battery Types,Including Lithium-Ion

by Chiawei Liao

The LT1511 current mode PWMbattery charger is the simplest, mostefficient solution for fast chargingmodern rechargeable batteries,including lithium-ion (Li-Ion),nickel-metal-hydride (NiMH) and

nickel-cadmium (NiCd) that requireconstant-current and/or constant-voltage charging. The internal switchis capable of delivering 3A DC current(4A peak current). Full charging cur-rent can be programmed by resistors

or by a DAC to within 5%, and thetrickle charge current can be pro-grammed to 10% accuracy. With0.5% reference voltage accuracy,the LT1511 meets the critical

–

+

–

+

–

+

–

+

– +

VSW

0.7V

1.5V

VBAT

VREF

VC

GND

UV

SLOPE COMPENSATION

R2

R3

C1

PWMB1

CA2

–

+

–

+

CA1

VA

+

+

–

+

6.7V+

VREF 2.465V

SHUTDOWN

200kHz OSCILLATOR

S

RRR

R1 1k

RPROG

VCC

UVOUT

VCC

BOOST

SW

SENSE

SPIN

BAT

IPROG

RS3

RS2RS1

IBAT

0VP

BAT

PROG

IPROG

IBAT = (IPROG)(RS2)

RS1

CPROG

75k

QSW

VCC

gm = 0.64Ω

–

+CL1

CLP

100mV

CLN

COMP1

COMP2

+

=

(RS3 = RS2)

2.465V RPROG

RS2 RS1( () )

Figure 1. LT1511 block diagram

DESIGN FEATURES


100mV

–

+

500Ω

CLP

CLN

VCC

UVR5

LT1511

R6

1µF

+

RS4*

+VIN

CL1

AC ADAPTER OUTPUT

*RS4 = 100mV ADAPTER CURRENT LIMIT

Figure 2. Adapter current limiting

Figure 3. PWM current programming

lower current, IPROG, fed into the PROGpin. Amplifier CA2 compares the out-put of CA1 with the programmedcurrent and drives the PWM loop toforce them to be equal. High DC accu-racy is achieved with averagingcapacitor CPROG. Note that IPROG hasboth AC and DC components. IPROGgoes through R1 and generates a rampsignal that is fed to the PWM controlcomparator C1 through buffer B1 andlevel-shift resistors R2 and R3, form-ing the current mode inner loop. TheBoost pin drives the switch NPN QSWinto saturation and reduces powerloss. For batteries such as lithium-ion that require both constant-currentand constant-voltage charging, the0.5%, 2.465V reference and the am-plifier VA reduce the charging currentwhen the battery voltage reaches thepreset level. For NiMH and NiCd, VAcan be used for overvoltage protec-tion. When the input voltage is notpresent, the charger goes into lowcurrent (3µA typically) sleep mode asthe input drops 0.7V below the bat-tery voltage. To shut down the charger,simply pull the VC pin low with atransistor.

Adapter LimitingAn important feature of the LT1511 isthe ability to automatically adjustcharging current to a level that avoidsoverloading the wall adapter. Thisallows the product to operate at thesame time that batteries are beingcharged, without requiring complexload-management algorithms. Addi-tionally, batteries will automatically

be charged at the maximum possiblerate of which the adapter is capable.This feature is created by sensingtotal adapter output current and ad-justing charging current downward ifa preset adapter-current limit is ex-ceeded. True analog control is used,with closed-loop feedback ensuringthat adapter load current remainswithin limits. Amplifier CL1 in Figure2 senses the voltage across RS4. Whenthis voltage exceeds 100mV, the am-plifier will override the programmedcharging current and limit adaptercurrent to 100mV/RS4. A lowpass fil-ter formed by 500Ω and 1µF is requiredto eliminate switching noise.

Charging CurrentProgrammingThe basic formula for charging cur-rent is

IBAT = IPROGRS2

RS1

RS2

RS1

2.465VRPROG

=

where RPROG is the total resistancefrom PROG pin to ground.

For example, 3A charging currentis needed. To have low power dissipa-tion in RS1 and enough signal to drivethe amplifier CA1, let RS1 = 100mV/3A = 0.0033Ω. This limits RS1 powerto 0.3W. Let RPROG = 5k, then

RS2 = RS3 = (IBAT)(RPROG)(RS1)2.465V

(3A)(5k)(0.033)2.465V

= = 200Ω

Charging current can also be pro-grammed by pulse-width modulatingIPROG at a frequency higher than a fewkHz (Figure 3). Charging current willbe proportional to the duty cycle ofthe switch, with full current at 100%duty cycle.

PWM

RPROG 4.7k

300Ω

PROG

CPROG 1µF

Q1 VN2222

5V0V

LT1511

IBAT = (DC)(3A)

constant-voltage charging require-ment for lithium cells.

The LT1511 is equipped with avoltage-control loop to control charg-ing voltage and a current-control loopto control charging current. A thirdcontrol loop is provided to regulatethe current drawn from the ACadapter. This allows simultaneousequipment operation and batterycharging without overloading theadapter. Charging current is reducedto keep the adapter current withinspecified levels.

The LT1511 can charge batteriesranging from 1V to 20V. Ground sens-ing of current is not required and thebattery’s negative terminal can betied directly to ground. A saturatingswitch running at 200kHz gives highcharging efficiency and small induc-tor size. A blocking diode is notrequired between the chip and thebattery because the chip goes intosleep mode and drains only 3µA whenthe wall adapter is unplugged. Soft-start and shutdown features are alsoprovided. The LT1511 is available ina 24-pin fused-lead power SO widepackage with a thermal resistance of30°C/W.

OperationThe LT1511 is a current mode PWMstep-down (buck) switcher. The DCbattery-charging current is pro-grammed by a resistor, RPROG (or by aDAC output current), at the PROGpin (see the block diagram in Figure1). Amplifier CA1 converts the charg-ing current through RS1 to a much

DESIGN FEATURES


R2 5.49k

R1 49.3k

1k

PROG

0.33µF Q1 VN2222

LT1511

Lithium-Ion ChargingThe 3A lithium battery charger (Fig-ure 4) charges lithium-ion batteriesat a constant 3A until the batteryvoltage reaches a limit set by R3 andR4. The charger will then automati-cally go into a constant-voltage mode,with the current decreasing to zeroover time as the battery reaches fullcharge. This is the normal regimenfor lithium-ion charging, with thecharger holding the battery at “float”voltage indefinitely. In this case noexternal sensing of full charge isneeded.

Current though the R3/R4 divideris set at 15µA to minimize batterydrain when the charger is off. Theinput current to the OVP pin is 3nAand this error can be neglected.

With divider current set at 15µA,R4 = 2.465/15mA = 162k and

R3 = (R4)(VBAT − 2.465) 162k(8.4 − 2.465)2.465 2.465

= 390k

=

Lithium-ion batteries typically re-quire float-voltage accuracy of 1% to2%. The accuracy of the LT1511 OVPvoltage is ±0.5% at 25°C and ±1% overfull temperature. This leads to thepossibility that very accurate (0.1%)resistors might be needed for R3 andR4. Actually, the temperature of theLT1511 will rarely exceed 50°C in

float mode because charging currentshave tapered off to a low level, so0.25% will normally provide the re-quired level of overall accuracy.

Nickel-Cadmium and Nickel-Metal-Hydride ChargingThe circuit in the 3A lithium batterycharger (Figure 4) can be modified asshown in Figure 5 to charge NiCd orNiMH batteries. For example, two-level charging is needed; 2A when Q1is on and 200mA when Q1 is off. For2A full current, the current senseresistor (RS1) should be increased to0.05Ω, so that enough signal (10mV)will be across RS1at 0.2A trickle chargeto keep charging current accurate.

For a two-level charger, R1 and R2are found from

R1 = R2 =(2.465)(4000) (2.465)(4000)ILOW

IHI − ILOW

All battery chargers with fast chargerates require some means to detectthe full-charge state in the battery inorder to terminate the high chargingcurrent. NiCd batteries are typicallycharged at high current until tem-perature rise or battery voltagedecrease is detected as an indicationof nearly full charge. The chargingcurrent is then reduced to a muchlower value and maintained as a con- Figure 5. 2-step charging

SW

BOOST

COMP1

CLN

UV

PROG

VCOVP SENSE BAT

C1 1µF

RS4 ADAPTER CURRENT SENSE

R7

500Ω

R5† UNDERVOLTAGE LOCKOUT

R6 5k

DINVIN (ADAPTER INPUT) 11V TO 25V

VBAT

10µF+

CPROG 1µF

CIN* 10µF

+

300Ω RPROG 4.93k 1%

0.33µF

1k

0.47µF

RS3 200Ω 1%

RS2 200Ω 1%

L1** 10µH

D2 1N4148 200pF

RS1 0.033Ω

BATTERY CURRENT SENSE

R3 390k 0.25% BATTERY VOLTAGE SENSE

R4 162k 0.25%

50pF

COUT 22µF TANT

+ 4.2V

4.2V

++

LT1511

NOTE: COMPLETE LITHIUM-ION CHARGER, NO TERMINATION REQUIRED. RS4, R7 AND C1 ARE OPTIONAL FOR IIN LIMITING *TOKIN 25V CERAMIC SURFACE MOUNT **10µH COILTRONICS CTX10-4 †CONSULT LT1151 DATA SHEET FOR R5 VALUE

VCC TO MAIN SYSTEM POWER

SPIN

D1 MBR340

GND CLP

2 Li-Ion

Figure 4. 3 Amp lithium-ion battery charger

stant trickle charge. An intermediate“top off” current may be used for afixed time period to reduce 100%charge time.

NiMH batteries are similar in chem-istry to NiCd but have two differencesrelated to charging. First, the inflec-tion characteristic in battery voltageas full charge is approached is notnearly as pronounced. This makes itmore difficult to use dV/dt as anindicator of full charge, and tempera-ture change is more often used, witha temperature sensor in the batterypack. Second, constant trickle chargemay not be recommended. Instead, amoderate level of current is used on apulse basis (1% to 5% duty cycle) withthe time-averaged value substitutingfor a constant low trickle.

If overvoltage protection is needed,R3 and R4 should be calculated ac-cording to the procedure described inlithium-ion charging section. The OVP

DESIGN FEATURES



LTC1520 High Speed Line ReceiverProvides Precision Propagation Delayand Skew by Victor Fleury

IntroductionThe LTC1520 is a 50Mbit/s, lowpower, precision quad line receiverthat translates differential input sig-nals into CMOS/TTL output logiclevels. The receivers employ a uniquearchitecture that guarantees excel-lent performance over process andtemperature, with propagation delayof 18ns ±2ns. The architecture af-fords low same-channel skew (|tPHL -tPLH| < 600ps), and low channel-to-channel propagation-delay variation(< 600ps). A new short-circuit detec-tion technique permits indefiniteshorts to power or ground.

Circuit DescriptionShort-channel CMOS circuitry typi-cally has very wide performancevariations. This is due in part to thelarge percentage variation in channellength and to second-order mobilityand threshold effects. Increasingchannel length not only decreasesthe drive capability of CMOS devices,but also increases the devices’ gatecapacitance (less current chargingmore capacitance). In effect, we seeCMOS propagation delays varying as

L2 (square of the channel length). Forexample, the propagation delay oftypical CMOS line receivers can varyas much as 500% over process andtemperature. In applications wherehigh speed clock and data waveformsare sent over long distances, propa-gation delay and skew uncertaintiespose system design constraints. TheLTC1520 addresses this problem. Thepropagation delays change by ±20%,a better than 10 times performanceimprovement.

The design was fabricated usingLinear Technology’s high performanceCMOS process. The CMOS designmakes it possible to achieve high speedand low DC power consumption with-out sacrificing ruggedness againstoverload or ESD damage. CMOS alsoallows for tighter propagation-delayskew. Figure 1 shows a block diagramof the LTC1520 signal path. The in-put differential pair amplifies theminimum 500mV (at speed) inputsignal level. Note the input resistornetwork, which expands the inputcommon mode range (the LTC1520has an input common mode range

extending from 0V to 5V, whereas theLTC1518 and LTC1519 are futureproducts that will have an input com-mon mode range from −7V to +12V).The output is fed into another differ-ential amplifier that switches aspecified amount of current into itsload capacitance. These two stagesmust have enough gain to switch allthe available current. The output ofthe second stage is a valid logic levelthat feeds inverters.

High Data RatesThe LTC1520 can propagate pulses(Figure 2) of shorter duration than itspropagation delay (20ns maximum).To obtain this high data rate (through-put), it is necessary to distribute thetotal propagation delay as evenly aspossible between the stages. This al-lows rail-to-rail swing at the output ofeach stage. For example, if the outputof the second stage has a 3V to 5Voutput swing, the succeeding inverterwill never trip high. The minimumnumber of stages is also limited bythe maximum rise/fall times allowedat the output (~3.5ns). However, the

–

+

–

+

IN+

VCC

DIFF

BIAS4

BIASTRIM

–

+GM OUT OUTPUT

IN−

VCC

PROPTRIM

3

Figure 1. LTC1520 block diagram

DESIGN FEATURES


maximum number of stages is limitedby the maximum propagation delay(latency).

ConsistentPropagation DelayThe inherent temperature and pro-cess tolerance, along with bias anddelay trimming, make it possible toguarantee a propagation delay win-dow more than an order of magnitudetighter than that of the typical CMOSline receiver.

Temperature StabilityFor large VGS and a given channellength, the propagation delay of in-verters increases with temperature.To keep temperature stability, thefirst two stages must have a delaythat decreases with temperature. Thiswas accomplished via a current sourcewhose current is inversely pro-portional to mobility. Therefore,with increasing temperatures, theinverter’s delay goes up as the delaysof the first two stages go down.

Process ToleranceAt a given temperature and VGS, theinverter delays vary as µCOX W/L. Thedelays of the first and second stagesvary inversely with µCOX W/L. Theeffect of process variations on totalpropagation delay are canceled out tothe extent that we are able to matchthe µCOX W/L of the bias, invertersand differential stages. We includetrims in both the bias network and inthe signal path. For short channellength processes, we add capacitanceevenly between one inverter and thesecond differential stage to maintaintemperature stability.

Low SkewSkew is typically caused by the un-equal charging versus discharging ofboth internal and external capaci-tances. Unequal excitation of highfrequency zeroes also contributes toskew. Therefore, it is necessary tokeep the signal in differential form asmuch as possible. The first stage isdifferential-in/differential-out. Itswitches a multiple of the tail currentinto its capacitive load. Two differen-tial stages are used to maintaincharging versus discharging symme-try and to equalize feedthrough effects.Figure 3 shows two adjacent channels.

Low OvershootThe LTC1520 can achieve maximumspeeds with all four receivers operat-ing simultaneously (500mV inputdifferential signal), while maintain-ing low output overshoot. Smallon-chip resistors help mitigate theeffect of parasitic bond wire and lead-frame inductances. Note that thesystem designer also needs to mini-mize printed circuit board parasiticinductances by placing surface mountceramic bypass capacitors very closeto the LTC1520. Low overshoot andringing is desirable to reduce electro-magnetic interference.

Short-Circuit Protectionand Automatic ResetTypical foldback short-circuit protec-tion can lead to oscillation, slowerrise/fall times and exaggerated skew.This family’s novel short-circuit pro-tection method avoids these problemsby sensing the output voltage. If theoutput remains in the wrong state forlonger than about 60ns, the output isshut off and a small, known current(~20mA, positive or negative, depend-ing on VCC/Gnd short) is dumped intothe output. The circuit then detectswhen the short is removed and takesitself out of short-circuit mode. Thisavoids having to power the part up/down after detecting a short.

NOTE: STUBS CONNECTED TO RT MUST BE EQUIDISTANT AND SHORT.

MC10116

TWISTED PAIR

5V

100

100

100

100

120ΩRT

1/4 LTC1520

1/4 LTC1520

1/4 LTC1520

5V

5V

Figure 2. Typical propagation delay: VIN =500mV, 15ns pulse width

Figure 3. Typical channel-to-channelpropagation delay is <600ps. (Two channelsare overlaid here; the differences cannot bedistinguished on this oscillograph.)

Figure 4. Typical LTC1520 application

DESIGN FEATURES


5ns/DIV


The LTC1446 and LTC1446L:World’s First Dual 12-Bit DACsin SO-8 Packages by Hassan Malik and

Jim BrubakerDual 12-Bit Rail-to-RailPerformance in a Tiny SO-8The LTC1446 and LTC1446L are dual12-bit, single-supply, rail-to-railvoltage output digital-to-analog con-verters. Both of these parts includean internal reference and two DACswith rail-to-rail output buffer amplifi-ers, packed in a small, space-saving8-pin SO or PDIP package. These are12-bit monotonic DACs with DNLguaranteed to be less than 0.5LSB.They have an easy-to-use SPI-com-patible interface, with a digital outputpin that allows several DACs to bedaisy-chained to save board space. Apower-on reset initializes the outputsto zero-scale at power-up.

The LTC1446 has an output swingof 0V to 4.095V, making each LSB

equal to 1mV. It operates from a single4.5V to 5.5V supply, dissipating3.5mW (ICC typical = 700µA). TheLTC1446L has an output swing of 0Vto 2.5V. It can operate on a singlesupply with a wide range of 2.7V to5.5V. It dissipates 1.35mW (ICC typi-cal = 450µA) at a 3V supply.

Circuit Topology

Complete Stand-AlonePerformanceFigure 1 shows a block and pin dia-gram of the LTC1446 and LTC1446L.Both parts have rail-to-rail outputbuffer amplifiers and an internal ref-erence, offering the user convenientstand-alone performance. The data

inputs for both DAC A and DAC B areclocked into one 24-bit shift register.The first 12-bit segment is for DAC Aand the second is for DAC B. The MSBis loaded first and LSB last in both ofthese 12-bit segments. The data islatched into the shift register on therising edge of clock. The clock pin hasa hysteresis of about 150mV to makeit less sensitive to noise. When all thedata has been shifted in, it is loadedinto the DAC registers when CS/LDgoes high. This also updates both 12-bit DACs and internally disables theCLK signal. Data in the 24-bit shiftregister is also available on the DOUTpin, allowing the user to daisy-chainseveral DACs together. An internalpower-on reset clears the shift regis-

–

+

24-BIT SHIFT

REGISTER

POWER ON RESET

DAC B

REGISTER

LD

DAC A

REGISTER

LD

REFERENCE

8

12-BIT DAC-B

VOUTB

7 VCC

–

+5

12-BIT DAC-A

VOUTA

6 GND

1CLK

2DIN

4DOUT

3CS/LD

Figure 1. 12-bit rail-to-rail performance in an SO-8 package

DESIGN FEATURES


ters and DAC registers to all zerosand forces both the buffer amplifieroutputs to zero-scale. The LTC1446Lhas an internal reference of 1.22Vand the amplifier gain is about 2.05,giving a convenient full scale of 2.5V.The LTC1446 reference is 2.048V andthe amplifier gain is 2.0, giving it a fullscale of 4.095V.

Patented ArchitectureGuarantees MonotonicityThe LTC1446 family uses a propri-etary architecture that was first usedin the LTC1257 and is described inmore detail in Volume III, Number 3 ofLinear Technology. This novel archi-tecture is inherently monotonic andhas excellent 12-bit DNL, with a maxi-mum specification of 0.5LSB.

LTC1296

VCC

50k74HC04

5V

5V

CS

22µF

µPCLK

8 ANALOG INPUT CHANNELS

DOUT

DIN

CH0

COM

SSO REF–

CH7

REF+

50k

0.1µF

100Ω

100Ω

LTC1446

CS/LD

CLK

DOUT

DIN

VOUTB

GND

VCC

VOUTA

0.1µF

0.1µF

Figure 2. Typical application for the LTC1446L or LTC1446

Figure 3. An autoranging 8-channel ADC with shutdown

LTC1446L/1446

CLK LTC1446L: 0V TO 2.5V LTC1446: 0V TO 4.095V

LTC1446L: 2.7V TO 5.5V LTC1446: 4.5V TO 5.5V

LTC1446L: 0V TO 2.5V LTC1446: 0V TO 4.095V

0.1µFµP

CS/LD

DIN

DOUT

VOUTB

GND

VCC

VOUTA

High PerformanceRail-to-Rail BuffersThe rail-to-rail amplifiers on theseparts can swing to within a few milli-volts of either rail when unloaded,giving them true rail-to-rail perfor-mance. When swinging close to therails, the effective output impedanceis about 50Ω. The op amps are ca-pable of sinking or sourcing over 5mAat a 5V supply. The mid-scale glitch atthe output is 20nV-s and the digitalfeedthrough is a negligible 0.15nV-s.

DESIGN FEATURES


The LTC1446 andLTC1446L are the world’sonly DACs that offer dual

12-bit stand-aloneperformance in an 8-pin

SO or PDIP package.…these DACs

do not compromiseon performance…

A Wide Range of ApplicationsSome of the typical applications forthese parts include digital calibra-tion, industrial process control,automatic test equipment, cellulartelephones and portable, battery-pow-ered applications. Figure 2 shows howthese parts are typically used.

An Autoranging 8-ChannelADC with ShutdownFigure 3 shows how to use oneLTC1446 to make an autorangingADC. The microprocessor sets thereference span and the common pinfor the analog input by loading theappropriate digital code into theLTC1446. VOUT A controls the com-mon pin for the analog inputs to theLTC1296 and VOUT B controls the ref-erence span by setting the REF+ pinon the LTC1296. The LTC1296 has ashutdown pin that goes low in shut-down mode. This will turn off the PNPtransistor supplying power to theLTC1446. The resistor and capacitoron the LTC1446 outputs act as alowpass filter for noise.



LT1490/LT1491 Over-the-TopDual and Quad MicropowerRail-to-Rail Op Amps by Jim Coelho-Sousae

IntroductionThe LT1490 is Linear Technology’slowest power, lowest cost and small-est dual rail-to-rail input and outputoperational amplifier. The ability tooperate with its inputs above VCC, itshigh performance-to-price ratio andits availability in the MSOP package,sets the LT1490 apart from otheramplifiers. A unique input stage al-lows the LT1490 to operate with inputcommon mode voltages up to 30Vabove the positive supply. The LT1490has a quiescent current of less than50µA per amplifier, and can operatewith supply voltages from 2.5V to44V. The ability to withstand reversesupply voltages of up to 25V is an-other unique feature of the LT1490.For single 5V supply operation, typi-cal specifications include 300µV inputoffset voltage, 3nA input bias cur-rent, 200pA input offset current,open-loop voltage gain of one millioninto a 10k load, 0.07V/µs slew rate,100dB common mode rejection ratioand 98dB power supply rejection ra-tio. The output can swing to within22mV of either rail with no load. Theoutput current drive is typically±20mA, and the part is stable withcapacitive loads of up to 5000pF.Additional performance specificationsare shown in Table 1.

The LT1490 dual is available withindustry-standard pinout in 8-pinMSOP, 8-pin SO or 8-pin mini-DIPpackages. The LT1491 quad is avail-able with industry-standard pinoutin 14-pin SO or 14-pin mini-DIPpackages.

Going Over the TopKey to the unique operation of theLT1490 is the input stage, shown inFigure 1. Similar to other rail-to-railop amps, the LT1490 uses two inputstages to achieve input rail-to-rail

operation. Device Q7 controls whichstage is active by steering the tailcurrent between the two stages as afunction of the input common modevoltage. The LT1490 has three modesof operation.

Mode 1: VEE < VCM < VCC − 1VFor input common mode voltagesbetween VEE and VCC − 1V, the PNPstage (Q5–Q6) is active, and Q7 andthe NPN stage (Q1–Q4) are off. SinceQ7 is off, 2µA of current flows throughQ5–Q6. The input bias current is thebase current of Q5 or Q6, typically4nA, as shown in Figure 2. The inputoffset voltage for this stage is trimmedto less than 300µV.

Mode 2: VCC − 1V < VCM < VCCWhen the input common mode volt-age reaches VCC − 1V, Q7 turns on,diverting the current from Q5–Q6 tothe NPN stage. When the PNP stage iscompletely off, 2µA flows through the2× current mirror D3–Q8. The 4µAcurrent through Q8 sets the bias forthe NPN input stage. In this mode,Q1–Q2 act as emitter followers, driv-ing a differential amplifier formed byQ3–Q4. The input bias current forthis mode of operation is the basecurrent of Q1 or Q2, typically 20nA.

When the common mode voltagereaches VCC − 0.2V, Q1–Q2 begin tosaturate due to the forward voltage ofD1–D2, as shown in Figure 2. This

DESIGN FEATURES

C˚52,ecnamrofrepCDlacipyT.1elbaT

snoitidnoC VS V3= VS V5= VS = ± V51

egatloVtesffO V MC V= EE Vot CC − V1 003 µV 003 µV 004 µV

V= EE V44+ 006 µV 006 µV 006 µV

tnerruCsaiBtupnI V MC V= EE Vot CC − V1 An3 An3 An3

V= EE V44+ 4µA 4µA 4µA

tnerruCtesffOtupnI V MC V= EE Vot CC − V1 Ap002 Ap002 Ap002

V= EE V44+ An06 An06 An03

tfihSegatloVtesffO V MC V= EE Vot CC − V1 05 µV 001 µV 003 µV

V= EE Vot EE V44+ 005 µV 005 µV 005 µV

niaGpooL-nepO RL k01= k0001 k0001 k002

)wol(egatloVtuptuO daoloN Vm22 Vm22 − V879.41

I KNIS Am01= Vm005 Vm005 − V5.41

)hgih(egatloVtuptuO daoloN V879.2 V879.4 V879.41

I ECRUOS Am01= V6.2 V6.4 V6.41

tnerruCtuptuO ecruoS Am21 Am22 Am42

kniS Am22 Am72 Am83

pmAreptnerruCylppuS 04 µA 04 µA 05 µA


causes the input bias current to in-crease. At VCM = VCC the input biascurrent is typically 200nA. The inputoffset voltage of the NPN stage is nottrimmed, but is typically 600µV.

Mode 3: VCC < VCM < VCC + 44VAs Figure 2 shows, when VCM = VCCthe NPN input stage is beginning tosaturate but is not yet fully satu-rated. When VCM is approximatelyequal to VCC + 0.2V, Schottky diodesD1–D2 reverse bias, causing Q1–Q2to fully saturate. In this condition,the base current of Q1–Q2 is equal tothe emitter current, typically 4µA.The Schottkys, in combination withspecial geometries for the input de-vices Q1–Q2, are the key to the uniqueabove-the-rail operation of theLT1490. The input offset voltage forthis mode of operation is typically600µV.

Reverse Battery ProtectionThe LT1490 can withstand reversesupply voltages of up to 25V. Theinputs are also protected for excur-sions below VEE. The protectionconsists of a 1k resistor in series witheach input, which limits the currentthrough the associated substrate di-ode. The part will not be damaged ifthe current through the substratediode is less than 10mA.

An Over-the-Top ApplicationThe battery current monitor circuitshown in Figure 3 demonstrates theLT1491’s ability to operate with itsinputs above the positive supply rail.

COMMON MODE VOLTAGE (V)

–10nA

20nA

10nA

0nA

30nA

4µA

2µA

6µA

INPU

T BI

AS C

UR

REN

T

5.63.8 4.0 4.2 4.4 4.8 5.0 5.2 5.44.6

MODE 3

MODE 1

MODE 2

VS = 5V, 0V

Q1

D3

TO SECOND STAGE

VEE

Q4 Q7

Q5

1k

–IN

VCC

D1 D2 2µA

Q3 VCC– 1.0V

Q2 Q6

Q8

1k+IN

In this application, a conventionalamplifier would be limited to a batteryvoltage between 5V and ground, butthe LT1491 can handle battery volt-ages as high as 44V. The LT1491 canbe shut down by removing VCC. WithVCC removed the input leakage is lessthan 0.1nA. No damage to the LT1491will result from inserting the 12Vbattery backward.

When the battery is charging, AmpB senses the voltage drop across RS.

The output of Amp B causes QB todrain sufficient current through RBto balance the inputs of Amp B. Like-wise, Amp A and QA form a closedloop when the battery is discharging.The current through QA or QB isproportional to the current in RS; thiscurrent flows into RG, which convertsit back to a voltage. Amp D buffersand amplifies the voltage across RG.Amp C compares the output of Amp A

–

+

+

1/4 LT1491

A

+

–1/4

LT1491 C

RA 2k

RS 0.2Ω

QA

CHARGER VOLTAGE

VBATTERY = 12V

VSUPPLY = 5V, 0V

LOGIC

RA' 2k

–

+1/4

LT1491 B

–

+1/4

LT1491 D

RB 2k

RB' 2k

90.9k

RL

RG 10k

10k

S1S1 = OPEN, GAIN = 1 S1 = CLOSED, GAIN = 10

LOGIC HIGH (5V) = CHARGING LOGIC LOW (0V) = DISCHARGING

NOTE: RA = RB

QB

VOUT

VOUT

RS RG/RA GAIN

VOUT

GAIN

( )( ) ( ) IBATTERY = = AMPS

Figure 1. LT1490 input stageFigure 2. Input bias current characteristicsover all three modes of operation

Figure 3. LT1491 battery current monitor—an “over-the-top” application

DESIGN FEATURES



LT1512/LT1513 Battery ChargersOperate with Input Voltages Above orBelow the Battery Voltage by Bob Essaff

IntroductionThe LT1512 and LT1513 form aunique family of constant-current,constant-voltage battery chargers thatcan charge batteries from input volt-ages above or below the batteryvoltage. This feature can help sim-plify system design and add productflexibility by allowing battery charg-ing from multiple sources, such as awall adapter, a 12V automotive sys-tem or a 5V power supply, all with thesame circuit. The constant-current,constant-voltage architecture makesthe LT1512 and LT1513 well suitedfor charging NiCd, NiMH, lead-acid orlithium-ion batteries.

Both devices are current modeswitching regulators that operate at afixed frequency of 500kHz. Productfeatures include a ±1% reference-volt-age tolerance, 2.7V minimum inputvoltage, easy external synchroniza-tion and 12µA supply current inshutdown mode. The LT1512 andLT1513 also include low loss on-chippower switches rated for 1.5 Ampsand 3 Amps respectively. High fre-quency switching allows the use ofsmall surface mount inductors andcapacitors, and the battery can bedirectly grounded.

OperationThe LT1512 and LT1513 are specifi-cally optimized to use the SEPICconverter topology, which is shown inFigure 1’s typical application. TheSEPIC (single-ended primary induc-tance converter) topology has severaladvantages for battery-charging ap-

one inductor core, although two sepa-rate inductors can be used.

The topology is essentially identi-cal to a 1:1 transformer-flyback circuitexcept for the addition of capacitorC2, which forces identical AC volt-ages across both windings. Thiscapacitor performs three tasks: iteliminates the power loss and voltagespikes usually caused by a flyback-converter’s leakage inductance; itforces the input current and the cur-rent in resistor R3 to be a trianglewave riding on top of a DC componentinstead of forming a large amplitudesquare wave; and it eliminates thevoltage spikes across the output di-ode when the switch turns on.

When the battery is below its floatvoltage, set by R1 and R2, the chargeris in the constant-current mode. Thesuggested value for R2 is 12.4k. R1 iscalculated from:

R1 =VOUT − 1.245

1.245R2

+ (3 × 10−7)

where VOUT = battery float voltage

Charging current in the battery,which also flows through R3, devel-ops a voltage on the IFB pin. The IFBpin’s 100mV sense voltage sets the

LT1512CHARGE

SHUTDOWNIFBVC

VIN

L1A*

L1B*

0.5A

1 3

2

8

5•

•4

76

GNDVFB

VSW

WALL ADAPTER

INPUT

S/S

C3 22µF 25V

C2** 1µF × 2

C5 0.1µF

*

**

L1A, L1B ARE TWO 33µH WINDINGS ON A COMMON CORE: COILTRONICS CTX33-3 AVX1206Y2105KAT1A

C4 0.1µF

R4 24Ω

+

R1

R2

R3 0.2Ω

C1 22µF 25V

+

D1 MBRS130LT3

INDUCTOR = 33µH

LT1513

LT1512

INPUT VOLTAGE (V)

0

1.21.0

0.80.6

0.40.2

1.4

1.6

2.0

1.8

2.2

2.4

CURR

ENT

(A)

300 5 10 20 2515

SINGLE LITHIUM CELL (4.1V)

SINGLE LITHIUM CELL (4.1V)

DOUBLE LITHIUM CELL (8.2V)

DOUBLE LITHIUM CELL (8.2V)

Figure 1. Battery charger with 0.5A output current

Figure 2. Maximum charging current

DESIGN FEATURES

The LT1512 and LT1513form a unique family of

constant-current, constant-voltage battery chargersthat can charge batteries

from input voltages above orbelow the battery voltage.

This feature can helpsimplify system design and

add product flexibility…

plications. It will operate with inputvoltages above or below the batteryvoltage, has no path for batterydischarge when turned off, and elimi-nates the snubber losses of flybackdesigns. It also has a current sensepoint that is ground referred and neednot be connected directly to the bat-tery. The two inductors shown areactually two identical windings on


programmed charging current to ICHG= 100mV/R3. The RC filter formed byR4 and C4 smoothes the signal pre-sented to the IFB pin.

Charging current remains constantuntil the battery reaches its float volt-age, at which point the LT1512/LT1513 changes to the constant-voltage mode. In this mode, thecharging current will taper off as re-quired to keep the battery at its floatvoltage. The circuit’s maximum in-put voltage is partly determined bythe battery voltage. When the switchis off, the voltage on the VSW pin isequal to the input voltage, which isstored across C2, plus the batteryvoltage. Both the LT1512 and LT1513have a maximum input voltage ratingof 30V and a maximum rated switchvoltage of 35V, thereby limiting inputvoltage to 30V or 35V minus the bat-tery voltage, whichever is less.

Figure 2 shows the maximum avail-able charging current for a single-cellor double-cell lithium battery pack.Note that the actual programmedcharging current will be independentof the input voltage if it does notexceed the values shown.

Figure 4. Shutdown controlled disconnect

LT1512

IFBVC

VIN

L1A

L1B

1 3

2

8

5•

•4

76

GNDVFB

VSW

VIN

S/S

22µF 25V

C2 1µF × 2

0.47µF

Q1 = SILICONIX Si9410DY C2 = AVX1206Y2105KAT1A

0.1µF

24Ω

+

R3B 0.24Ω

R1

R2

Q1R3A 2Ω

C1 22µF 25V

+

MBRS130LT3

HI CHARGE

LOW CHARGE

CHARGE

SHUTDOWN

Figure 3. 50mA/400mA programmable battery charger

LT1512/LT1513

CHARGE

SHUTDOWN

GNDVFB

S/S

R1

Q1 VN2222

BATTERY

R2

Programmingthe Charge CurrentAs mentioned earlier, charging cur-rent is set by R3, where ICHG = 100mV/R3. The charge current is programmedby changing the effective value of R3,as shown in Figure 3. In the lowcharge mode, Q1 is off, setting chargecurrent to ICHG LOW = 100mV/R3A, or100mV/2Ω = 50mA. In the high-charge mode, Q1 is on, and chargecurrent is ICHG HI = 100mV/R3A +100mV/(R3B + Q1’s RDS(ON)), or100mV/2Ω + 100mV/(0.24Ω + 0.04Ω))= 50mA + 357mA = 407mA. Note thatQ1’s RDS(ON) is a factor in the high-charge mode, requiring the use of alow RDS(ON) FET.

Off-State LeakageCharging can be terminated by placingthe LT1512/LT1513 into shutdownmode. If the battery remains con-nected to the charger when in the offstate, two leakage paths that load thebattery must be considered.

The first is the 100µA resistor-divider feedback current that flowsthrough R1 and R2. This current canbe eliminated with the addition of aFET, Q1, between R1 and the R2/VFBjunction, as shown in Figure 4. In this

example, pulling the charge/shut-down input above 3.75V will activatecharging and turn on Q1, whereasdriving the charge/shutdown inputbelow 0.6V will shut down theLT1512/LT1513 and turn off Q1.

The second leakage path to con-sider is in the output diode, D1 (Figure1). When the charger is in the offstate, the output diode sees a reversevoltage equal to the battery voltage.Though the Schottky diode reverseleakage may typically be only 10µA,its guaranteed specifications aremuch worse, up to 1mA. One solutionis to change the output diode to anultra-fast silicon diode, such as anMUR-110. The higher forward voltageof the silicon diode will decrease thecircuit’s efficiency, but these diodeshave reverse leakage specificationsbelow 5µA.

ConclusionWith the ability to operate from inputvoltages above or below the batteryvoltage, the LT1512 and LT1513 bat-tery chargers offer increased flexibilityfor portable systems.

DESIGN FEATURES



The POR output can also help stageoutput voltages. For example, if theauxiliary regulator is on in Figure 5,the 2.9V output will come up simulta-neously with the 3.3V output. In otherapplications, however, the POR out-put could be used to hold the AUX ONpin low, thus delaying the auxiliarystart-up until POR releases.

EXT VCC PinReduces Quiescent CurrentPower for the top and bottom MOS-FET drivers and for most of the othercontrol circuitry is derived from theINT VCC pin. When the EXT VCC pin isopen or at a low voltage, an internal5V low dropout regulator suppliesINT VCC power from VIN. If EXT VCC istaken above 4.7V, the 5V regulator is

In this issue we introduce theLTC1439. This IC is a constant-fre-quency, synchronous, triple outputDC/DC converter optimized for bat-tery operated applications. The part(and its brethren) are the next-gen-eration of ICs designed for the rapidlyexpanding portable computer andequipment marketplace. These de-

Editor's Page, continued from page 2

and Amp B to determine the polarityof the current through RS. The scalefactor for VOUT with S1 open is 1V/A.With S1 closed the scale factor is 1V/100mA, and current as low as 5mAcan be measured.

ConclusionThe LT1490 provides features notpreviously available in an operationalamplifier. The combination of “Over-the-Top” operation, reverse batteryprotection, micropower operation andMSOP package enables the LT1490/LT1491 to solve application problemsbeyond the reach of previous opera-tional amplifiers.

LT1490, continued from page 19

turned off and an internal switch isturned on to connect EXT VCC to INTVCC.

The EXT VCC pin is normally con-nected to the 5V output to allow INTVCC power to be derived from theregulator itself. Quiescent current isthen reduced because driver and con-trol currents are scaled by a factorapproximately equal to the 5V con-troller duty cycle. EXT VCC can also beconnected to other external high effi-ciency sources, up to a maximum of10V.

In addition to the other featuresdiscussed above, most versions of theLTC143X family also contain an un-committed comparator referenced to1.19V with an open-drain output pin,useful in a wide variety of applica-tions. The auxiliary regulator error

amplifier is also usable as a secondcomparator.

ConclusionThe LTC1435–LTC1439 multiple out-put DC/DC controllers offer atremendous amount of flexibility andfunctionality while removing many ofthe trade-offs that previously existedin battery-powered supplies. Withthese new controllers it is possible tohave high efficiency and low quies-cent current without giving upconstant frequency operation, and tohave low dropout without giving upN-channel MOSFETs. The wide vari-ety of output voltage and current levelsachievable using minimum magnet-ics makes these parts the logicalchoice for next-generation designs.

DESIGN FEATURES


pin should be grounded if not used.When a microprocessor DAC outputis used to control charging current, itmust be capable of sinking current ata compliance up to 2.5V if connecteddirectly to the PROG pin.

ConclusionThe LT1511 is a simple, cost effectivesolution for charging batteries at cur-rents of up to 3A. Battery packsranging from 1V to 20V canbe charged, independent of theirchemistry.

LT1511, continued from page 13

vices were developed in conjunctionwith many customers and incorpo-rate many requested features. Wecontinue to highlight new products inthe Design Features section. In thisissue, we spotlight several new bat-tery-charging products, including theLT1511, LT1512 and LT1513. Also

featured are some new converterproducts, the LTC1446 andLTC1446L D-to-A converters, and theLTC1277 and LTC1273 A-to-D con-verters. Many other products areintroduced in this issue. We also in-clude our usual complement of circuitideas and applications.

…a royally screwed-up circuitrepresents a learning opportunity…

—Derek Bowers

A circuit always works the way it issupposed to. It never disobeys anylaws of physics…

—Tom Fredericksen

The circuit doesn’t care about fair.—Jim Williams

There is always a way out.—George Philbrick

From Analog Circuit Design:Art, Science and Personalities.Edited by Jim Williams. Butterworth-Hienemann, 1991.


Other Features The part can be “hot swapped”

without dragging the line downor causing latchup

Output high with shorted orfloating inputs

Three-state outputs High input resistance (>20k) to

allow multiple parallel receivers

ApplicationsThe LTC1520 is designed for highspeed data/clock transmission overshort to medium distances. Its rail-


DESIGN FEATURES

to-rail input common mode rangeallows it to be driven via long PCboard traces, coaxial lines or long(hundreds of feet) twisted pairs. Itcan be used in networking hubs,servers, routers, bridges, repeatersand other local-area and telecommu-nications switching networks. Figure4 shows a typical LTC1520application. The LTC1518/LTC1519,plannned for future release, areRS485 compatible (LTC488, LTC489pin-for-pin compatible) high speed(50Mbit/s) line receivers. The highinput resistance (>20k) allows morereceivers to be connected on one line.The LTC1518/LTC1519 will conform

to the expanded RS485 input com-mon mode range (−7V to +12V), whileproviding nearly the same perfor-mance as the LTC1520.

ConclusionThe LTC1520 high speed, low powerline receiver uses a unique architec-ture with propagation delay and skewperformance unmatched by anyCMOS, TTL or ECL line receiver/com-parator. Its ruggedness, precise timingcontrol and fault detection featuresmake it easy to use in a wide varietyof high speed data transmission ap-plications.

Figure 4. A wide-swing, bipolar output DAC with digitally controlled offset

LTC1446

50k

5V

15V

–15V

CLK

0.1µF

5k

µP

CS/LD

DIN

DOUT

VOUTB

GND

VCC

VOUTA

VOUT

8.190

DIN

A

A: V OUTA ≅ 0V B: V OUTA ≅ 2.048V C: V OUTA ≅ 4.095V

4.094

0

–4.096

–8.190

VOUT = 2 VOUTB–VOUTA

100k

10k

–

+LT1077

B

C

A Wide-Swing,Bipolar-Output DAC withDigitally Controlled OffsetFigure 4 shows how to use an LTC1446and an LT1077 to make a wide bipo-lar-output-swing 12-bit DAC with anoffset that can be digitally pro-grammed. VOUTA , which can be set byloading the appropriate digital code

LTC1446, continued from page 17

for DAC A, sets the offset. As thisvalue changes, the transfer curve forthe output moves up and down, asshown in the figure.

ConclusionThe LTC1446 and LTC1446L are theworld’s only DACs that offer dual 12-bit stand-alone performance in an

8-pin SO or PDIP package. Along withtheir amazing density, these DACs donot compromise on performance, of-fering excellent 12-bit DNL and verylow power dissipation. This allowsthe user to use circuit board spacevery efficiently, without sacrificingperformance.


500kHz Buck-Boost ConverterNeeds No Heat Sink by Mitchell Lee

analysis showed that, in spite of the500kHz operating frequency, a highpermeability (µr = 125) Magnetics Inc.Kool Mµ® core exhibited the best effi-ciency when compared to powderediron materials. Copper loss is mini-mized by the use of the high-permKool Mµ material, with only a slightcore-loss penalty.

Maximum available output cur-rent varies with input voltage, and isshown (for 3A peak switch current) inFigure 2. Efficiencies for several in-put voltages are shown in Figure 3. Ata 2.7V input, most of the loss is tiedup in the LT1371 switch, whereas theoutput diode is the dominant sourceof loss with high inputs. Because

+

FBNFB

S/S

NC

OFF ON

SWVIN

2.7V – 20V INPUT

VCGND

LT1371

33µF 20V

OS-CON

L1 HL-8798*

100µF 20V

OS-CON

150µF 6.3V OS-CON5V OUTPUT

3.6kΩ

1.2kΩ

4.7nF

47nF

20kΩ

MBRS340T3

L1 = HURRICANE ELECTRONICS LAB HL-8798 (801) 635-2003, FAX (801) 635-2495

COILTRONICS CTX10-4 (407)241-7876, FAX(407)241-9339

+ +

INPUT (V)

0

1000

500

1500

2000

OUTP

UT (m

A)200 105 15

LOAD (mA)

50

70

60

80

90

EFFI

CIEN

CY (%

)

20000 1000500 1500

VIN = 12V

VIN = 5V

VIN = 2.7V

Figure 1. 5V, 9W converter operates over wideinput range with good efficiency.

Figure 2. Maximum available output current

Figure 3. Efficiency of Figure 1’s circuit

DESIGN IDEAS

DESIGN IDEAS

500kHz Buck-BoostConverter NeedsNo Heat Sink ................. 24Mitchell Lee

Power Management andHigh Efficiency SwitcherMaximize Nine-VoltBattery Life ................... 25Vince Salvidio

Testing and Troubleshootingan IRDA Link Usingthe LT1319.................... 26Frank Cox

The LTC1266 Operatesfrom >12V and Provides 3.3VOut at 12A..................... 30Craig Varga

±12 Volt Outputfrom the LT1377 ........... 32John Seago

The LTC1516 Converts TwoCells to 5V with HighEfficiency at ExtremelyLight Loads ................... 34Sam Nork

Multichannel A/D Uses aSingle Antialiasing Filter...................................... 35Sean Gold and Kevin R. Hoskins

Thanks to an efficient 0.25Wswitch, the LT1371 SEPIC convertershown in Figure 1 operates at fullpower with no heatsink. Up to 9W at5V output is available, and the circuitworks over a wide range of inputvoltages extending from the LT1371’s2.7V minimum to 20V, limited by therating of the capacitors.

A 1:1 bifilar-wound toroid is usedas the magnetic element. A careful

these losses are small, surface mountconstruction provides adequate dis-sipation, eliminating the need forheatsinks.

In this application, the synchroni-zation feature of the LT1371 is notused. When driven with an externalclock signal at the shutdown/syncpin (S/S), the chip can be synchro-nized to any frequency between600kHz and 800kHz.

Kool Mµ is a registered trademark of Magnetics, Inc.



Power Management andHigh Efficiency Switcher MaximizeNine-Volt Battery Life by Vince Salvidio

The LTC1174 (3.3V, 5V and ad-justable versions) can convert a 9Vbattery source to system power withvery high efficiency. Efficiency is over90% at load currents from 20mA to425mA and over 85% at a load cur-rent of 4mA. For a given load,maximum battery life can be obtainedby minimizing shutdown currentduring system shutdown and maxi-mizing converter efficiency duringoperation. A single control line to theLTC1174 can be used to select shut-down mode or operational mode, asrequired.

RUN RUN

5 SEC

TIME

STANDBY* STANDBY0.250A

0

*STANDBY TIME IS LONG IAVG < 5mA

100k

D S Q

R

9V

9V

9V100k

R1 200k

C1 0.1µF

100k

TO CONTROLLER

9V

ANY FRONT PANEL SWITCH

1/2 CD4012

1/2 CD4013

0.22µF22µF*9V+

100k

9V

100k

2N2222 FROM OPEN COLLECTOR OUTPUT OF CONTROLLER 1 = ON, 0 = OFF

5V

100k

9V

TO PIN 1 OF LTC1174

0.0068µF

5V

93.1k

30.9k

FOR MINIMUM RF NOISE USE LTC1174 - ADJUSTABLE WITH ABOVE NETWORK

VINLBIN3 6 7

5

1

84

IPGM

GND SDVOUT

SW

D1 1N5818

L1** 50µH

LTC1174-5 0.1µF 100µF*

5V TO CONTROLS, ETC.

* AVX TPS ** CTX50-4

+

For this circuit, power-up is initi-ated by a low level signal on the NANDgate. This signal could come from anyfront-panel switch or from an exter-nal interrupt signal. The system poweris turned off by means of a low levelsignal from a controller/logic device.In either case, the control signal tothe LTC1174 must be latched. (Alatched turn-off signal ensures aknown state on the LTC1174 shut-down pin during the collapse of the+5V supply.)

The CD4012 and CD4013 are pow-ered from the battery; the 2N2222provides simple level shifting to thebattery rail. R1 and C1 ensure thatthe circuit remains in power-downmode during battery replacement. Thecircuit shown here provides approxi-mately 90% efficiency at 250mA loadcurrent, and consumes less than 1µAshutdown current. Turn-on and turn-off transitions are very clean.

Figure 1. Schematic diagram, high efficiency DC/DC converter

Figure 2. Load profile

DESIGN IDEAS


Testing and Troubleshooting an IRDALink Using the LT1319IntroductionThis Design Idea presents a completeinfrared receiver that transformsmodulated photodiode signals intodigital levels. It is intended to facili-tate the evaluation of the LT1319infrared receiver building block in IRserial communication links. The cir-cuit can be configured for IRDA SIR(InfraRed Data Association SerialInfraRed), IRDA FIR1 (InfraRed DataAssociation Fast InfraRed) or Sharp/Newton modulations with the appro-priate jumpers.

by Frank Cox

LT1319 Receiver DescriptionA block diagram of the LT1319 withthe external filters for IRDA-SIR andSharp/Newton is shown in Figure 1.This diagram is simplified for clarityand shows only the basic compo-nents for IRDA-SIR and Sharpmodulations. The preamp is a lownoise (2pA√Hz), high bandwidth(7MHz) current-to-voltage converterthat transforms the photocurrent to avoltage. The 7MHz bandwidth sup-ports data rates up to 4MBaud. Thelow noise allows for links of 2 metersor more. When full bandwidth is not

required, sensitivity can be increasedby reducing the noise further with alowpass filter on the preamp output.

Encircling the preamp is a loopformed by GM1, CF1, a buffer and RL1.For low frequency signals, the loopforces the output of the preamp to thebias voltage (2V). High frequency sig-nals are unaffected by the loop, so thepreamp output is effectively ACcoupled. The break frequency set byGM1, CF1 and the ratio of RFB to RL1 iseasily modified, since CF1 is a singlecapacitor to ground.

–

+13

DATA L

5V

11

VTH

12

DIG_GND

RC1 500Ω

RG2 1k

RL2 10k

VBIAS

VBIAS

gm 4k

RG1 1k

RFB 15k

DS1

RC2 500Ω

RSC 2k

LOW FREQUENCY COMPARATOR

COMP 1

–

+A3

AV = 20–

+A2

AV = 20–

+ A1 FILTER BUFFER

–

+PREAMP

VTH GEN

RL1 10k

RF1 1k

RF2 1k

RT1 33k

CT1 1µF

RH1 50k

RH2 50k

1

GM2

GM3

–

+10

IRDA-SIR DATA

RC3 500Ω

RG4 1k

RL3 10k

VBIAS

gm 4k

RG3 1k

RC4 500Ω

HIGH FREQUENCY COMPARATOR

COMP 2

–

+A6

AV = 20–

+A5

AV = 20–

+ A4 FILTER BUFFER

1

+–

+

–

gm 4k

GM1

+–

+

+

+

CF1 0.1µF

CB4 1µF

CF4 10nF

CF2 1nF

+

+

+

CF3 100pF

15

5VVCC

16BYPASS

14SHDN

CB2 10µF

+

+

+

CB3 10µF

+

CB1 0.1µF

CF5 3nF

9FILT2

DS2

3FILT1

6

FILTINL

7FILT2L

8

FILTIN

5

VBIAS

4

PREOUT

PHOTO- DIODE

1

AN_GND

1

2INIPD

LF1 100µH

NOTE: EXTERNAL COMPONENTS ARE SHOWN FOR AN IRDA AND SHARP/NEWTON DATA RECEIVER.

SHARP DATA

Figure 1. Block diagram of LT1319 with external filters for IRDA SIR and Sharp modulations

DESIGN IDEAS


After the preamp stage there aretwo separate channels, each contain-ing a high input impedance filterbuffer, two gain stages with lowpassloops, and a comparator. The maindifference between the channels isthe response times of the compara-tors—25ns and 60ns. For modulationschemes with pulse widths down to125ns, the 25ns comparator with itsactive pull-up output stage is ideal.The 60ns comparator with its opencollector output and 5kΩ internal pull-up resistor is suitable for more modestspeeds, such as the 1.6ms pulsesseen with IRDA-SIR.

Buffers A1 and A4 allow the use ofa wide range of external filtering op-tions to optimize sensitivity andselectivity for specific modulationmethods. The external componentsshown are a 4.8MHz lowpass for IRDA-SIR/FIR, formed by RF1 and CF2, anda 500kHz LC tank circuit with a Q of3 for Sharp/Newton, formed by RF2,CF3 and LF1.

The loops containing GM2 and GM3surround the gain stages and func-tion similarly to the preamp loop.

They also provide accurate thresholdsetting at the comparator inputs byforcing the DC level of the differentialgain stages to zero. The threshold isset by the current into pin 11, whichis multiplied by 4 in the VTH generatorand then sunk through RC1 and RC3.For an RT1 of 30kΩ the current intopin 11 is about 130µA. Referred to thefilter buffer inputs, the comparatorthreshold is 0.65mV. The circuit hasjumper-selected capacitors to opti-mize the AC loop highpass filters forthe modulation in use. These and asquelch circuit are not shown here;for complete details see the LT1319data sheet.

Other features of the LT1319 in-clude a shutdown pin that reducesthe supply current from a nominal14mA to 500µA. The shutdown fea-ture is active low. In this circuit, thesupply current in shutdown modealso includes the current in the mode-selection jumpers, which can rangefrom 0mA to 2mA.

To reduce false output transitionsdue to power supply noise, the preampand gain stages have separate analog

grounds and are operated off an in-ternally regulated 4V supply bypassedat pin 16. The comparators, shut-down and threshold circuitry operatedirectly off the 5V supply and arereturned to digital ground. To providea low noise bias point for the amplifi-ers an internal 1.9V reference isgenerated and is bypassed externallyat pin 5.

For more detailed informationabout the LT1319, consult the LT1319data sheet.

FilteringFor IRDA-SIR modulations, thepreamp AC loop is set for a cornerfrequency of less than 1kHz and theRC lowpass section after the preampis set for a break frequency of 4.8MHz.The AC loop highpass on the gainstage for the fast frequency compara-tor is set at 400kHz for SIR and 2.5MHzfor FIR.

The low speed channel has an LCtank circuit with a center frequencyof 500kHz and a Q of 3, which is setby RF2. This forms a bandpass filterfor signals using the Sharp modula-

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

AN_GND

IN

FILT1

PREOUT

VBIAS

FILTINL

FILT2L

FILTIN

BYPASS

VCC

SHDN

DATAL

DIG_GND

VTH

DATA

FILT2

U1 LT1319

RT1 30k

RC4 10k

CB1 0.1µF

CB2 10µF

CB3 10µF

E5 IRDA-SIR/FIR DATA

E4 SHARP OR TV DATA

RC3 10kRC6

1k

D3 BAS16

Q2 MMBT3906LT1

RC5 1M

Q1 MMBT941LT1

E1 SHDN

E3 GND

E2 VCC

VCC

RC2 15k

RC1 2k

CF4 10nFCF2

33pF

CF7 0.1µF

CF6 2.7nF

NOTES: 1. FOR IRDA-SIR/FIR OR TV REMOTE, Q5 SHOULD BE TURNED ON WITH A HIGH LOGIC INPUT 2. FOR IRDA-SIR, Q6 SHOULD BE TURNED ON WITH A HIGH LOGIC INPUT 3. FOR SHARP ASK, CF3 = 1nF, LF1 = 100µH 4. FOR TV REMOTE, CF3 = 33nF, LF1 = 470µH

CF3 1nF

CF5 470pF

CB4 1µF

LF1 100µH

RF1 1k

RF2 1k

CF1 330pF

D1 TEMIC BPV22NF

DGND

AGND

CT1 1µF

Q5 MMBT3904LT1

Q6 MMBT3904LT1

RS2 5.1k

RS1 5.1k

JMP1

SHARP

IRDA

JMP2

FIR

SIR

VCC VCC

11

33

22

D2 HSDL-4220

RD2 6.8Ω 1/2W

VCC

Q3 2N7002

Q4 2N7002

RD1 100Ω

RD3 10k

E6 TX

DRIVER

DGND DGND

Figure 2. Schematic diagram

DESIGN IDEAS


tion. The preamp AC-loop highpasscorner is set to about 200kHz by CF1and the gain stage highpass is set to130kHz.

OperationThe most straightforward way ofevaluating IR links with the LT1319infrared receiver is to have a separateLED transmitter, such as that shownin the upper right-hand corner ofFigure 2, that can be placed a mea-sured distance from the receiver. Thepulses to drive this transmitter canbe obtained from a suitable pulsegenerator that has a TTL output, orfrom the system that will use the IRlink, if available. Use coax cable andplace a suitable termination on theinput of the transmitter board to en-sure good pulse fidelity.

The onboard jumpers should beset for the modulation desired. Forexample, for IRDA-SIR modulationset the IRDA/Sharp jumper to theIRDA side and the SIR/FIR jumper tothe SIR side. Connect an oscilloscopeto the appropriate output of the cir-cuit and apply a 5V power sourcecapable of supplying greater than25mA to the E2 (VCC) and E3 (GND)terminals. Set the transmitter closeto the receiver (~10cm), input an ap-propriate modulated signal to E4 orE5, and verify the basic operation ofthe receiver using the modulationphotographs (Figures, 3, 4 and 5) asa guide.

From here you can test the receiverover the desired range, transmitterpower, angle of incidence or what-ever. It is helpful to set up a space foran optical range that is clear of ob-stacles, reflections and interference.Later, when the basic operation of theIR link is established, the receiver canbe tested against any interferencethat the final system may encounter.For more sophisticated testing a bit-error-rate test (BERT) set is usuallyrequired, as are the circuits to modu-late and demodulate the digitalsignals.

0 1 0 0 1 1 0 1 0

NRZ DATA

IRDA-SIR

DATA RATES: 2400Bd TO 115kBd BIT INTERVAL: 417µs TO 8.7µs PULSE WIDTH: 3/16 OF INTERVAL OR 1.63µs

0 1 0 0 1 1 0 1 0

NRZ DATA

IRDA-FIR

DATA RATES: FIXED AT 1.15MBd BIT INTERVAL: 870ns PULSE WIDTH: 1/4 OF INTERVAL OR 217ns

(3a)

(4a)

DESIGN IDEAS

Figure 3. IRDA-SIR modulation

(3c)

RECEIVER OUTPUT

TRANSMITTER INPUT

IRDA-SIR 1m

(3b)

RECEIVER OUTPUT

TRANSMITTER INPUT

IRDA-SIR 0.5m

RECEIVER OUTPUT

TRANSMITTER INPUT

IRDA-SIR 0.5m

(3d)

RECEIVER OUTPUT

TRANSMITTER INPUT

IRDA-SIR 12cm

(3e)

Figure 4. IRDA-FIR modulation

(4b)

RECEIVER OUTPUT

TRANSMITTER INPUT

IRDA-FIR 1m

RECEIVER OUTPUT

TRANSMITTER INPUT

IRDA-FIR 8cm

(4c)


0 1 0 1 1

DATA RATE: 9600Bd T0 38.4kBd AMPLITUDE SHIFT KEYING ON 500kHz CARRIER A ONE IS ENCODED AS A BURST FROM 52 CYCLES TO 13 CYCLES OF THE CARRIER DEPENDING ON THE MODULATION RATE

IRDA-SIRBecause SIR systems transmit a pulsefor a zero and nothing for a one (referto the IRDA-SIR modulation diagram,Figure 3a), the four photographs dem-onstrating the SIR modulation showa sequence of zeros. In all these pho-tographs the input data to thetransmitter is shown on the bottomand the output of the IR receiver isshown on the top. The Figures 3b and3c show received data at 1m and0.5m. The only difference is a slightincrease of the received pulse width,which presents no problem.

The third photograph of data froma range of 0.5m (Figure 3d) showsextraneous narrow pulses caused byinterference from the Sharp data out-put of the circuit. Because of thesensitivity of the LT1319, transitionson this output can couple back intothe receiver. This problem can beavoided either by shielding this out-put or, if it is not to be used, tying itto ground.

The last photograph in the se-quence (Figure 3e) shows receiver datafrom a range of 12cm. As the range isdecreased from 1m the pulse widthon the output increases, reaching amaximum at this point. Here, asquelch circuit (see data sheet foroperational details) takes over. Even-tually, at very close range, the squelchis overwhelmed and the pulse width

begins to widen again, but at no timeshould the pulse be wider than 8msover the full IRDA range of 1cm to 1m.

IRDA-FIRWith the exception of data rate andpulse width, FIR is very similar to SIR(refer to the FIR modulation diagram—Figure 4a). The same precautionsabout interference from the otheroutput apply to both FIR and SIR.The first FIR photograph shows thereceiver output at a range of 1m. Theoutput pulse is slightly wider thanthe input, but this is acceptable. Asthe range is decreased, the pulsewidth narrows until about 8cm, whereit reaches a minimum. Further de-creasing the range causes the pulseto widen, but to no more than 800nsover the IRDA-FIR operating range of1m to 4cm.

SharpSharp IR modulation encodes a oneas a burst of 500kHz square wavesand a zero as nothing (refer to theSharp modulation diagram, Figure5a). The photographs show a onefollowed by a zero pattern at a modu-lation rate of 38.4kHz (13 cycles ofcarrier). The first photograph (Figure5b) shows data received at a range of2m. Note that there are 14 pulses inthe received burst. An LC tank band-

pass circuit is used to filter the Sharpmodulation in Figure 1’s circuit. Ring-ing in the time-domain response ofthis filter causes the receiver outputto have extra pulses or be otherwisedistorted. The next photograph (Fig-ure 5c), showing data received at 0.5m,has the most pulse distortion. How-ever, the output still does not intrudeinto the next bit interval enough toobscure the difference between a oneor a zero. To ensure correct demodu-lation, a valid zero should have aminimum of 12 pulses. The last pho-tograph (Figure 5d) shows the receiveddata at 1cm, where filter ringingcauses one extra pulse.

ConclusionThe infrared transmission of databetween peripherals is in its infancy.As is usual in the computer world,every manufacturer wants to trans-mit as rapidly as possible. This articlehas presented methods of testing IRtransmission via several modulationschemes. As the technology of IR datatransmission matures, LTC will be atthe forefront with applicationssupport.

Note:1The IRDA prefers the title “High Speed Extension

to SIR” for this modulation.

DESIGN IDEAS

RECEIVER OUTPUT

TRANSMITTER INPUT

SHARP 2m

(5b)

RECEIVER OUTPUT

TRANSMITTER INPUT

SHARP 0.5m

(5c)

RECEIVER OUTPUT

TRANSMITTER INPUT

SHARP 1cm

(5d)

Figure 5. Sharp modulation

(5a)


The LTC1266 Operates From ≥12V andProvides 3.3V Out at 12A by Craig Varga

IntroductionThe LTC1266 synchronous buck con-troller is specified for an absolutemaximum voltage of 20V on either itsVCC input or its gate-drive supply. If itis acceptable to the designer to drivea P-type high-side MOSFET switch,the part will handle input voltages ofup to 18V while providing reasonabledesign margin. However, if the outputcurrent is fairly high, making it desir-able to use an N-type high-sideMOSFET, the highest safe nominalinput is approximately 11V. If 5V isalso available, a bootstrap circuit canbe used to provide high-side gatedrive while maintaining adequate

Figure 1. 12V in to 3.3V out at 12A

DESIGN IDEAS

TDRV

Q4 VN2222LL

Q6 MPS2222

PWRVIN

PINV

BINH

VIN

CT

ITH

SENSE–

1. ALL POLARIZED CAPACITORS ARE AVX TYPE TPS OR EQUIVALENT

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

BDRV

PGND

LBO

U1 LTC1266

LBIN

SGND

E1 S/D

S/D

VFB

SENSE+

C1 1000pF

C13 1µF

C14, 300pF

C3 1000pF

C16 0.1µF

R6 1k

12V

R11 4.3k

R10 220Ω

R10 10k 1%

R9 220Ω

C2 3300pF

R8 51Ω

R12 5.1Ω

R13 1.0Ω

R4 0.015Ω

R5 0.015Ω

R1 100Ω

R2 100Ω

R3 6.04k, 1%

+C7 100µF 16V

+C8 100µF 16V

C17 0.001µF

+C9 100µF 16V

+C10 100µF 16V

+

+

C4 330µF 6.3V

+

C5 330µF 6.3V

+

C6 330µF 6.3V

C15 330µF 6.3V

VOUT

3.3V 12A

+

C11 100µF 16V

+C12 100µF 16V

5Q1

Si4410

Q5 2N3906

6 7 8

1

4

2 3

D1 MBR120T3

D3 MBR0520LT3

5Q3

Si4410 6 7 8

1

4

2 3

5Q2

Si4410 6 7 8

1

4

2 3

D2 MBRS320T3

L1 4µH

design margin on the gate-drive sup-ply. However, if still higher inputvoltages are to be used reliably, thisapproach will no longer prove ad-equate. The simple, low-cost circuitspresented here solve this problem,adding an incremental cost that isprobably less than the cost differencebetween N- and P-type FETs.

Circuit Descriptionand OperationThe design in Figure 1 relies on afloating high-side driver that providesenough gate-drive capability to easilyswitch a large power MOSFET. TheLTC1266 is configured to drive a

P-channel MOSFET by tying pin 3(PINV) to ground. This is requiredbecause there will be a net inversionby the floating driver. Q4 controls thedriver stage and provides gate-dis-charge capability through D3. Whenthe low-side switches are on, C16charges to 12V through D1. When theLTC1266 signals Q1 to turn on, Q4 isturned off. R11 provides base currentfor Q6, which, in conjunction withQ5, acts like an SCR. Once fired, theregenerative behavior of Q5 and Q6rapidly charges the gate of Q1. SinceC16 is referenced to the source of Q1,the top of C16 rises above the 12Vsupply rail as Q1 turns on, forcing


strap supply. Figure 2 shows a 24Vinput design. As the input supplyvoltage is increased, one thing towatch for is the potential for overlapin the high- and low-side turn-on/turn-off transitions. The LTC1266 isdesigned to prevent shoot-throughby actually waiting until the gatevoltage of one switch is low beforeallowing the other switch to be turnedon. Using the floating driver defeatsthis capability, so this condition mustbe checked for. The high-side driveturn-on time may be reduced by low-ering the value of R11. Using a largerdevice for Q4 will speed up the turn-off transition. The value of C16 mayalso need to be a bit larger if R11 isreduced to limit drooping of the boot-strap supply voltage.

Figure 2. 24V in to 3.3V out at 12A

the gate of Q1 to nearly 24V aboveground. When the LTC1266 takes pin1 high, Q4 turns on, pulling chargefrom the gate capacitance of Q1through D3. This back biases thebase-emitter junction of Q6, forcingthe pull-up circuit, and therefore Q1,off.

Since the input voltage is high rela-tive to the output, the nominal dutyfactor of the high-side switch is small(in this case approximately 31%). Asa result, the RMS current through Q1is relatively low. By contrast, the low-side switches are on nearly 70% of thetime, and therefore see a much higherRMS current. This explains whythe low-side switch employs twoMOSFETs, whereas the high-sideswitch uses only one. Schottky diodeD2 is used to help keep the bodydiodes of Q2 and Q3 from turning on

during the short dead time beforeswitching transitions. These body di-odes exhibit relatively long reverserecovery times, contributing to com-mutation losses. The Schottky diodeimproves overall efficiency several per-cent, but the circuit will functioncorrectly without it. Switching lossesin the two low-side switches are nearlyzero, since these devices are turnedon and off into nearly zero volts (theforward drop of the Schottky).

There is no fundamental limitationon how high the maximum input volt-age can be with this approach. Thedrive level shift is limited by the break-down rating of Q4. Obviously, thepower transistors and input capaci-tors must be rated for the intendedinput voltage. A low power 12V sup-ply is needed to provide power for theLTC1266 and voltage for the boot-

DESIGN IDEAS

TDRV

Q4 VN2222LL

Q6 MPS2222

Q7 MPS2222A

PWRVIN

PINV

BINH

VIN

CT

ITH

SENSE–

1. ALL POLARIZED CAPACITORS ARE AVX TYPE TPS OR EQUIVALENT UNLESS NOTED OTHERWISE. 2. L1 CONSISTS OF 15 TURNS OF #16 AWG ON MAG. INC. 77848-A7 Kool Mµ CORE 3. C12 AND C13 ARE PANASONIC TYPE HF OR EQUIV.

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

BDRV

PGND

LBO

U1 LTC1266

LBIN

SGND

E1 S/D

S/D

VFB

SENSE+

C1 1000pF

C11 1µF

C7, 470pF

C3 1000pF

C9 0.1µF

R6 1k

R11 4.3k

R14 20k

R10 220Ω

R7 10k 1%

R9 220Ω

C2 3300pF

R8 51Ω

R12 5.1Ω

R13 1.0Ω, 1/4W

R4 0.015Ω

R5 0.015Ω

R1 100Ω

R2 100Ω

R3 6.04k, 1%

+C12 330µF 35V SEE NOTE 3

C10 0.001µF

+C13 330µF 35V SEE NOTE 3

+

C4 330µF 6.3V

+

C5 330µF 6.3V

+

C6 330µF 6.3V

C15 330µF 6.3V

VOUT

3.3V 12A

+

5Q1

Si4410

Q5 2N3906

6 7 8

1

4

2 3

D2 MBR0520LT3

D4 MBR0540LT3

5Q3

Si4410 6 7 8

1

4

2 3

5Q2

Si4410 6 7 8

1

4

2 3

D1 MBRS340T3

L1 7µH

24V IN

D3 1N759 12V


±12 Volt Output from the LT1377by John Seago

Many applications use positive andnegative voltages, with only one volt-age requiring tight regulation. Often,cost and board space are more impor-tant than regulation of the secondoutput. An equal output of oppositepolarity can be added to a boost con-figuration by means of a negativecharge pump. This two-output con-figuration is shown in Figure 1. The1MHz switching frequency of theLT1377 decreases required boardspace, and the availability of bothpositive and negative feedback ampli-fiers allows regulation of either positiveor negative output.

In the circuit of Figure 1, theLT1377 with L1, D1, D2 and C6 makeup a positive boost circuit. As theinternal power switch in the IC turnson, the voltage at pin 8 goes low andenergy is stored in inductor L1. Whenthe power switch turns off, L1 trans-fers energy through diodes D1 andD2 to capacitor C6 and the positiveoutput load. C6 supplies load currentwhen the power switch is on. Resis-tors R2 and R3 provide feedback fromthe positive output. R1, C3 and C4provide loop compensation. C1 is theinput capacitor and C2 provides localdecoupling for the IC.

The charge pump consists of twocapacitors, two diodes and a smallinductor. When the power switchturns off, L1 also replenishes thecharge on C5, forward biasing D3.When the power switch turns on, thecharge on C5 reverse biases D3, for-ward biases D4 and supplies energyto C7 and the negative output load.L2 attenuates capacitive currentspikes. D2 was added so that thevoltage drop across both D1 and D2would be approximately equal to thesum of the voltage drops of D3, D4and the saturation voltage of the powerswitch in the LT1377. This makesboth output voltages approximatelyequal but opposite in polarity. D1 andD2 can be replaced with a singleSchottky diode if equal outputs arenot required.

Voltage and current waveforms ofthe internal power switch are shownin Figure 2. These measurements weretaken at pin 8 of the LT1377 with thecircuit powered from a 5V supply.Figure 3 shows the ripple voltage fromeach output. The high frequencyspikes can be attenuated with a smallLC filter if necessary.

The circuit of Figure 1 was in-tended to operate from a 5V supply

VIN

L1 10µH

L2 0.047µH

D1 MURS110

R2 86.6k

R3 10k

R1 2k

D2 MURS110

SGND PGND

U1 LT1377

S/S VSW8

5

4

1

2

3

6 7

FB

4V TO 10V INPUT

–12V OUTPUT

12V OUTPUT

C1 10µF 25V Y5U

C5 10µF 25V Y5U

C6 2.2µF 25V Y5U

C7 2.2µF 25V Y5U

D3 MBRS130L

D4 MBRS130L

C2 0.47µF

C3 0.0047µF

C1 = C5 = 1E106ZY5U-C205-M, TOKIN (408) 432-8020 C6 = C7 = 1E225ZY5U-C203. TOKIN (408) 432-8020 L1 = CTX10-1P, COILTRONICS (407) 241-7876 L2 = PM20-R047M, GARRETT (805) 922-0594

C4 0.047µF

NFBVC

+

+

+

+

and provide ±12V outputs at 100mAeach. It operates over an input rangeof 4V to 10V and load current varia-tions from 15mA to 100mA. Theregulated positive output voltage re-mains constant for changes in theinput voltage and load current, whilethe voltage of the unregulated nega-tive output changes as shown inFigure 4. Line and load regulation ofthe unregulated output will improvewith smaller changes of input voltageor load current.

A common requirement is for thepositive output to regulate the major-ity of power while the negative outputsupplies a much smaller, unregu-lated bias current. Measurementstaken on the test circuit of Figure 1showed the unregulated −12V outputhad less than ±1% variation for afixed 15mA load while the input volt-age changed from 4V to 10V with aload current change of 15mA to200mA on the regulated positiveoutput.

Occasionally, it is more importantto regulate the negative output thanthe positive output. The circuit inFigure 5 is the same as that shown inFigure 1, except feedback resistorsR2 and R3 have different values and

Figure 1. Positive output regulated supply

DESIGN IDEAS


INPUT VOLTAGE

–10.75

–11.25

–11.00

–11.50

–11.75

–12.25

–12.00

–12.50

–12.75

–13.00

OUTP

UT V

OLTA

GE

100 2 31 4 5 8 96 7

±15mA LOAD

±50mA LOAD

±100mA LOAD

provide feedback from the negativeoutput to the negative feedback am-plifier of the LT1377. Figure 6 showsthe variation in unregulated positiveoutput for input voltage and loadcurrent variations.

INPUT VOLTAGE

10.75

11.25

11.00

11.50

11.75

12.25

12.00

12.50

12.75

13.00

OUTP

UT V

OLTA

GE

100 2 31 4 5 8 96 7

±100mA LOAD

±50mA LOAD±15mA LOAD

VIN

L1 10µH

L2 0.047µH

D1 MURS110

R3 2.21k

R2 8.25k

R1 2k

D2 MURS110

SGND PGND

U1 LT1377

S/S VSW8

5

4

1

2

3

6 7

FB

4V TO 10V INPUT

–12V OUTPUT

12V OUTPUT

C1 10µF 25V Y5U

C5 10µF 25V Y5U

C6 2.2µF 25V Y5U

C7 2.2µF 25V Y5U

D3 MBRS130L

D4 MBRS130L

C2 0.47µF

C3 0.0047µF

C4 0.047µF

NFBVC

C1 = C5 = 1E106ZY5U-C205-M, TOKIN (408) 432-8020 C6 = C7 = 1E225ZY5U-C203, TOKIN (408) 432-8020 L1 = CTX10-1P, COILTRONICS (407) 241-7876 L2 = PM20-R047M, GARRETT (805) 922-0594

+

+

+

+

Figure 4. Unregulated negative output voltagewith positive output voltage regulated

Figure 6. Unregulated positive output voltagewith negative output voltage regulated

Figure 5. Negative output regulated dual supply

DESIGN IDEAS

Figure 2. Switch voltage and current waveforms0.5µs/DIV

0

0

SWITCHVOLTAGE

5V/DIVPIN 8

SWITCH CURRENT0.5A/DIV

PIN 8

Figure 3. Output ripple voltage

0.5µs/DIV

12V OUTPUTRIPPLE

0.1V/DIVAC

COUPLED

–12V OUTPUTRIPPLE

0.1V/DIVAC

COUPLED


The LTC1516 Converts Two Cellsto 5V with High Efficiency atExtremely Light Loads by Sam Nork

Many battery-powered applicationsrequire very small amounts of loadcurrent from the regulated supplyover long periods of time, followed bymoderate load currents for short pe-riods of time. In these types ofapplications (for example, remotedata-acquisition systems, hand-heldremote controls, and the like), thedischarge rate of the battery is domi-nated by the overall current demandsunder low load conditions. In suchlow load systems, a primary source ofbattery drain is the DC/DC converterthat converts the battery voltage to aregulated supply.

The circuit shown in Figure 1 con-verts an input voltage from two cellsto 5V using a switched-capacitorcharge-pump technique. An integralcomparator on the LT1516 sensesthe output voltage and enables thecharge pump as the output begins todroop. The charge pump’s 2-phaseclock controls the internal switchingof flying caps C1 and C2. (See Figure2.) On phase one of the clock, the

flying caps are connected betweenVIN and GND. On phase two, thenegative plate of C1 is connected toVIN, the negative plate of C2 is con-nected to the positive plate of C1, andthe positive plate of C2 is connectedto the output. During this phase ofthe clock, the potential on the topplate of C2 is approximately 3 × VINand the charge is dumped from C2onto the output cap to raise the out-put voltage. The repeated chargingand discharging of C1 and C2 contin-ues at a nominal frequency of 600kHzuntil the output voltage has risenabove the internal comparator’s trippoint.

When the battery cells are fullycharged (approximately 1.5V per cell,for a nominal 3V VIN), the circuit

+ +

1

8

7

2

C1+

C1–

SHDN

VIN2 CELLS

10µF

C1 = C2 = 0.22µF

10µF

C2C1

LTC1516

ON/OFF

C2+

C2–

GND

VOUT

4

5

6

3VOUT = 5V ±4% IOUT = 0mA TO 20mA

IOUT (mA)

50

80

70

60

90

100

EFFI

CIEN

CY (%

)

1000.01 1.00.1 10

VIN = 2V

VIN = 3VVIN = 2.75V

VIN = 2.5V

VIN = 2.25V

S2A

S2B

S2C

S1A

S1B

S1C

S1D

0.22µF

10µF

0.22µF

C1+

C1–

C2+

C2–

10µF

VOUT

VIN

CHARGE PUMP

operates as a voltage doubler to main-tain regulation. In doubler mode, onlyC2 is charged to VIN and dischargedonto VOUT when the charge pump isenabled. As the batteries dischargeand/or the load increases, the circuitwill change from doubler mode totripler mode. Under light load condi-tions, the part will remain in doublermode until VIN has dropped below2.55V. Under heavier loads, the partwill go into tripler mode at a higherVIN to maintain regulation. By switch-ing operating modes as the VIN andthe load conditions change, theLTC1516 optimizes overall efficiencyfor the life of the batteries. As shownin Figure 3, Figure 1’s circuit achievesbetter than 70% efficiency with loadcurrents from 50µA to 20mA for al-most the entire life of the batteries.

Figure 3. Efficiency versus VOUT for Figure 1’scircuitFigure 1. 2-cell to 5V converter

Figure 2. LT1516 charge pump in triplermode, discharge cycle

DESIGN IDEAS



Multichannel A/D Uses aSingle Antialiasing Filter by Sean Gold and

Kevin R. Hoskins

The circuit in Figure 1 demon-strates how the LTC1594’sindependent analog multiplexer cansimplify the design of a 12-bit dataacquisition system. All four channelsare MUXed into a single 1kHz, fourth-order Sallen-Key antialiasing filter,which is designed for single-supplyoperation. Since the LTC1594’s dataconverter accepts inputs from groundto the positive supply, rail-to-rail opamps were chosen for the filter tomaximize dynamic range. The LT1368dual rail-to-rail op amp is compen-sated for the 0.1µF load capacitors

–

+

–

+

CH0

CH1

CH2

CH3

SHA IN

VREF

COM

GND

VCC

MUX OUT

DIN

CS

CLK

VCC

DOUT

CS

LTC1594

5V

5V

7.5k

7.5k

7.5k

1µF

0.1µF

ANALOG INPUTS

7.5k0.1µF

0.015µF

C1 0.1µF

DATA OUT

CLOCK

DATA IN

CHIP SELECT

0.03µF

C2 0.1µF

0.03µF

0.015µF

1/2 LT1368

1/2 LT1368

(C1 and C2) that help reduce theamplifier’s output impedance andimprove supply rejection at high fre-quencies. The filter contributes lessthan 1LSB of error due to offsets andbias currents. The filter’s noise anddistortion are less than −72dB for a100Hz, 2VP–P offset sine input.

The combined MUX and A/D er-rors result in an integral nonlinearityerror of ±3LSB (maximum) and a dif-ferential nonlinearity error of ±3/4LSB(maximum). The typical signal-to-noise plus distortion ratio is 68dB,with approximately −78dB of total

harmonic distortion. The LTC1594 isprogrammed through a 4-wire serialinterface that allows efficient datatransfer to a wide variety of micro-processors and microcontrollers.Maximum serial clock speed is200kHz, which corresponds to a10.5kHz sampling rate

The complete circuit consumesapproximately 800µA from a single5V supply. For ratiometric measure-ments, the A/D’s reference can alsobe taken from the 5V supply. Other-wise, an external reference should beused.

Figure 1. Simple data acquisition system takes advantage of the LTC1594’sMUX OUT/SHA IN loop to filter analog signals prior to A/D conversion

DESIGN IDEAS


Simple Resistive Surge Protectionfor Interface Circuits by Bryan Nevins

Surges and CircuitsMany interface circuits must survivesurge voltages such as those createdby lightning strikes. These high volt-ages cause the devices within the ICto break down and conduct large cur-rents, causing irreversible damage tothe IC. Engineers must design cir-cuits that tolerate the surges expectedin their environments. They can quan-tify the surge tolerance of circuitry byusing a surge standard. Standardsdiffer mainly in their voltage levelsand wave forms. At LTC, we test surgeresistance using the circuit of Figure1. We describe the voltage wave form(Figure 2) by its peak value VP, the“front time” TF (roughly, the rise time),and the “time to half-value” T1/2(roughly, the time from the beginningof the pulse to when the pulse decaysto half of VP). Surges are similar toESD, but challenge circuits in a dif-ferent way. A surge may rise to 1kV in10ms, whereas an ESD pulse mightrise to 15kV in only a few ns. However,the surge lasts for more than 100ms,whereas the ESD pulse decays inabout 50ns. Thus, the surge chal-lenges the power dissipation ability ofthe protection circuitry, whereas theESD challenges the turn-on time andpeak current handling. The LinearTechnology LT1137A has on-chipcircuitry to withstand ESD pulses upto 15kV (IEC 801-2). This circuitryalso increases the surge tolerance ofthe LT1137A relative to a standard1488/1489.

Designing forSurge ToleranceMany designers enhance the surgetolerance of a circuit by placing atransient voltage suppressor (TVS) inparallel with the vulnerable IC pins,as shown in Figure 3. The TVS con-tains Zener diodes, which break downat a certain voltage and shunt thesurge current to ground. Thus, theTVS clamps the voltage at a level safefor the IC. The TVS, like any protectioncircuitry increases the manufactur-ing cost and complexity of the circuit.Alternately, designers can use a se-ries resistor to protect the vulnerablepins, as shown in Figure 4. The resis-tor reduces the current flowing intothe IC to a safe level. Resistive protec-tion simplifies design and inventoryand may offer lower cost. The resis-tance must be large enough to protectthe IC, but not so large that it de-grades the frequency performance ofthe circuit. Larger surge amplitudesrequire increased resistance to pro-tect the IC. More robust ICs need lessresistance for protection against agiven surge amplitude. Linear’sLT1137A is protected by a muchsmaller resistor than a 1488, as shownin Figure 5. These curves are empiri-cal “rules of thumb.” You should testactual circuits.

The series resistor may have anadverse effect on the frequency per-formance of the circuit. Whenprotecting a receiver, the resistor haslittle effect. Figures 6a and 6b show

the effect of a 600Ω resistor on thedriver-output wave form. A 600Ω re-sistor is adequate for 1kV surges, buthas minimal effect on the driver waveform up to 130kbaud, even with aworst-case load of 3kΩ||2.5nF.

You must choose the series resis-tor carefully to withstand the surge.Unfortunately, neither voltage ratingsnor power ratings provide an adequatebasis for choosing surge-tolerantresistors. Usually, through-hole re-sistors will withstand much larger

DUTCOUT 0.05µF 4kV

C1 7µF 3kV

VP HV SUPPLY

R1 50Ω 3W

R2 75Ω, 2W

RB 10k

Tf CONTROLLED BY R2 × COUT T1/2 CONTROLLED BY C1 × R1 VP SET BY HV SUPPLY

TIME

Tf

T1/2

Tf CONTROLLED BY R2 × COUT T1/2 CONTROLLED BY C1 × R1 VP SET BY HV SUPPLY

VP

VP/2

VOLT

AGE

Tf ~ 10µs T1/2 = 120µs

VCC+1

2

3

4

5

6

7

14

13

12

11

10

9

8

0.1µF 0.1µFVCC–

1488

TVS

TVS

TVS

TVS

Figure 1. LTC surge-test circuit: TF controlled by R2 × COUT; T1/2 controlled by C1 × R1; VP setup by HV supply

Figure 2. LTC surge-test waveform

Figure 3. 1488 line driver with TVS surgeprotection

DESIGN INFORMATION


0.1µF

0.1µF

2 × 0.1µF2 × 0.1µF

0.1µF

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

LT1137A

TO LOGIC

TO LINE

ON/OFF5V

V+

VCC

V–

R1

R1

R1

R1

R1

R1

R1

R1

5V

LT1137A SAFE CURVE 1488 SAFE CURVE

R SERIES (Ω)

0

200

400

600

800

1000

1200

SAFE

SUR

GE V

P (V

)

6000 100 200 300 500400

V–

+

0.1µF

2 × 0.1µF2 × 0.1µF

0.1µF

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

LT1137A

130k baud

5V

ON/OFF5V

V+

VCC

R1

R1

R1

R1

R1

R1

R1

R1

2.5nF 3kΩ

SCOPE

carbon film resistors against surgesup to about 1200V. Unfortunately,using series or parallel combinationsof resistors does not increase the surgehandling as one would expect.

Resistive Surge ProtectionThe LT1137A has proprietary circuitrythat makes it more robust againstESD and surges than the standard

Figure 4. 1137A with resistive surge protection Figure 6a. Testing line driver output wave form

Figure 5. Safe curves for 1488 (SN75188N)and LT1137A. Safe curves represent thehighest VP for which no IC damage occurredafter 10 surges.

surges than surface mount resistorsof the same value and power rating.Typical 1/8 Watt surface mount re-sistors are not suitable for protectingthe LT1137A. If you use surfacemount components, you may needratings of 1W or more. With theLT1137A, you can use carbon film1/4W through-hole resistors againstsurges up to about 900V, and 1/2W

DESIGN INFORMATION

1488/1489. The greater surge toler-ance of the LT1137A makes it practicalto use resistive surge protection, re-ducing inventory and component costrelative to TVS surge protection. Themajor considerations are the surgetolerance required, the resulting resistor value needed, resistor robust-ness and frequency performance.

2V/DIV

Figure 6b. Output wave forms with series resistor

RS = 0Ω130k baud

5µs/DIV RS = 600Ω130k baud

2V/DIV

5µs/DIV


New Device Cameos NEW DEVICE CAMEOS

LT1351: 250µA, 3MHz,200V/µs C-Load™ Op Ampwith ShutdownThe LT1351 is an ideal operationalamplifier for low power applicationsthat also require high speed, low dis-tortion, outstanding output drive, fastsettling or stability with a capacitiveload.

The LT1351 slews at 200V/µs andhas a gain bandwidth of 3MHz whiledrawing a frugal 250µA of supplycurrent. Output drive is not compro-mised: the LT1351 can drive a 1kΩload to ±12V on ±15V supplies or 20Vpeak-to-peak at 20kHz with less than.03% THD + Noise. Settling time is aremarkable 700ns for a 10V step set-tling to 0.1% and 1250ns for 0.01%.The LT1351 is stable with any capaci-tive load, so it is excellent as a bufferor for driving A-to-D converters.

The DC specifications are outstand-ing for an amplifier with such stellarAC credentials. Maximum input speci-fications include 600µV offset voltage,50nA bias current and 15nA offsetcurrent. Voltage gain is 30V/mV mini-mum driving 2kΩ.

The LT1351 is specified for supplyvoltages from ±2.5V to ±15V. The shut-down pin reduces supply current to amere 10µA.

The LT1351 comes in the industrystandard pinout in 8-lead plastic SOand MSOP surface mount packages,as well as the venerable 8-lead mini-DIP.

LT1207 Dual 60MHz, 250mACurrent Feedback AmplifierThe LT1207 is a dual version of theLT1206 high speed current feedbackamplifier. Like the LT1206, each CFAin the dual version has excellent videocharacteristics: 60MHz bandwidth,250mA minimum output-drive cur-rent, 400V/µs minimum slew rate,low differential gain (0.02% typical)and low differential phase (0.17° typi-cal). The LT1207 includes a pin for anoptional compensation network,which can help stabilize the amplifier

for heavy capacitive loads. Both am-plifiers have thermal and current limitcircuits that provide protectionagainst fault conditions. These capa-bilities make the LT1207 well suitedfor driving difficult loads, such ascables in video or digital communica-tions systems.

Operation is fully specified for sup-plies from ±5V to ±15V. Supply currentis typically 20mA per amplifier, andthere are two separate micropowershutdown controls that drop supplycurrent to less than 200µA per ampli-fier. When shut down, the outputsassume high impedance states. Theshutdown controls can also be usedto lower supply current for reduced-bandwidth applications.

The LT1207 is available in a lowthermal resistance, 16-lead SOICpackage. Consult the factory regard-ing industrial grade parts.

LTC1400 Complete SO-8,12-Bit, 400ksps ADCwith ShutdownThe LTC1400 is a complete 2.1µs,400ksps, serial 12-bit A-to-D con-verter that draws only 75mW from 5Vor ±5V supplies. It is the first com-plete 12-bit ADC to be offered in anSO-8 package. This easy-to-use de-vice comes complete with a 200nssample-and-hold and a precisionreference. Unipolar and bipolar con-version modes add to the ADC’sflexibility. The LTC1400 has both Napand Sleep modes. In the Nap mode, itconsumes only 6mW and can wakeup and convert immediately aftershutdown. In the Sleep mode, it typi-cally consumes 30µW. On power-upfrom Sleep mode, a reference-ready(REFRDY) signal is available in theserial data word to indicate that thereference has settled and the chip isready to convert.

The LTC1400 converts 0V to 4.096Vunipolar inputs from a single 5V sup-ply and ±2.048V bipolar inputs from±5V supplies. Maximum DC specs

include ±1LSB INL, ±1LSB DNL and25ppm/°C drift over commercial andindustrial temperature ranges. Out-standing AC performance includes70dB S/(N + D) and 78dB THD at theinput frequency of 100kHz overtemperature.

The 3-wire serial port allows effi-cient data transfers over a compactinterface to a wide range of micropro-cessors, microcontrollers and DSPs.

LT1371 and LT1373:High Frequency, Low SupplyCurrent, High EfficiencySwitching RegulatorsThe LT1371 and LT1373 are mono-lithic, high frequency, current modeswitching regulators. They featurefaster switching with increasedefficiency and use small inductors—4.7µH for the LT1371 or 15µH for theLT1373—and both can be used in allstandard switching configurations,including boost, buck, flyback, for-ward, inverting and “Cuk.” A highefficiency switch is included on thedie, along with all oscillator, controland protection circuitry.

The LT1371 switches at 500kHz,typically consumes only 4mA and hashigher efficiency than previous parts;the LT1373 switches at 250kHz, typi-cally consumes only 1mA and haseven higher efficiency. High frequencyswitching allows small inductors tobe used with both devices. The sur-face mount versions of the LT1371and LT1373 DC/DC converter cir-cuitry consume less than 0.6 squareinches of board space.

New design techniques increaseflexibility and maintain ease of use.Switching is easily synchronized toan external logic-level source. A logiclow on the shutdown pin reducessupply current to 12µA. Unique er-ror-amplifier circuitry can regulatepositive or negative output voltagewhile maintaining simple frequency-compensation techniques. Nonlinearerror-amplifier transconductance re-duces output overshoot on start-up


Burst ModeTM is a trademark of LinearTechnology Corporation. , LT and LTC areregistered trademarks used only to identifyproducts of Linear Technology Corp. Otherproduct names may be trademarks of thecompanies that manufacture the products.

Information furnished by Linear Technol-ogy Corporation is believed to be accurateand reliable. However, Linear Technologymakes no representation that the circuitsdescribed herein will not infringe on existingpatent rights.

For further information on theabove or any of the other devicesmentioned in this issue of LinearTechnology, use the reader servicecard or call the LTC literature ser-vice number: 1-800-4-LINEAR. Askfor the pertinent data sheets andapplication notes.

NEW DEVICE CAMEOS

or overload recovery. Oscillator fre-quency shifting protects externalcomponents during overloadconditions.

The LT1371 is available in SO,7-lead TO220 and DD packages; theLT1373 is available in 8-pin SO orDIP packages.

LT1501: Adaptive-FrequencyCurrent Mode, MicropowerSwitching Regulator

The LT1501, LT1501-3.3 andLT1501-5 are adaptive-frequency cur-rent mode, step-up switchingregulators with internal loopcompensation. In contrast with pulse-skipping type switching regulators,this family uses a current mode to-pology that provides low noiseoperation and excellent system per-formance. The LT1501 family alsofeatures a low battery comparatorand light-load Burst Mode operation.

The LT1501 has a 750mA powerswitch and can be set to operate atfrequencies up to 600kHz. This fam-ily of devices can operate from supplyvoltages as low as 1.8V. The quies-cent current of 160µA can be furtherreduced to 6µA in shutdown mode.

Available in 8-pin SO packaging,the LT1501 is a versatile switcherfamily featuring both current modeperformance and simple systemdesign.

LTC1538-AUX/LTC1539:High Efficiency DualSynchronous DC/DCControllers for Portable andNotebook ComputerApplicationsThe LTC1538-AUX/LTC1539 are dualsynchronous step-down switchingregulator controllers that drive exter-nal N-Channel power MOSFETs in afixed-frequency architecture. TheLTC1539 Adaptive Power™ outputstage drives synchronous N-ChannelMOSFETs at high currents, andswitches to a low power output stageat low currents to maintain high effi-ciency without resorting to variablefrequency operation. The LTC1538-AUX employs Burst Mode operation

at low currents to achieve low quies-cent current.

Key features that distinguish theLTC1538-AUX/LTC1539 from thesimilar LTC1438/LTC1439 devicesare the circuits that remain activeeven when both of the switching con-trollers are shut down—a 5V linearregulator (LTC1538-AUX andLTC1539) and a voltage comparator(LTC1539 only). The 5V regulator iscapable of supplying 25mA (typical)with a dropout of less than 0.5V whileexhibiting an output impedance ofless than 1Ω. The comparator has itspositive input tied to the 2% accurate,internal 1.19V voltage reference. ACMOS open-drain output can be ex-ternally pulled up to a power supplyof 12V or less and can sink more than10mA. The standby supply currentwith the 5V linear regulator and volt-age comparator active is only 50µA.

An auxiliary 0.5A linear regulator,available in both the LTC1538-AUXand LTC1539, uses an external PNPpass device to provide a low noise, lowdropout 12V or adjustable output.This same regulator can be config-ured to provide a linear 3.3V to 2.9V/3A supply with the addition of a lowsaturation NPN pass device. A sec-ondary feedback control pin, SFB,guarantees regulation on secondarywindings regardless of the primaryload by forcing continuous operationas required.

Internal resistive dividers providepin-selectable output voltages of 3.3Vand 5V on the first controller of bothdevices. The second controller in theLTC1539 can be programmed to 3.3V,5V or adjustable according to theconnection of the VPROG pin, whereasthe second controller in the LTC1538is adjustable.

The LTC1539 features a phase-locked loop (PLL) for synchronizationto an external source, and a power-on reset timer (POR) that generates asignal delayed by 65536/FCLK (typi-cally 300ms) after the output is within7.5% of the regulated output voltage.The LTC1539 is further differentiatedfrom the LTC1439 by the fact thatPOR monitors the first controllerrather than the second.

The operating current levels areuser programmable via external cur-rent sense resistors. A wide inputsupply range allows operation from3.5V to 36V (maximum). TheLTC1538-AUX is available in a 28-pinSSOP package and the LTC1539comes in a 36-pin SSOP.

LTC7545A:Multiplying 12-Bit DACThe LTC7545A is a 4-quadrant mul-tiplying, current-output 12-bit DAC.It is a superior, pin-compatible re-placement for the industry standardAD7545A. It has improved accuracyand stability, reduced sensitivity toexternal amplifier VOS, lower outputcapacitance and reduced cost.

The LTC7545A has a parallel 12-bit-wide microprocessor-compatibleinterface. This DAC has excellent ac-curacy and stability, with INL andDNL guaranteed at 1/2 LSB MAXover temperature. Gain error is 1 LSBMAX, eliminating adjustments in mostapplications. Typical applications areprocess control, and software pro-grammable gain, attenuation andfiltering.

The LTC7545A comes in 20-pin SOand PDIP packages and is available incommercial and industrial tempera-ture grades.


AppleTalk is a registered trademark of Apple Computer, Inc.

© 1996 Linear Technology Corporation/ Printed in U.S.A./34K

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DESIGN TOOLSApplications on DiskNOISE DISKThis IBM-PC (or compatible) progam allows the user to calculate circuit noiseusing LTC op amps, determine the best LTC op amp for a low noise application,display the noise data for LTC op amps, calculate resistor noise, and calculatenoise using specs for any op amp. Available at no charge.

SPICE MACROMODEL DISKThis IBM-PC (or compatible) high density diskette contains the library of LTCop amp SPICE macromodels. The models can be used with any version ofSPICE for general analog circuit simulations. The diskette also containsworking circuit examples using the models, and a demonstration copy ofPSPICETM by MicroSim. Available at no charge.

Technical Books1990 Linear Databook • Volume I — This 1440 page collection of data sheetscovers op amps, voltage regulators, references, comparators, filters, PWMs,data conversion and interface products (bipolar and CMOS), in both commer-cial and military grades. The catalog features well over 300 devices. $10.00

1992 Linear Databook Supplement — This 1248 page supplement to the1990 Linear Databook is a collection of all products introduced since then.The catalog contains full data sheets for over 140 devices. The 1992 LinearDatabook Supplement is a companion to the 1990 Linear Databook, whichshould not be discarded. $10.00

1994 Linear Databook • Volume III — This 1826 page supplement to the1990 Linear Databook and 1992 Linear Databook Supplement is a collectionof all products introduced since 1992. A total of 152 product data sheets areincluded with updated selection guides. The 1994 Linear Databook Volume IIIis a supplement to the 1990 and 1992 Databooks, which should not bediscarded. $10.00

1995 Linear Databook • Volume IV — This 1152 page supplement to the1990, 1992 and 1994 Linear Databooks is a collection of all products introducedsince 1994. A total of 80 product data sheets are included with updatedselection guides. The 1995 Linear Databook Vol IV is a companion to the 1990,1992 and 1994 Linear Databooks, which should not be discarded. $10.00

Linear Applications Handbook • Volume I — 928 pages full of applicationideas covered in depth by 40 Application Notes and 33 Design Notes.This catalog covers a broad range of “real world” linear circuitry. In addition todetailed, systems-oriented circuits, this handbook contains broad tutorialcontent together with liberal use of schematics and scope photography.A special feature in this edition includes a 22 page section on SPICEmacromodels. $20.00

1993 Linear Applications Handbook • Volume II — Continues the streamof “real world” linear circuitry initiated by the 1990 Handbook. Similar in scopeto the 1990 edition, the new book covers Application Notes 41 through 54 andDesign Notes 33 through 69. Additionally, references and articles from non-LTC publications that we have found useful are also included. $20.00

Interface Product Handbook — This 424 page handbook features LTC’scomplete line of line driver and receiver products for RS232, RS485,RS423, RS422, V.35 and AppleTalk applications. Linear’s particularexpertise in this area involves low power consumption, high numbers ofdrivers and receivers in one package, mixed RS232 and RS485 devices, 10kVESD protection of RS232 devices and surface mount packages.

Available at no charge.

SwitcherCAD Handbook — This 144 page manual, including disk, guidesthe user through SwitcherCAD—a powerful PC software tool which aids in thedesign and optimization of switching regulators. The program can cut days offthe design cycle by selecting topologies, calculating operating points andspecifying component values and manufacturer's part numbers. $20.00

1995 Power Solutions Brochure, First Edition — This 64 page collectionof circuits contains real-life solutions for common power supply designproblems. There are over 45 circuits, including descriptions, graphs andperformance specifications. Topics covered include PCMCIA power manage-ment, microprocessor power supplies, portable equipment power supplies,micropower DC/DC, step-up and step-down switching regulators, off-lineswitching regulators, linear regulators and switched capacitor conversion.

Available at no charge.

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InternationalSales Offices

World Headquarters

U.S. AreaSales OfficesCENTRAL REGIONLinear Technology CorporationChesapeake Square229 Mitchell Court, Suite A-25Addison, IL 60101Phone: (708) 620-6910FAX: (708) 620-6977

NORTHEAST REGIONLinear Technology Corporation3220 Tillman Drive, Suite 120Bensalem, PA 19020Phone: (215) 638-9667FAX: (215) 638-9764

Linear Technology Corporation266 Lowell St., Suite B-8Wilmington, MA 01887Phone: (508) 658-3881FAX: (508) 658-2701

NORTHWEST REGIONLinear Technology Corporation782 Sycamore Dr.Milpitas, CA 95035Phone: (408) 428-2050FAX: (408) 432-6331

SOUTHEAST REGIONLinear Technology Corporation17000 Dallas ParkwaySuite 219Dallas, TX 75248Phone: (214) 733-3071FAX: (214) 380-5138

Linear Technology Corporation5510 Six Forks RoadSuite 102Raleigh, NC 27609Phone: (919) 870-7834FAX: (919) 870-8831

SOUTHWEST REGIONLinear Technology Corporation21243 Ventura Blvd.Suite 227Woodland Hills, CA 91364Phone: (818) 703-0835FAX: (818) 703-0517

Linear Technology Corporation15375 Barranca ParkwaySuite A-211Irvine, CA 92718Phone: (714) 453-4650FAX: (714) 453-4765

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