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IN THIS ISSUE . . . The LT1158: Low Voltage,N-Channel Bridge DesignMade Easy

Protection from over-current faultsis essential in any high current system.The LT1158 protects the top MOSFETfrom shorts to ground, or shorts acrossthe motor in a full-bridge circuit. Theflexibility of the LT1158 protection cir-cuitry allows the bridge designer highinrush current capability along withself protection and automatic reset inthe event of a short.

Life Above The Supply RailThe first problem designers face in

N-channel half-bridge circuits is de-veloping the top-side gate drive, whichmust swing at least 10V above thesupply rail for standard MOSFETs (andmust remain there for dc operation).This challenge alone is so demandingthat designers often resort to moreexpensive and less efficient P-channel

by Milton Wilcox

continued on page 3

Synchronous control of two N-chan-nel power MOSFETs operating from5V to 30V has just become consider-ably easier. The new LT1158 half-bridge driver effectively deals with themany problems and pitfalls encoun-tered in the design of high efficiencymotor control and switching-regula-tor circuits (see Table 1). This articlewill discuss these problems, alongwith the solutions afforded to thebridge designer by the LT1158.

LT1158 OverviewFigure 1 is a block diagram of the

LT1158. A single input pin controlsswitching of both N-channelMOSFETs; all timing and protectionfunctions are performed by theLT1158. Pulling the enable pin lowactively holds both MOSFETs off andreduces supply current to 2mA. Theoutput pins have been arranged forease of PC board layout.

Bipolar technology was chosen foroperation to 30V (36V absolute maxi-mum) due to its inherent junction break-downs of greater than 60V. This isparticularly important in an N-channeltop-side driver, which must operateabove the supply rail. Bipolar technol-ogy also provides consistent drive ca-pability: the LT1158 switches 3000pFin 150ns, but at 10,000pF this onlyincreases to 250ns, making operationto 50kHz possible with the largestMOSFETs. And, unlike CMOS drivers,these transition times are maintainedover the entire supply range.

COVER ARTICLEThe LT1158: Low Voltage,N-Channel Bridge Driver ... 1Milton Wilcox

Editor's Page ..................... 2Richard Markell

DESIGN FEATURESThe LTC1096/1098:Micropower, SO-8 ADCs ..... 6William Rempfer

The LT1432: 5-Volt RegulatorAchieves 90% Efficiency .. 12Carl Nelson

The LTC1156 Quad High-Side MOSFET Driver ........ 13Tim Skovmand

The LT1103/1105 Family ofOffline Switching Regulators........................................ 14Anthony Bonte

The LT1124/1125: What’sNew in Precision, High-speedOp Amps .......................... 18Alexander Strong

DESIGN IDEASIntroducing the LTC1292:12-Bit, 8-Pin, Serial-I/O DataAcquisition System ......... 20Sammy Lum

DC-Accurate, ButterworthLowpass Filter Requires NoOn-Board Clock ............... 22Richard Markell

New Device Cameos ......... 23LTC Marketing

• MOSFET gate-voltage overstress• Top-side drive starvation at high duty

cycles• DC operation of N-channel top side

MOSFET• Cross-conduction, or “shoot-through”

currents• Output transients below ground and

above supply• Protection against short circuits• Starting high in-rush current loads

Table 1. Major pitfalls encountered insynchronous MOSFET driver designs

FEBRUARY 1992 VOLUME II NUMBER 1

LINEAR TECHNOLOGY LINEAR TECHNOLOGY LINEAR TECHNOLOGY

2 Linear Technology Magazine Vol. 2, No. 1, February 1992

DESIGN FEATURES

A Bunch of Guys with Funny NamesWrite About Elegant Integrated Circuits

With this issue we begin our secondvolume of the magazine Linear Tech-nology. The first two issues were quitea learning experience both about theprocess of engineering and about theprocess of desktop publishing. As theissues and volumes roll along, moredesigners will become writers and,perhaps a few writers will becomebetter engineers.

This issue is the largest issue yet.The topics in this issue range frommicropower A/D converters to offlineswitching regulators with a fewswitched capacitor filter applicationsalso. This issue is heavily focused onpower-control devices, ranging fromthe LT1158 half-bridge MOSFET driverto the 1103/1105 family of offlineswitching regulators and the LT1432switching regulator controller.

Power-control and power-supplyICs have been the focus of much at-tention at Linear Technology recently.

by Richard Markell

Issue HighlightsMilt Wilcox headlines this issue

with his article on the LT1158 half-bridge MOSFET driver. This part is asignificant addition to the new line ofpower control circuits that Milt isdeveloping with his group. Milt hasmany years of experience designingRF and video circuits as well as con-sumer IC’s. He holds more than 25patents. Milt has been known to spendweekdays finessing the ultimate per-formance from a circuit design whilespending the occasional weekend driv-ing fast cars on an open track.

Tony Bonte describes the architec-ture of his LT1103 offline switchingregulator in his design feature. The

LT1103 is another major designachievement for Linear Technology.Tony has designed all flavors of linearintegrated circuits in his eight-yearcareer. His interests include tennisand making handcrafted bread. Canwe get an engineering sample of thebread Tony?

Carl Nelson describes the LT1432switching regulator controller. Thispart allows 5 volt regulators to achieve90% efficiency. Carl is employee num-ber 11 and one of the founders of LTC.Carl wastes enormous amounts oftime restoring his Victorian home.

Alexander Strong describes thenew low-noise operational amplifiers,the LT1124, 25, 26, and 27. These

amplifiers challenge the industry stan-dard OP-27 and improve upon itsnoise performance. Alex is a Vermontnative who has been designing analogintegrated circuits for over 14 years.

Sammy Lum introduces theLTC1292 serial I/O, 12-bit data ac-quisition system. The LTC1292 is an8-pin, differential-input, CMOS ana-log-to-digital converter, which is quiteeasy to use. Sammy designed the12-bit A/D series which includes theLTC1290 through 1294 and theLTC1296. He has been designing inCMOS since 1979.

Tim Skovmand and Willie Rempferwere contributors to the last issue.

From the manufacturer’s point of view,power ICs are a difficult topic. This isless a result of the difficulties of theintegrated circuit design than of thehost of peripheral parts that are gen-erally required. The customer mustnot only design the application cir-cuit, but must, in many cases, designthe magnetics necessary to make theIC perform as specified. This is not thecase with the ICs available from LTC.LTC offers power-control devices rang-ing from micropower DC-DC convert-ers (the LT1073 family), to high-power,high-efficiency switching regulators(the LT1070/1170/1270 families),with a full selection of devices in be-tween. In addition, every circuit pub-lished by LTC has specified magneticscomplete with part numbers.

The difficulties of power-supplydesign, though not insignificant, aresignificantly reduced by the availabil-ity of fully specified and testedmagnetics. We at LTC endeavor to

offer the user not only the IC, but fullyspecified and tested magnetics. Thismakes the use of the integrated circuiteasier and allows significant costsavings by placing the power supplycompletely under the control of theequipment designer. We know that itis difficult to design power suppliesand their required magnetics, so weprovide whatever kind of support isrequired. We have in-house magnet-ics-design expertise and we aredeveloping software to assist in thedesign of switching power supplies.We are here to help.

This issue will be mailed to thesubscription list which we collectedfrom the response cards bound intothe last two issues. If you are noton the mailing list and would like tobe, please return the response cardbound into this issue, or call yourlocal sales office or the factory.

EDITOR'S PAGE

Linear Technology Magazine • February 1992 3

DESIGN FEATURES

LT1158 continued from page 1

continued on page 4

MOSFETs on the top side in low voltagebridge circuits. However, even thissolution is no longer straightforwardwhen the supply voltage exceeds themaximum gate-to-source voltage (VGS)rating for the MOSFET (typically 20V).

The best solution to this problem isto use a floating top-side N-channelgate driver operating from a bootstrapcapacitor. Although widely used, thetechnique of bootstrapping must becarefully implemented, since the gatevoltage applied to the top MOSFETderives directly from the voltage on thebootstrap capacitor. If this voltage be-comes either too high or too low, it cancause problems for the MOSFET. Forexample, if the bootstrap supply isreferenced to ground, but the bottomof the capacitor is swinging belowground due to output transients, the

capacitor can become overcharged. Onthe other hand, if at high duty cyclesthe output is not swinging low enoughto fully recharge the capacitor, thenthe top-side gate drive will be starved,leading to over dissipation.

In the LT1158, the internal chargepump and boost regulator have beendesigned to prevent both under- andover-drive of the top-side gate, regard-less of the input duty cycle—up to andincluding 100% (DC). With the LT1158,using N-channel MOSFETs becomesas painless as using P-channels.

Shoot-Through Unwelcome

Probably the most frustrating ele-ment to address in a synchronousMOSFET drive circuit is the timingbetween the top and bottom drives to

prevent cross-conduction. Although thepresence of cross-conduction or “shoot-through” currents can lead in extremecases to catastrophic heating, it usu-ally causes only a puzzling reduction ofseveral percent in efficiency. Sinceefficiency is the reason for using syn-chronous switching in the first place,it’s rather frustrating when it keepsslipping through your (hot) fingers.

Present techniques rely on fixed de-lay times to create a dead-time be-tween conduction of the top and bottomMOSFETs. Although this can be madeto work, the delay time must take intoaccount temperature changes, supplyvariations, and production tolerancesof the MOSFETs and other compo-nents. And if the driver can’t hold thegate low against output-voltage

–

+

–

+

V+

RGATE

BOOTSTRAP CAPACITOR

BOOST DRIVE

BOOST

DRIVE

FEEDBACK

SENSE +

SOURCE

SENSE –

DRIVE

FEEDBACK

RSENSETO LOAD

RGATEBOT. GATE DR.

CURRENT LIMIT

TOP GATE DR.

CHARGE PUMP/ BOOST REG.

CONTROL LOGICINPUT

DC-100kHz

FAULT

CEN

ENABLE

1158_1. eps

Figure 1. LT1158 block diagram with pins shown in actual package sequence


DESIGN FEATURES

OUTPUT CURRENT (A)

075

EFFI

CIEN

CY (%

)

80

85

90

95

2 4 8 10

1158_3. eps

6

Schottky diode across the bottomMOSFETs reduces reverse-recoverylosses. Figure 3 shows the operatingefficiency for the Figure 2 circuit.

Switching regulator applications cantake advantage of an important pro-tection feature of the LT1158: remotefault sensing. By sensing the currenton the output side of the inductor andreturning the LT1158 fault pin to thePWM soft-start pin, a true current-mode loop is formed. The Figure 2circuit regulates maximum current inthe inductor to 15A with no outputvoltage overshoot upon recovery froma short circuit.

Designing in RuggednessThe output of a bridge circuit driv-

ing multiple-ampere inductive loadscan be a very ugly signal to coupleback into a hapless IC. AlthoughMOSFETs contain integral catch di-odes which conduct during the dead-time, slow turn-on times and wiringinductances can result in spikes ofseveral volts below ground or abovesupply. The LT1158 source pin andboth sense pins have been designed totake repetitive output transients 5Voutside the supply rails with no dam-age to the part. This saves the expense

slew-rate-induced currents, transientshoot-through will occur.

The LT1158 uses an adaptive sys-tem that maintains dead-timeindependent of the type, the size, andeven the number of MOSFETs beingdriven. It does this by monitoring thegate turn-off to see that it has fullydischarged before allowing the oppo-site MOSFET to turn on (see Figure 1).During turn-on, the hold-off capabil-ity of the opposing driver is boosted toprevent transient shoot-through. Inthis way, cross-conduction is com-pletely eliminated as a design con-straint.

The high efficiency 10A step-down(buck) switching regulator shown inFigure 2 illustrates how different sizedMOSFETs can be used without havingto worry about shoot-through cur-rents. Since 24V is being droppeddown to 5V, the duty cycle for theswitch (top MOSFET) is only 5/24 or21%. This means that the bottomMOSFET will dominate the RDS(ON) effi-ciency losses, because it is turned onnearly four times as long as the top.Therefore a smaller MOSFET is usedon the top, and the bottom MOSFET isdoubled up, all without having to worryabout dead-time. The non-critical

of adding high current Schottky diodeclamps.

MOSFET protection schemes usu-ally rely on detecting either excesscurrent or excess drain-to-sourcevoltage (VDS). The LT1158 current-limit strategy combines the best fea-tures of current sensing and VDSsensing. Current limit is set by thevoltage drop across the current shuntRSENSE, shown in Figure 1. However,as long as the voltage drop across thetop MOSFET and RSENSE is less than1.2V (representing a relatively low dis-sipation state for the MOSFET), highercurrent is allowed to flow. This allows

Figure 3. Operating efficiency for Figure2 circuit. Current limit is set at 15A


VREF

VC

COMP

LT3525

1158_2. eps

0.1µF

BST DR

B DR

FAULT

LT1158

30kΩ

+

+

4.7kΩ+

+

+

–

7mΩL1*

70µH 5V/10A OUT

(2) 1000µF LOW ESR

MBR340

(2) IRFZ44

*1 1/4" MP CORE 14GA WIRE

24V IN

IRFZ34

1N4148

(2) 500µF LOW ESR

B FB

SEN–

SEN+

SRC

T FB

T DR

IN

BST1N4148

1N4148

INVNI

A

B

SOFT-ST

0.1µF

4.7kΩ

1µF

0.01µF

2.4kΩ

+5µFfOSC = 25kHz

10kΩ

Figure 2. 50W high efficiency switching regulator illustrates the design ease afforded by adaptive dead-time generation


DESIGN FEATURES

Figure 4b. Proection logic stops motor if either side is shorted to ground

1158_4A. eps

0.1µF

B DR

LT1158

+

BAT85

IRFZ34

10V-30V

IRFZ34

1N4148

(2) 500µF LOW ESR

B FB

SEN–

SEN+

SRC

T FB

T DR

BSTBST DR 15Ω

15Ω

15mΩ

2.4k 2.4k

15mΩ

0.1µF 1N4148

BAT85

IRFZ34 15Ω

B DR

LT1158

B FB

SEN–

SEN+

SRC

T FB

T DR

BST BST DR

IRFZ34 15Ω

ININ

1/2 74HC132

PWM INPUT

Figure 4a. 10A locked anti-phase full-bridge circuit operates over wide supply range

to allow it to serve as a protectiontimer. With the fault and enable pinsconnected, the LT1158 will shut downboth MOSFETs in the event of a faultand retry each time the enable capaci-tor CEN recharges by 1.5V.

The flexibility of the LT1158 currentlimit allows other protection schemesto be implemented. Figure 4 illustratesa locked anti-phase motor drive inwhich the motor stops if either side isshorted to ground (since a 50% inputduty cycle is used to stop the motor innormal operation, the motor wouldaccelerate to half speed with one sideshorted). When a fault is detected byeither LT1158, the Figure 4b latch is

long time constant, high-inrush loads,such as high-inertia motors, to bestarted. When the voltage drop acrossRSENSE exceeds 110mV with more than1.2V across the MOSFET (as in thecase of a short), the fault pin conducts.

If both the input and enable pinsremain high during a short, the LT1158regulates the top MOSFET current to avalue of 150mV/RSENSE while awaitinga shutdown command. Shutdown canbe performed by an external controller,or it can be performed locally by con-necting the fault pin to the enable pin(as in Figure 1). The LT1158 enable pinhas been designed with 1.5V of hyster-esis and a 25µA pull-up current source

set, disabling both LT1158s. The cir-cuit periodically tries restarting themotor at a time interval determined byRT and CT. If the short still exists, thedisabled state is resumed within 20µs,far too short a time to move the motor.

The LT1158 can be used with virtu-ally any N-channel power MOSFET,including 5-lead, current-sensingMOSFETs. This configuration offersthe benefit of lossless current sensing,since a current shunt is no longerneeded in the source. In addition,RSENSE increases by a factor of 1000 ormore: from milliohms to ohms. TheLT1158 can also be used with logic-level MOSFETs for operation as low as4.5V if a Schottky boost diode is usedand connected directly to supply.

ConclusionThe LT1158 N-channel power

MOSFET driver anticipates all of themajor pitfalls associated with the de-sign of high efficiency bridge circuits.The designed-in ruggedness and nu-merous protection features make theLT1158 the best solution for 5 to 30V,medium-to-high-current synchronousswitching applications.

0.01µF

1/2 74HC132

5k

+5V

FROM LT1158 FAULT PINS

CT 0.1µF

1N4148

RT 150k

TO LT1158 ENABLE PINS

1158_4B. eps


DESIGN FEATURES

Figure 1. Micropower design of the ADC’s BiCMOS comparator achieves a 33kHzsample rate on 100µA of supply current. Automatic power shutdown between conver-sions saves power as sample rate is reduced

The LTC1096/1098: Micropower,SO-8 Packaged ADCs Draw 100µA at33kHz, 3µA at 1kHz by William Rempfer

LTC’s new 8-bit micropower,switched-capacitor ADCs typicallydraw only 100µA of supply currentwhen sampling at 33kHz. Supply cur-rent drops linearly as the sample rateis reduced. At a 1kHz sample rate, thesupply current is 3µA. The ADCs au-tomatically power down, drawing onlyleakage current when not performingconversions. They are packaged in 8-pin SO packages and operate on 3Vto 9V supplies or batteries. Both arefabricated in Linear Technology’s pro-prietary LTBiCMOSΤΜ process.

MICROPOWER, SO-8,SAMPLING 8-BIT ADCs

As Figure 1 shows, both theLTC1096 and the LTC1098 comprisean 8-bit, switched-capacitor ADC, asample-and-hold, and a serial port.With typical operating currents of100µA and automatic shut-down be-tween conversions, they achieveextremely low power consumptionover a wide range of sample rates (seeFigure 2). As the sample frequencydecreases, the current drain drops.Even lower power consumption canbe achieved by operating the ADCs

1096_1. eps

+

–

MICROPOWER COMPARATOR

S A R

CAPACITIVE DAC

IN+ (CH0)

IN– (CH1)

BIAS AND SHUTDOWN CIRCUIT

SERIAL PORT

VCC (VCC /VREF) CS CLK

DOUT

VREF (DIN)GNDPIN NAMES IN PARENTHESES REFER TO THE LTC1098.

CSAMPLE

I CC,

TYP

(µA)

100

30

3

0.3100 1k 10k 33k

SAMPLE RATE (Hz)1096_2. eps

on a 3V supply. The LTC1096 oper-ates from single 3V to 9V suppliesand the LTC1098 operates from 3V to6V supplies.

Both devices can sample at rates ofup to 33kHz. Figure 3 shows remark-able sampling performance for a de-vice that draws only 100µA runningat full speed. Dynamic accuracy of7.5 bits is maintained up to an inputfrequency of 40kHz.

Although they share the same ba-sic design, the LTC1096 and 1098differ in some respects. The LTC1096has a differential input and has anexternal-reference input pin. It canmeasure signals floating on a DCcommon mode voltage and can oper-ate with reduced spans down to250mV. Reducing the span allows itto achieve 1mV resolution. TheLTC1098 has a two-channel inputmultiplexer and can converteither channel with respect to groundor the difference between the two.

Figure 2. Automatic power shutdownbetween conversions allows power con-sumption to drop with sample rate

(LTBiCMOS is a trademark of Linear TechnologyCorporation.)


DESIGN FEATURES

Figure 3b. Dynamic accuracy is main-tained up to an input frequency of 40kHz

Figure 3a. This clean FFT of an 11.8kHzinput shows remarkable performance foran ADC that draws only 100µA whensampling at its maximum 33kHz rate

continued on page 8

BENEFITS OF THELTC1096/98

Lower System Cost

Table 1 summarizes the features ofthe LTC1096 and LTC1098. These fea-tures can reduce system cost in sev-eral ways. Single-supply operationmeans no additional supplies areneeded to power the device. It runsright off the logic supply (5V or 3.3V).In battery-powered systems, it caneliminate the need for a voltage regula-tor by running straight off the battery.The internal sample-and-hold savesthe cost of an external sample-and-hold in sampling systems.

Cheaper, Simpler Power Supplies

A cheaper and simpler power sup-ply can be designed because of the lowsupply current and wide supply-volt-age range. For example, a simplecapacitive charge pump can provide afloating supply for the device, as shownin Figure 8. The on-chip sample-and-hold saves the power consumption andextra supply voltages required byexternal sample-and-holds.

Longer Battery Life

Tremendous gains in battery life arepossible because of the wide supply-voltage range, the low supply current,and the automatic power shut-downbetween conversions. Eliminating thevoltage regulator and operating directlyoff the battery saves the power lost inthe regulator. At a sample rate of 1kHz,the LTC1096/8 draws only 3µA ofsupply current. This is below the self-discharge rate of many batteries. As anexample, the circuit of Figure 4a, sam-pling at 1kHz, will run off a PanasonicCR1632 3V lithium coin cell for fiveyears.

The automatic shutdown has greatadvantages over the alternative of high-side switching a higher power ADC, asshown in Figure 4b. First, no switchingsignal or hardware is required. Sec-ond, power consumption is orders ofmagnitude lower with the LTC1096/8.This is because, when an ADC is high-side switched, the current consumedin charging the required bypass ca-pacitor is large, even at very low sample

rates. In fact, a 10µF bypass capacitor,high-side switched at only 10Hz, willconsume 500µA!

Smaller Instrument Size

The LTC1096/8 can save boardspace in compact designs in a numberof ways. The ADC comes in an SO-8package. No external sample-and-holdis needed. The serial I/O requires fewerPC traces and fewer microprocessorpins than a parallel-port ADC. Thehigh-impedance analog inputs and thereduced span capability can eliminateop amps and gain stages for manysensors.

In addition to eliminating op ampsin many cases, the differential inputsallow the endpoints of the ADCtransfer curve to be adjusted to accom-modate the limited output swings ofsingle-supply op amps and other single-supply circuitry. The LTC1098'stwo-channel multiplexer provides a sec-ond channel to measure another sig-nal, such as the battery voltage.

Figure 4b. High-side switching a power-hungry ADC wastes power. Repeatedlyswitching the required bypass capacitorconsumes 500µA even when takingreadings at only 10Hz

FREQUENCY (kHz)

0–120

AMPL

ITUD

E (d

B)

–100

–80

–60

–40

–100

2 4 6 16

1096_3a. eps

8 10 12 14

–20

–30

–50

–70

–90

–110

LTC1096 FFT fSAMPLE = 31.25kHz, fIN = 11.8kHz

INPUT FREQUENCY (kHz)

00

EFFE

CTIV

E NU

MBE

R OF

BIT

S (E

NOBs

)

2

3

4

5

7

8

20 40

1096_3b. eps

6

1

LTC1096 EFFECTIVE NUMBER OF BITS vs INPUT FREQUENCY fSAMPLE = 31.25kHz

Figure 4a. Sampling at 1kHz, this circuitdraws only 3µA and will run off a120mAhr CR1632 3V lithium coin cell for5 years

1098_5b. eps

e.g. ADC0831 ADC08031 (2.5mA)

C 10µF

+5V

OFF/ON

fSAMPLE ICC = CV fSAMPLE

1Hz 10Hz

50µA 500µA!

1098_5a. eps

LTC1098

0.1µF 3V

CLK

DIN

DOUT

CH0

CH1

CS

TO µP

GND

VCC/VREF

Table 1. LTC1096/8 Features

• Micropower Operation: 40-100µATypical Current

• Power Shutdown: 1nA TypicalShutdown Current

• SO-8 Packaging• Single Supply 3V-9V Operation• Sample-and-Hold: 33kHz Sample

Rate and 40kHz Full-AccuracyBandwidth

• Reduced Reference Operation to250mV (LTC1096)

• 2-Channel Input Multiplexer(LTC1098)


DESIGN FEATURES

Easier Remote or IsolatedInstallations

Remote or isolated systems are madeeasier for three reasons. First, the serialdata transmission requires fewer wiresthan parallel transmission. A systemcan be isolated with two opto-isolators,one to send the clock and one to returnthe data. Second, analog signals can bedigitized at the source and sent back indigital form, increasing noise immunityand reducing difficulties with analogisolation. Third, the 3V to 9V singlesupply range and the low power con-sumption makes it easier to get powerto a remote or isolated system. Figure 8shows a floating system, powered by adiode-capacitor charge pump and trans-mitting data with two opto-isolators.

The LTC1096 and 1098 make iteasier to meet the UL and gas regula-tions, which limit the allowable bypasscapacitor size, by operating with asmaller bypass capacitor. Improvedpower supply rejection and lower cur-rent allow the use of capacitors as smallas 0.01µF.

Advantages over Microprocessorswith Built-in ADCs

As an alternative, designers of 8-bitsystems can use a microprocessor witha built in ADC, such as the 68HC11.The LTC1096/8 can have noise, power,size, and cost advantages over built-inADCs.

The LTC1096 is useful with refer-ence voltages much lower than 1V.In contrast, ADCs built into micropro-cessors can have noise and accuracyproblems as the reference is reduced.By reducing the LTC1096’s reference, asystem can be designed so that theADC is located near the sensor, permit-ting it to directly digitize the sensor’soutput and transmit digital data to themicroprocessor. This can resultin much lower noise and cost andsmaller size than amplifying and send-ing analog data to the microprocessorpackage. Even in systems where the

signal source is near the microproces-sor, the noise performance of theLTC1096 is much better than that ofbuilt-in ADCs.

The power consumption of a systemdesigned with the LTC1096/8 also canbe much lower than that of a systemwith the ADC on the microprocessor. Inmany CMOS microprocessors withoutADCs, the supply current can be madearbitrarily low by reducing the supplyvoltage and clock frequency. By puttingthe ADC function in the LTC1096/8,extremely low power consumption canbe achieved because the ADC shutsdown when not taking readings. Theprocessor can continue to perform op-erations and timing tasks without anycurrent being consumed by the ADC.

HOW IT WORKS: THE ADCDESIGN

The LTC1096 and LTC1098 use aswitched-capacitor, successive-ap-proximation (SAR) architecture. TheSAR technique provides the best com-promise among die size, speed, andpower.

Die size must be small in order toachieve SO-8 packaging. Surprisingly,speed can be important in micropowerapplications that are powered-downbetween readings. The faster the sys-tem can take the required readings, theless time the power needs to be appliedand the lower the average power con-sumption will be. Some systems arepowered-up continuously or are con-strained to long power-on times forreasons other than ADC conversiontime (for example, sensor settling time).In these applications, the ADC mustnot burn excessive power.

The LTC1096 and 1098 achieve thesegoals with a conversion time of 16µs atan operating supply current of 100µA.They automatically shut down to 1nAtypically between conversions, as shownin Figure 5. Adding the power-on wake-up time and data-transfer time gives athroughput time of 29µs and a maxi-mum sample rate of 33kHz.

Comparator

In a switched-capacitor ADC, mostof the power is consumed by the com-parator. As power is reduced, the pri-mary concern is to keep the comparatoras fast as possible. There are sometechniques for reducing the powerdrain of the DAC, logic, and othercircuitry, but the comparator is thegreatest challenge.

LTC1096 continued from page 7

CLOCK FREQUENCY (Hz)

0.002

SUPP

LY C

URRE

NT, I

CC (µ

A)

140

100 10k 100k 1M

1098_6. eps

01k

120

100

80

60

40

20

SUPPLY CURRENT vs CLOCK RATE FOR ACTIVE AND SHUTDOWN MODES

ACTIVE (CS LOW)

SHUTDOWN (CS HIGH)

TA = 25°C VCC = 5V

At the low overdrives typically seenin ADCs, the comparator delay is domi-nated by the first stage. This is becausethe overdrive for later stages is largerdue to the gain of earlier stages. Figure6a shows the first stage of a compara-tor. The delay is related to the inputoverdrive, the transconductance (gm) ofthe input stage, the capacitive load onthe output of the first stage, and therequired swing from the first-stage-output clamp voltage to the trip point ofthe second stage.

Before major bit decisions, the inputswings far away from zero and theoutput of the first stage swings intothe clamp. (The first-stage output isclamped because the input ofthe comparator cannot be clampedwithout losing charge from the sample-and-hold capacitor.) When the DACupdates, the comparator input willswing back to zero and slightly beyond.In the case of an 8-bit ADC, this over-drive can be as low as 1mV.

Figure 5. After a conversion, when themicroprocessor drives CS high, the ADCautomatically shuts down until the nextconversion. The supply current, which isvery low during conversions, drops tozero in shutdown


DESIGN FEATURES

1096_7b. eps

VIN

VDAC

CHARGE SUMMING

NODE

Ib

continued on page 10

consumes 24µA and has a typicaldelay of less than 1µs with an over-drive of 1mV. The comparator, DAC,bias circuits, and logic were designedto operate on supplies as low as 3V.

Compact Design

The LTC1096 and LTC1098 comein 8-pin DIPs or SO-8 packages. Theserial I/O allows the ADC function tobe put into an 8-pin package. TheSAR architecture, being one of themost space efficient, results in asmall enough die to fit into an SO-8package.

WHERE IT IS USED:APPLICATIONS

The LTC1096/8 can be used in awide variety of micropower, lowvoltage, or compact systems.

Micropower Systems

The LTC1096 and LTC1098 can beused in low-power applications. Incontinual use, operating at the full33kHz sample rate, they typicallyconsume only 100µA of supply cur-rent. If the sample rate is reduced bya factor of ten, the supply current willalso drop by a factor of ten, becausethe converters shutdown betweenconversions. At a 1kHz sample rate,the supply current is only 3µA.

Battery Powered Systems

The circuit of Figure 4a will sampleat 1kHz for five years powered from a120mAhr, 3V lithium coin cell. TheCS pin is taken low, a conversion isperformed, and CS is taken backhigh. The ADC shuts down and drawsonly leakage current until the nextconversion.

3.3V Logic Systems

Figure 7 shows a 3.3V single-sup-ply system. Most analog blocks (sen-sors, references, op amps, switches,and other analog glue chips) can befound in versions that operate on a3V supply. The LTC1096 andLTC1098 fill a need for the A/D con-verter function in 3V systems. Theyjoin the 10-bit LTC1283 and the 12-bit LTC1289, providing 3V data con-version in a wide variety of resolutions.

Remote or Isolated Systems

Figure 8 shows a floating systemthat sends data to a grounded hostsystem. The floating circuitry isisolated by two opto-isolators andpowered by a simple capacitor-diodecharge pump. The system has verylow power requirements because theLTC1096 shuts down between con-versions and the opto-isolators drawpower only when data is being trans-

The comparator delay is roughlythe time it takes for the first-stageoutput to swing from the clamp volt-age and cross the trip point of thesecond stage. Smaller clamp voltagereduces the delay because the outputneed not travel as far to reach thesecond-stage trip point. Smaller straycapacitance, CS, will also reduce de-lay time.

The current available to charge thestray capacitance is equal to the inputoverdrive times the input-stage gm.Increasing the overdrive would speedup the comparison, but in SAR con-verters the comparator overdrive isset by the ADC resolution. The onlyway to increase the charging currentis to increase the gm of the input stage.

A BiCMOS input stage was chosenbecause bipolar transistors providehigher gm than MOSFETs. Depend-ing on bias conditions, the gm of abipolar transistor can be orders ofmagnitude higher. The bipolar inputtransistor must be buffered by aMOSFET follower to prevent the basecurrent from discharging the sample-and-hold capacitor (see Figure 6b).The composite connection has the gmof a bipolar (required for speed) andthe input leakage of the MOSFET.(The noise contributed by theMOSFET is insignificant at the 8-bitlevel.) The comparator input stage

Figure 6a. The Bipolar transistor’s much higher gm reduces the micropowercomparator’s delay. At low overdrives, the bipolar transistors can providemore current to charge the stray capacitance than MOSFETs can

Figure 6b. A MOSFET buffers the critical chargesumming node from the bipolar transistor’s basecurrent. The composite connection has the gm of thebipolar and the input leakage of the MOSFET

1096_7a. eps

+

–

CS

+∆V

–∆V

0V

FOR SMALL OVERDRIVE:

tDELAY = CS ∆V

gm VOD

COMPARATOR 2nd STAGE

VOD


DESIGN FEATURES

1096_8. eps

MPU SYSTEMLTC1096/8

LT1006 LT1077/8/9 LT1178/9 LT1101

3V LOGIC 3V MICROPROCESSORS 3V MEMORY

–

+SENSORS

3.3V

LT1004

APPLICATION HINTS:MICROPOWER, SINGLE-SUPPLY DESIGN

Several things must be taken intoaccount to get the lowest power con-sumption from these micropower ADCs.Figure 10 shows the operating sequenceof the LTC1096. The converter drawspower when the CS pin is low and shuts

itself down when that pin is high. Insystems that convert continuously, theLTC1096/8 will draw its normal oper-ating power continuously. Figure 5ashows that the typical current variesfrom 40µA at clock rates below 50kHzto 100µA at 500kHz. A 10µs wake-uptime must be provided to the LTC1096after each falling CS. (The wake-uptime is invisible on the LTC1098 be-

ferred. The system consumes only50µA at a sample rate of 10Hz (1mson-time and 99ms off-time). This iseasily within the current supplied bythe charge pump running at 5MHz. Ifa truly isolated system is required,the system’s low power simplifies gen-erating an isolated supply or power-ing the system from a battery.

Systems that must fit into a smallspace can benefit from the SO-8 pack-aging of the LTC1096/8. Operatingthe ADC directly off batteries caneliminate the space taken by a voltageregulator. Connecting the ADC di-rectly to sensors can eliminate opamps and gain stages. The LTC1096/8 can also operate with small, 0.1µFor 0.01µF chip bypass capacitors.

Figure 9 shows a temperature-mea-surement system. The LTC1096 isconnected directly to the low-cost sili-con temperature sensor. The voltageapplied to the VREF pin adjusts the fullscale of the ADC to the output rangeof the sensor. The zero point of theconverter is matched to the zero out-put voltage of the sensor by the volt-age on the LTC1096’s negative input.

LTC1096 continued from page 9

Figure 8. Power for this floating ADC system is provided by a simple capacitor-diode charge pump. The two opto-isolators draw no current between samples,turning on only to send the clock and receive data

1096_9. eps

LTC1096

+IN

DOUT

CS

VCC

CLK GND

LT1004-2.5100k

VREF

–INANALOG INPUT

20k0.022

0.001µF 2kV

5MHz

4N28

FLOATING SYSTEM

1k

2N3904

CLK

DATA

75k47µF 0.1µF

1N5817

1N5817

1N5817300Ω

10k

100k

500k

Figure 7. The LTC1096 and LTC1098 fill a need for ADCs in 3V systems. With the 10-BitLTC1283 and 12-Bit LTC1289, they provide 3V operation in a wide range of resolutions


DESIGN FEATURES

To generate a truly single-supplyapplication, all circuitry must run off asingle supply. Fortunately, there is a

good selection of other components forsingle supply applications, includingthe LT1006, LT1077/8/9, and LT1178/9 op amps, the LT1101 instrumenta-tion amp, the LT1017/8 comparators,and the LT1004 reference. The inputspan of the LTC1096 can be adjustedabove ground to accommodate the lim-ited output swing of single supply opamps, as shown in Figure 11.

CONCLUSIONLower system cost, low power, small

size, and other benefits will help theLTC1096/8 find their way into a vari-ety of micropower, low-voltage, bat-tery-powered, and compact systems.For more information, refer to theLTC1096/8 data sheet and applica-tion notes.

cause of the time consumed by theinput address bits).

In systems that have significant timebetween conversions, lowest powerdrain will occur with the minimum CSlow time. Bringing CS low, waiting 10µsfor the wake-up time, transferring dataas quickly as possible, and then bring-ing it back high will result in the lowestcurrent drain. This minimizes theamount of time the device draws power.Even though the device draws morepower at higher clock rates, the netpower is less because the device is onfor a shorter time.

Capacitive loading on the digital out-put can increase power consumption.A 100pF capacitor on the DOUT pin canmore than double the 100µA supplycurrent drain at a 500kHz clock fre-quency. An extra 100µA or so of currentgoes into charging and discharging theload capacitor. The same goes for digi-tal lines driven at a high frequency byany logic. The CxVxf currents must beevaluated and the troublesome onesminimized.

These converters are very easy to usebecause of their low supply current andgood power-supply rejection. Of course,a ground plane is recommended andbypass capacitors should be located asclose to the device as possible. Forreduced reference applications, the lay-out becomes more critical.

Figure 9. The LTC1096’s high-impedance input connects directly to this tempera-ture sensor, eliminating signal conditioning circuitry in this 0–70° thermometer

Figure 10. The ADC’s power consumption drops to zero when CS goes high. 10µsafter CS goes low, the ADC is ready to convert. For minimum power consumptionkeep CS high for as much time as possible between conversions

1196_11. eps

LTC1096

0.1µF

+3V

CLK

DOUT

CS

TO µP

VCC

–IN

VREF

+IN

GND

0.01µF 0.01µF

LT1004-1.2

13.5kΩ

678Ω

LM134

63.4k

182k

75k

POWER DOWN

CLK

CS

DOUT

tWAKE UP (10µSEC MIN)

B7 B6 B5 B4 B3 B2 B1 B0

tCONVERSION

1096_12. eps

LTC1096 POWER DOWN AND WAKE UP

1096_13. eps

LTC1096

3V

CLK

DOUT

CS

TO µP

VCC

–IN

VREF

+IN

GND

LT1004-1.2

10k

100k

240k

SINGLE SUPPLY OP AMP

OP AMP SWINGS TO 50mV

ZERO POINT OF ADC SET

AT 50mV

+

–

Figure 11. The voltage on the negative input sets the zero point of the ADCat 50mV to accommodate the output-swing limitations of single-supply opamps


DESIGN FEATURES

The LT1432: 5-Volt Regulator Achieves90% Efficiency by Carl Nelson


Power-supply efficiency has becomea highly visible issue in many portable,battery-powered applications. Higherefficiency translates directly to longeruseful operating time—a potent sellingpoint for products such as notebookcomputers, cellular phones, data-ac-quisition units, sales terminals, andword processors. The “holy grail” ofefficiency for 5V outputs is 90%.

For a number of reasons, older de-signs were limited to efficiencies of 80to 85%. High quiescent current in thecontrol circuitry limited efficiency atlower output currents. Losses in thepower switch, inductor, and catch di-ode all added up to limit efficiency atmoderate-to-high output currents.Each of these areas must be addressedin a design that is to have high effi-ciency over a wide output-currentrange.

Some portable equipment has theadditional requirement of high effi-

ciency at extremely light loads (1-5mA).These applications have a “sleep” modein which RAM is kept alive to retaininformation. The instrument mayspend days or even weeks in this mode,so battery drain is critical. Ordinary5V switchers draw quiescent currentsof 5 to 15mA for these light loads. Theefficiency of a 12V to 5V converter with10mA supply current and 1mA load isonly 4%! Clearly, some method mustbe provided to eliminate the quiescentcurrent of the switching-regulator con-trol section.

An additional requirement for somesystems is full shutdown of the regula-tor. It would be ideal if a simple logicsignal could cause the converter toturn off and draw only a few microam-peres of current.

The combination of battery formfactor, their discrete voltage steps, andthe use of higher-voltage wall adaptersrequires a switching regulator that

operates with inputs from 6V to 30V.Both of these voltages present prob-lems for a MOS design because ofminimum and maximum gate-voltagerequirements of power MOS switches.

The LT1432 was designed to ad-dress all the requirements describedabove. It is a bipolar control chip thatinterfaces directly to the LT1070 fam-ily of switching regulators, and is ca-pable of operating with 6V to 30Vinputs. These ICs have a very efficientquasi-saturating NPN switch whichmimics the resistive nature of MOStransistors with much smaller die area.The NPN is a high frequency devicewith an equivalent voltage and currentoverlap time of only 10ns. Drive to theswitch is automatically scaled withswitch current, so drive losses are alsolow. Switch and driver losses using anLT1271 with a 12V input and a 5V,500mA load are only about 2%.

To reduce quiescent-current losses,the LT1271 is powered from the 5Voutput rather than from the inputvoltage. This is done by pumping thesupply capacitor, C3, from the outputvia D2. Quick minded designers willobserve that this arrangement doesnot self-start; accordingly, a parallelpath was included inside the LT1432to provide power to the IC switcherdirectly from the input during start-up. Equivalent quiescent supplycurrent is reduced to about 3.5mAwith this technique.

Catch-diode losses cannot bereduced with IC “tricks” unless thediode is replaced with a synchronouslydriven MOS switch. This is moreexpensive, and still requires the diodeto avoid voltage spikes during switchnon-overlap times. The question is, isit worth it?

+

+

1432_1. eps

C1 330µF 35V

C6 0.02µF R1

680Ω

C4 0.1µF

D1 MBR330P

C5 0.03µF

VIN

LT1271

VSW

FBVC GND

VIN

C3 4.7µF TANT

D2 1N4148

L1 50µH R2*

0.013Ω

C2 390µF 16V

VOUT 5V, 3A

DIODEVC V+

VIN

MODE

VLIM

VOUTGND200pF

< 0.3V = NORMAL MODE > 2.5V = SHUTDOWN OPEN = BURST MODE

LT1432

+

MODE INPUT

* R2 IS MADE FROM PC BOARD COPPER TRACES L1 = COILTRONICS CTX 50-3-MP (3A) (305) 781-8900

Figure 1. High efficiency 5V buck converter


DESIGN FEATURES

The LTC1156 Quad High-Side MOSFETDriver By Tim Skovmand

The new LTC1156 quad high-sideMOSFET driver is designed to protectand control four high-side, N-channelMOSFET switches. N-channel switchesoffer the lowest possible RDSON, butrequire gate voltages higher than thepower supply rail when used in high-side switching applications. TheLTC1156 generates this higher voltagecompletely on-chip. No external ca-pacitors or inductors are required, andthe four drivers with protection arehoused in a 16-lead SO package.

The LTC1156 was designed withmicropower applications in mind.Standby current consumption is only16µA from a 5V supply, and the operat-ing current per-channel is only 95µA.No external logic is required to revert tothe standby mode. Each channel isindependently powered and protectedto eliminate interaction between driv-ers and to ensure the lowest possiblesupply-current demand.

Typical ApplicationsApplications for the LTC1156

include lap-top computer load switch-ing, cellular-radio power management,high efficiency H bridge drivers, andautomotive load switching.

Figure 1 illustrates the use of theLTC1156 in a four-cell NiCad note-book-computer power system. The firstchannel of the LTC1156 generates gatedrive for the extremely low voltage drop5V regulator made up of Q1 and theLT1431. Q1 has an RDSON of 0.1Ω andthe drain sense resistor adds another0.03Ω. The voltage drop is simply theload current times the total series re-sistance. Therefore, the regulator dropsless than 0.3V at 2A. Or, to put itanother way, the regulator delivers 5Vout with as little as 5.3V in. The otherthree switches are powered from theoutput of the regulator and control

three 5V loads under microprocessorcontrol. Q2 and Q3 are both 0.1ΩMOSFETs and are housed in the same8-pin SO package. Q4 is two 0.1ΩMOSFETs connected in parallel tocreate a 0.05Ω switch for poweringhigh-current loads. All of the compo-nents shown in Figure 1, including theLTC1156 and the drain-sense currentshunt, are available in surface mountpackaging and therefore consume verylittle board space.

Note: Some portable-computerpower-management systems utilizeP-channel MOSFETs for load switch-ing. Replacing these switches withprotected N-channel MOSFETs can sig-nificantly reduce power-supply volt-age drops and guard againstcatastrophic MOSFET and printed cir-cuit board damage.

Figure 1. Four-cell NiCad notebook power-management system

1156_1. eps

+

+

5V LOAD

5V LOAD

HIGH CURRENT 5V LOAD

+4-CELL NICAD PACK

47µF

µP

REG ON/OFF

FAULTIN4

IN3

IN2

IN1

DS4

DS3

DS2

VS VS

G1

DS1

GND GND

1N4148

G4

G3

G2

0.1µF

100k

100k

0.1µF 36mΩ** 2.8A MAX

IRLR024

SI9956DY

0.1Ω

0.1Ω SI9956DY 0.05Ω

5V/2A SWITCHED

470µF*

10k

200pF

LT1431

LTC1156

CAPACITOR ESR LESS THAN 0.5Ω IMS026 INTERNATIONAL MANUFACTURING SERVICES, INC. (401) 683-9700

* **

Q1

Q2 Q3

Q4


DESIGN FEATURES

Figure 1. LT1103 block diagram

The LT1103/1105 Family of OfflineSwitching Regulators

IntroductionOffline power supplies generate well-

regulated DC output voltages from theAC line and provide isolation as de-fined by various international safety/regulatory agencies. The VerbandDeutscher Elektrothniker (VDE) speci-fications are generally regarded as themost stringent and a power supplywhich meets these guidelines is usu-ally capable of worldwide operation.Universal offline power supplies canaccept inputs ranging from 85VAC to270VAC and can operate withoutalterations or switches. Offline power-supply topologies include the flybackand the forward converter; both em-ploy a transformer to convert onevoltage to either a higher or lower

voltage. The output voltage can be ofeither polarity and multiple outputscan be obtained easily by includingadditional windings.

To obtain well-regulated output volt-ages, a feedback path, which sensesthe output voltage and which crossesthe isolation barrier, is provided. Thisfeedback path typically consists ofan opto-isolator along with a voltagereference and an amplifier. Thisconfiguration provides the most accu-rate output-voltage regulation atthe expense of numerous discretecomponents, board space, aging con-siderations for the opto-isolator, anddesign problems associated with loop

stability, spurious noise pickup, start-up, and output overshoot.

A simpler method for providing afeedback path is magnetic flux-sens-ing. In this mode, the flyback voltageon the primary winding during “switch-off” time is sensed and regulated. It isdifficult to derive a feedback signaldirectly from the primary flyback volt-age, as this voltage is several hundredvolts. A common practice is to providea lower-voltage auxiliary (or bias) wind-ing from which the feedback signal isgenerated. This bias winding is alsoconvenient for powering the switchingregulator IC.

by Anthony Bonte

–

+

–

+

15V GATE BIAS

STARTUP16V

7V

VIN

15V

5V

FB

0VLO

OSC

OSCILLATOR

LOGIC

GATE BIAS DETECT

SPIKE BLANK

COMP

4.5V5V VREF

SAMPLING ERROR AMP gm = 0.012

OVERVOLTAGE LOCKOUT

2.5V 0.15V

SHUTDOWN

6V

40µA

RESET

SSVC GND

0.15ΩAV = 10

CURRENT LIMIT

AMPLIFIER

ANTI-SAT

DRIVER

VSW

1103_1. eps


DESIGN FEATURES

Practical flux-sensing simplifies thedesign of offline power supplies byminimizing the total number of exter-nal components. In addition, itreduces the number of componentswhich must cross the isolation barrierto one, the transformer, resulting ingreater safety and reliability. Althoughmagnetic flux-sensing has been usedin the past, the technique has exhib-ited poor output-voltage regulation dueto the parasitic elements present in atransformer-coupled design. Anotherproblem is that transformers whichprovide the safety and isolation re-quired by VDE also provide the poor-est output-voltage regulation.

These problems are addressed by anew family of offline switching regula-tor ICs. The LT1103 is designed forhigh-input-voltage applications usingan external FET whose source is drivenby the open-collector output stage ofthe IC. The LT1105 uses a totem poleoutput stage that drives the gate of anexternal FET. The unique design of theLT1103/LT1105 eliminates the needfor an opto-isolator while providing±1% line and load regulation in amagnetic flux-sensed topology. Thislevel of performance is achieved with anovel sampling-error amplifier in thecontrol loop of the switching regulator.A block diagram for the LT1103 isshown in Figure 1. The block diagramfor the LT1105 is identical except forthe totem pole output stage and theavailability of the input to the current-limit amplifier for use with an externalcurrent-sense resistor.

Theory

A brief review of flyback-converteroperation and the problems whichcreate a poorly regulated output willprovide insight on how the LT1103/LT1105 address the issues of mag-netic flux-sensed converter design. Fig-ure 2 shows a simplified diagram of aflyback converter using magnetic flux-sensing. The parasitic elements presentin the transformer-coupled design are


Figure 2. Simplified flyback converter

1103_2. eps

VOUT

COMMON

C1

D1RPL (lksec)

N = TRANSFORMER TURNS RATIO FROM SECONDARY TO PRIMARY.

N1 = TRANSFORMER TURNS RATIO FROM SECONDARY TO BIAS.

N2 = N/N1

L (lkpri) = PRIMARY LEAKAGE INDUCTANCE.

L (lksec ) = SECONDARY LEAKAGE INDUCTANCE.

RP = LUMPED SUM EQUIVALENT OF SECONDARY WINDING RESISTANCE, OUTPUT DIODE RESISTANCE AND OUTPUT CAPACITOR RESISTANCE.

1:N

1:N1

VIN

L (lkpri)

S1

VBIAS

FEEDBACK SIGNAL IS DERIVED FROM BIAS WINDING VOLTAGE

indicated. The relationships betweenthe primary voltage, the secondaryvoltage, the bias voltage, and the wind-ing currents are indicated in Figures 3and 4 for continuous and discontinu-ous modes of operation.

When the switch “turns on,” theprimary winding sees the input volt-age and the secondary and bias wind-ings go to negative voltages. Currentbuilds in the primary as the trans-former stores energy. When the switch“turns off,” the voltage across the switchflies back to a clamp level as defined bya snubber network until the energy inthe leakage-inductance of the primarydissipates. Leakage inductance is oneof the main parasitic elements in aflux-sensed converter; it is modeled asan inductor in series with the primaryand secondary of the transformer.These parasitic inductances contrib-ute to changes in the bias-windingvoltage, and hence in the output volt-age, with increasing load current. Vari-ous winding techniques exist forreducing the leakage inductances of atransformer. However, VDE require-ments for safety and isolation effectthese techniques severely and thuslimit their usefulness. The energystored in the transformer transfers tothe secondary and bias windings dur-ing “switch off” time. Ideally, the volt-

age across the bias winding is set bythe DC output voltage, the forwardvoltage of the output diode, and theturns ratio of the transformer (afterthe energy in the leakage-inductancespike of the primary dissipates). Thisrelationship holds until the energy inthe transformer drops to zero (discon-tinuous mode) or the switch turns onagain (continuous mode). Therefore,the voltage on the bias winding is onlyvalid as a representation of the outputvoltage while the secondary is deliver-ing current.

Although the bias-winding flybackvoltage is a representation of theoutput voltage, this voltage is not con-stant. For a brief period following theleakage-inductance spike, the bias-winding flyback voltage decreases dueto nonlinearities and parasitic elementspresent in the transformer. Followingthis nonlinear behavior is a periodwhen the bias-winding flyback voltagedecreases linearly. This behavior iseasily explained. Current flow in thesecondary decreases linearly at a ratedetermined by the voltage across thesecondary and the inductance of thesecondary. The parasitic secondary-leakage inductance appears as an im-pedance in series with the secondarywinding. In addition, parasitic resis-tances exist in the secondary winding,


DESIGN FEATURESLT1103 continued from page 15

the output diode, and the output ca-pacitor. These impedances combine toform a lumped-sum equivalent andcause a voltage drop as secondary cur-rent flows. This voltage drop is coupledfrom the secondary to the bias-windingflyback voltage and becomes more sig-nificant as the output is loaded moreheavily. The voltage drop is largest atthe beginning of “switch off” time andsmallest just prior to either all trans-former energy being depleted or theswitch turning on again.

The best representation of the out-put voltage occurs just prior to either alltransformer energy being used up andthe bias-winding voltage collapsing tozero or just prior to the switch turningon again and the bias-winding voltagegoing negative. This point in time alsocorresponds to the smallest forwardvoltage for the output diode. It is pos-sible to redefine the relationship be-tween the secondary-winding voltageand the bias-winding voltage as:

VV V I x R

NBIASOUT f=

+ +( )1

where Vf is the forward voltage of theoutput diode, I is the current flowing inthe secondary, R is the lumped-equiva-lent secondary-parasitic impedance andN1 is the transformer-turns ratio fromthe secondary to the bias winding. It isapparent that even though the abovepoint in time offers the most accuraterepresentation of the output voltage,the answer given by the bias-windingvoltage still differs from the “true” an-swer by the amount

I x RN1

.

Innovation

The LT1103/LT1105 offline switch-ing regulators provide a solution foreach of the problems in a magnetic flux-sensed topology and are able to achieve

±1% line and load regulation over awide range of line and load conditions.The answer to these problems is pro-vided by a unique sampling-error am-plifier built into the LT1103/LT1105. Itcomprises a leakage-inductance spikeblanking circuit, a slew-rate-limitedtracking amplifier, a level detector, asample-and-hold, an output transcon-ductance (gm) stage and load regulationcorrection circuitry. When viewed froma system or block level, the sampling-error amplifier behaves like a simpletransconductance amplifier. Here’s howit works.

The feedback network no longer com-prises a traditional diode/capacitorpeak detector in conjunction with aresistor divider network. Instead, thefeedback network consists of a diode inseries with the bias-winding, whichfeeds the resistor divider network di-rectly. The resultant error signal is fedinto the input of the error amplifier.Rather than acting as a peak detector,the diode in series with the bias wind-ing serves to prevent the FB pin (inputto the error amplifier) from being pullednegative and forward biasing thesubstrate of the IC when the biaswinding changes polarity with “switchturn-on.”

The primary-winding leakage-induc-tance spike effects are first eliminatedwith an internal blanking circuit in theLT1103/1105 which suppresses theinput of the FB pin for 1.5µs at the startof “switch-off” time. This prevents theprimary-leakage inductance spike frombeing propagated through the erroramplifier and affecting the regulatedoutput voltage. This achieves ±5% regu-lation, comparable to the performanceof previously available solutions.

With the effects of the leakage-in-ductance spike eliminated, the effectsof decreasing bias-winding flyback volt-age can be addressed. With the tradi-tional diode/capacitor peak-detector

VIN

0V

0V

N • VIN

0V

N2 • VIN

IPRI

0A

0A

IPRI∆I

∆I

PRIMARY SWITCH

VOLTAGE

SECONDARY VOLTAGE

BIAS WINDING VOLTAGE

PRIMARY CURRENT

SECONDARY CURRENT

SWITCH CURRENT

1103_3. eps

VZENER

[VOUT + Vf + (ISEC • RP)]

[VOUT + Vf + (ISEC • RP)] N =

PRIMARY FLYBACK VOLTAGE

= [VOUT + Vf + (ISEC • RP)]

N1 BIAS FLYBACK VOLTAGE

ISEC = IPRI N

0A

Figure 3. Continuous-mode flybackconverter waveforms


DESIGN FEATURES

circuitry eliminated from the feedbacknetwork, the tracking amplifier of theLT1103/LT1105 follows the flybackwaveform as it changes with time andamplifies the difference between theflyback signal and the internal refer-ence. Tracking is maintained until thebias winding voltage collapses as aresult of all transformer energy beingdepleted (discontinuous mode) or theswitch turning on again (continuousmode). The level-detector circuit sensesthe fact that the bias winding flybackvoltage is no longer a representation ofthe output voltage and activates aninternal peak detector. This effectivelysaves the most accurate representa-tion of the output voltage, which isthen buffered to the second stage of theerror amplifier.

The second stage of the error ampli-fier consists of a sample-and-hold. Whenthe switch “turns on”, the sample-and-hold samples the buffered error voltagefor 1µs and then holds it for the remain-der of the switch cycle. This held voltageis then processed by the output gmstage and converted into a control sig-nal at the output of the error amplifier(the VC pin). This tracking and sam-pling technique improves the output-voltage regulation from ±5% to ±2–3%.

The final adjustment in regulationto ±1% or better is provided by theload-regulation correction circuitry. Asstated earlier, output regulation de-grades with increasing load current(output power). This effect is traced tosecondary leakage inductance andparasitic secondary-winding, diode,and output-capacitor resistances. Eventhough the tracking amplifier has ob-tained the most accurate representa-tion of the output voltage, its answer isstill flawed by the amount of the volt-age drop across the parasitic lumped-sum equivalent impedance which iscoupled to the bias-winding voltage.This error increases with increasing

load current. Therefore, a techniquefor sensing load-current conditions hasbeen added to the LT1103/LT1105.The switch current is proportional tothe load current as defined by theturns ratio of the transformer. A smallcurrent, proportional to switch cur-rent, is generated in the LT1103/LT1105 and fed back to the FB pin.This allows the input-bias current ofthe sampling-error amplifier to be afunction of load current. A resistor inseries with the feedback pin generatesa linear increase in the effective refer-ence voltage with increasing loadcurrent. This translates to a linearincrease in output voltage with in-creasing load current. By adjustingthe value of the series resistor, theslope of the load compensation is ad-justed and can be set to cancel theeffects of these additional parasitic volt-age drops. Thus, load regulation canbe improved to ±1% or better.

Conclusion

The new LT1103/LT1105 offlineswitching regulators eliminate the needfor an opto-isolator while providing±1% line and load regulation in a mag-netic flux-sensed converter. Practicalflux-sensing simplifies the design ofuniversal offline power supplies, re-duces the total number of externalcomponents, and provides greatersafety and reliability, as only the trans-former requires VDE conformance.Special circuitry built into the LT1103/LT1105 addresses the problems of pri-mary-leakage inductance spikes, non-linear transformer behavior andparasitic impedances, which arepresent in a transformer-coupled de-sign and which previous switchingregulators have failed to address. There-fore, the LT1103/LT1105 offline switch-ing regulators provide an economicaland technological advantage for theuser who needs well-regulated DC out-put voltages from the AC line.

VIN

0V

0V

N • VIN

0V

N2 • VIN

IPRI

0A

0A

IPRI

0A

∆I

∆I

PRIMARY SWITCH

VOLTAGE

SECONDARY VOLTAGE

BIAS WINDING VOLTAGE

PRIMARY CURRENT

SECONDARY CURRENT

SWITCH CURRENT

1103_4. eps

VZENER

[VOUT + Vf + (ISEC • RP)]

[VOUT + Vf + (ISEC • RP)] N

PRIMARY FLYBACK VOLTAGE

=

[VOUT + Vf + (ISEC • RP)] N1

BIAS FLYBACK VOLTAGE

=

ISEC = IPRI N

Figure 4. Discontinuous-mode flybackconverter waveforms


DESIGN FEATURES

The LT1124 and LT1125 are newdual and quad low-noise op amps.These parts have been optimized forDC performance, AC precision, andlow noise, and are packaged in sur-face-mount for optimum performanceper-square-mil of circuit-board area.Both the 8-pin surface-mount LT1124and the 16-pin surface-mount LT1125are equal in specifications to the DIP-packaged versions.

The LT1124/1125 undergo morerigorous testing than conventional,multiple op amps. Each individualamplifier is tested at room tempera-ture for 1kHz noise performance and100kHz gain-bandwidth product. Slewrate is tested over the specified tem-perature ranges. This testing is per-formed for all grades and packagestyles. Other manufacturers performnoise tests using only a single mea-surement, as shown in Figure 1. Whenthe amplifiers are connected in seriesand a single test is performed, thenoise contributions of the individualop amps are RMS summed. For a quadamplifier, the total noise would be:

en out = √(ena)2 + (enb)2 + (enc)2 + (end)2

If the LT1125 were tested this way,the noise limit would be:

√4 x (4.2nV/Hz)2 = 8.4nV/(Hz)1/2

This method has an inherent flaw. Ifthree of the four op amps have a typical

noise of 2.7nV/(Hz)1/2, and the fourthop amp is contaminated and has6.9nV/(Hz)1/2 noise, which is 64% overthe 4.2nV/(Hz)1/2 limit, the resultwould be:

RMS sum = √(2.7)2 + (2.7)2 + (2.7)2 + (6.9)2

= 8.33nV/(Hz)1/2

This part passes the test, but shouldit be sold? Clearly, a combined ampli-fier noise test, although better than asample test or no test at all, is not aneffective screen. This is why multipleop amps should be tested individuallyfor noise. Thorough test proceduresand tighter specifications make theLT1124/1125 stand out from the com-petition. Traditionally, dual and quadop amp performance is degraded rela-tive to the performance of single opamps. For the LT1124/25, this is notthe case. Table 1 summarizes the per-formance of the LT1124/1125 com-pared to the low-cost grades availablefrom other manufacturers. The com-parison shows that the specificationsof the LT1124/1125 not only equalthose of the industry-standard OP-27,but are, in most cases, superior.

For applications requiring higherslew rates or gain-bandwidth prod-ucts, decompensated versions of theseparts are available. The LT1126 (dual)and the LT1127 (quad) offer slew ratesof 11V/µs and gain-bandwidth prod-ucts of 65MHz, while maintaining the

The LT1124/1125: What’s New inPrecision, High-speed Op Amps

by Alexander Strong

same noise specifications and DC per-formance as the LT1124/1125. TheLT1126 and LT1127 are stable at again of ten or more. The LT1124/25and LT1126/27 families are compen-sated to maximize gain over the audiorange. The maximum gain at 20kHz is53dB for the LT1124/1125 and 67dBfor the (Av = 10 stable) LT1126/27.High closed-loop gain makes this fam-ily of op amps an excellent choice forlow-distortion signal processing. Thecombination of low distortion and lownoise puts the LT1124/25/26/27ahead of the competition in precisionapplications. Figure 2 shows a com-parison of the LT1124, the LT1126,the OP-270, and the industry-stan-dard OP-27 single.

Figure 1. Competing quad op amp noise-test method

Figure 2. Total harmonic distortion plusnoise vs frequency comparison

All of the amplifiers have high DCgains and low noise characteristicswhich make them good choices forapplications under 200Hz. The LT1124has better gain linearity and the samedistortion as the OP-270 at 10 x thefrequency. Also it has superior gain-bandwidth when compared to the OP-27 single. For higher performance ingains of ten or more, the LT1126 outperforms them all.1124_1. eps

A

B

C

D OUT

+

–+

–+

–+

–

FREQUENCY (Hz)

TOTA

L HA

RMON

IC D

ISTO

RTIO

N +

NOIS

E (%

)

0.010

0.1

20 1k 10k 20k

1124_2. eps

100

0.001

0.0001

AV = –10 VO = 20Vpp RL = 2k MEASUREMENT BANDWIDTH = 10Hz TO 80kHz

LT1126

OP27

OP270LT1124



DESIGN FEATURES

The following formula was devel-oped to calculate the improvement inefficiency when adding a synchronousswitch.

Efficiency change = (VIN - VOUT)(Vf - RFET x IOUT)(E)2

(VIN)(VOUT)

With VIN = 10V, VOUT = 5V, Vf (diodeforward voltage) = 0.45V, RFET = 0.1Ω,and IOUT = 1A, the improvement inefficiency is only 2.8%. This does nottake into account the losses associatedwith MOS gate drive, so real improve-ment would probably be closer to 2%.The availability of low-forward-voltageSchottky diodes such as the MBR330Pmakes synchronous switches less at-tractive than they used to be.

To achieve higher efficiency during“sleep,” the LT1432 has a burst mode.In this mode, the LT1271 is eitherdriven full on or completely shut downto its micropower state. The LT1432acts as a comparator with hysteresisinstead of a linear amplifier. This modereduces equivalent input supply cur-rent to 1.3mA with a 12V battery. Bat-tery life with NiCad AA cells is over 300hours with a 1mA 5V load.Burst mode increases output ripple,especially with higher output currents,


so maximum load in this mode is100mA.

The LT1271 normally draws about50–100µA in its shutdown state. A shut-down command to the LT1432 opensall connections to the LT1271 VIN pin,so its current drain is eliminated. Thisleaves only the shutdown current of theLT1432 and the switch leakage of theLT1271, which typically add up lessthan 20µA—less than the self-dischargerate of NiCad batteries. For many appli-cations, the on/off function is underkeystroke control. Digital chips whichdraw only a few microamps are avail-able for keystroke recognition and powercontrol.

There is no way to design aroundinductor losses. These losses are mini-mized by using low-loss cores such asmolypermalloy or ferrite, and by sizingthe core to use wire with sufficientdiameter to keep resistive losses low.The 50µH inductor shown has a coreloss of 200mW with type-52 powdered-iron material, and 28mW withmolypermalloy. For a 1A load this rep-resents efficiency losses of 4% and0.56% respectively—a major difference.Ferrite cores would have even lowerlosses than molypermalloy, but the“moly” has such low losses that ferritesshould be chosen for other reasons,

such as height, cost, mounting, and thelike. DC resistance of the inductorshown is 0.02Ω. This represents anefficiency loss of 0.4% at 1A load and0.8% at 2A. Significant reduction inthese resistance losses would require asomewhat larger inductor. The choiceis yours.

The LT1432 has a high efficiencycurrent limit, with a sense voltage ofonly 60mV. This has a side benefit inthat printed circuit board trace mate-rial can be used for the sense resistor. A3A limit requires a 0.02Ω sense resistorand this is easily made from a smallsection of serpentine trace. The 60mVsense voltage has a positive tempera-ture coefficient that tracks that of cop-per, so that the current limit is flat withtemperature. Foldback current limit-ing can be easily implemented.

The LT1432 represents a significantimprovement in high efficiency 5V sup-plies that must operate over a widerange of load currents and input volt-ages. Its efficiency has a very broadpeak that exceeds 90%, requiring a newdefinition of the “holy grail.” Logic con-trolled shutdown, milli-power burstmode, and efficient, accurate, currentlimiting make this new regulator ex-tremely attractive for battery-poweredapplications.


LT1124CN8PARAMETER/UNITS LT1125CN OP-27 GP OP-270 GP OP-470 GP UNITS

Voltage Noise, 1kHz 4.2 4.5 – 5.0 nV/√Hz100% Tested Sample Tested No Limit Sample Tested

Slew Rate 2.7 1.7 1.7 1.4 V/µs100% Tested Not Tested

Gain-Bandwidth Product 8.0 5.0 – – MHz100% Tested Not Tested No Limit No Limit

Offset Voltage LT1124 100 100 250 – µVLT1125 140 – – 1000 µV

Offset Current LT1124 20 75 20 – nALT1125 30 – – 30 nA

Bias Current 30 80 60 60 nASupply Current/Amp 2.75 5.67 3.25 2.75 mAVoltage Gain, RL = 2k 1.5 0.7 0.35 0.4 V/µVCommon Mode Rejection Ratio 106 100 90 100 dBPower Supply Rejection Ratio 110 94 104 105 dBS8 Package Yes - LT1124 Yes No –

Table LT1124/1

Table 1. Performance ComparisonGuaranteed performance, VS = ±15V, TA = 25°C, low cost devices.


DESIGN FEATURES

the LTC1292 is to compensate for theloading of the bridge by resistor RS.Full scale can be adjusted by the 500kΩtrim pot and offset can be adjusted bythe 100Ω trim pot in series with RS. Alower RPLAT value than that in AN43 isused here to improve dynamic range.The signal voltage on the +IN pin mustnot exceed VREF. The differential volt-age range is VREF minus approximately100mV. This is enough range to mea-sure 0°C to 400°C with 0.1°Cresolution.

The circuit in Figure 2 demonstrateshow to float the LTC1292 to make adifferential measurement. This circuitwill digitize a 5V range from 10V to 15Vwith 12-bits of resolution. The digitalI/O has been level translated. TheLT1019-5 is used in shunt mode tocreate the floating analog ground forthe LTC1292. The digital I/O linesmake use of 4.3V zeners to clamp thesingle-transistor inverters. Opto-iso-lators can also be used. The floating

Introducing the LTC1292: 12-Bit, 8-Pin,Serial-I/O Data Acquisition System

The LTC1292 is a 12-bit data acqui-sition system that contains a 12-bit,switched-capacitor, successive-ap-proximation A-to-D converter, a differ-ential input, a sample-and-hold on the(+) input, and serial I/O. All thesefunctions are packaged in an 8-pinDIP. Given its accuracy, ease of use,and small package size, this device iswell suited for digitizing analog signalsin remote applications where a mini-mum number of interconnects andlow power consumption are impor-tant. Three circuits are presented hereto show the capabilities of the device.

The circuit in Figure 1 shows how atransducer output, such as a plati-num RTD bridge, can be digitized withone op amp. This circuit is a modifica-tion of that found in Application Note43.1 The differential input of theLTC1292 removes the common modevoltage. The LT1006 is used for ampli-fication. The resistor tied between pin3 of the LT1006 and the +IN input of

analog ground should be laid out as aground plane for the LTC1292. The47µF bypass capacitor should be tiedfrom the VCC pin to the floating groundplane with minimum lead length andplaced as close to the device as pos-sible. Likewise, keep the lead lengthfrom the GND pin to the floating groundplane at a minimum (a low-profilesocket is acceptable).

The circuit in Figure 3 digitizes thedifference in temperature between twolocations. The two LM134s are used astemperature sensors. These are ide-ally suited for remote applications be-cause they are current output devices.This allows long wires to run from thesensor back to the LTC1292 withoutany degradation to the signal from thesensor. Resistor RSET sets the currentto 1µA/°K. The current is converted toa voltage by the resistor R1 connectedfrom V– to ground. The reference volt-age and resistor were selected to give achange of 0.05°C/LSB. The resolution

by Sammy Lum

Figure 1. 0° to 400°C temperature-measurement system

–

+

+15V

1µF 4.7µF TANTALUM

500kΩ 400°C TRIM

12.5kΩ*12kΩ*

100Ω 0°C TRIM

RS 13kΩ** LT1006

1MΩ**

100pF

0.1µF

1MΩ**

–IN

+IN

GND VREF

DOUT

CLK

VCC

1N4148

22µF TANTALUM

D0

SCK

MISO

MPU (e.g., 68HC11)

LTC1292

RPLAT 100Ω RTD AT 0°C

100Ω*

TRW-IRC MAR -6 RESISTOR -0.1% 1% METLA FILM RESISTOR RPLAT = ROSEMOUNT 118MFRTD

* **

1292_1. eps

LT1027+5V

CS

DESIGN IDEAS


DESIGN FEATURESDESIGN IDEAS

Figure 3. Differential temperature-measurement system

is given by °C/LSB = VREF / ((4096)(1mA) (R1)). The maximum tempera-ture at each input is 125°C. Note that ifthe temperature on the +IN pin is lessthan the temperature on the –IN pin,the output will be zero. Because theLTC1292 is being driven from a high

source impedance, you should limit theCLK frequency to 100kHz or less.

The software code for interfacing theLTC1292 to the Motorola MC68HC11or the Intel 8051 is found in the LTC1292data sheet. The code needs to be modi-

fied for the circuit in Figure 2 to accountfor the inversion introduced by thedigital level translators. 1 Williams, Jim, “Bridge Circuits, Marrying Gain andBalance,” Application Note 43, Linear TechnologyCorp.

+15V

1µF

–IN

+IN

GND VREF

DOUT

CLK

VCC

4.7µF TANTALUM

P1.4

P1.3

P1.1

MPU (e.g., 8051)

LTC1292

1292_3. eps

LT1027

22µF TANTALUM

22µF TANTALUM

V+

V– 228Ω*

R1 10kΩ*

V+

V– 228Ω*

R1 10kΩ*

LM134

LM134

10.2kΩ*

14.7kΩ*

+5V

*1% METAL FILM RESISTOR

CS

CS

–IN

+IN

GND VREF

DOUT

CLK

VCC

1N5229

47µF TANTALUM

LTC1292

1292_2. eps

LT1019-5 1µF TANTALUM

+

+

+5V

1N4148

–INPUT

+INPUT10V TO 15V

1kΩ2N2222

2N2222

1.5kΩ

1kΩ

1kΩ1.5kΩ

1kΩ

OUT

GND

1kΩ

1kΩ

1N5229

MPU (e.g., 8051)

2N3906

+15V

1kΩ

1N4148 DIODES

1.5kΩ

P1.3

P1.1

P1.4

Figure 2. Floating, 12-bit data acquisition system


DESIGN FEATURES

FREQUENCY

1k–90.00

AMPL

ITUD

E

–50.00

–30.00

0.0

10.000

10k 100K 200K

1063_2. eps

–10.00

–20.00

–40.00

–60.00

–70.00

–80.00

CAPACITOR AT MAX VALUE

CAPACITOR AT 1/2 MAX VALUE

CAPACITOR AT MIN VALUE

DC-Accurate, Programmable-Cutoff,Fifth-Order Butterworth Lowpass FilterRequires No On-Board Clock

Figure 1. Schematic diagram of LTC1063 with programmable cutoff frequency

READ

1063_1. eps

+

–

8

LTC1063

7

6

5

1

2

3

4

15k 1%

INPUT

7.5V

.1µF

LT1007

20k

+7.5V

0.1µF

–7.5V

+7.5V

20k

1SER CLK

2SER IN

3SER OUT

VDD

PROG14

READ

15

16

6C1

C2

GND

10

8

7

4

6

2

3

2SCLK

5SD IN

3PROG

25

11

4

SD OUT

GND

11

13

5

1

10

12

6

2

74LS14

1

9

11

4

2

8

18

74LS05

3

8 974LS14

0.01µF

GNDGND

51Ω1k

+5V

6 574LS05

270Ω

25 PIN PARALLEL PORT

CONNECTOR FOR IBM PCs

AND COMPATIBLES

0.1µF

GND

+5V

VOUT

0.1µF

GND

VDD

PROGRAMMER FOR NON-VOLATILE CAPACITOR, HC2021

NOTES:1. THE HC2021 SHOULD BE LOCATED CLOSE TO THE LTC1063 FOR BEST RESULTS. 2. +3.5 ≤ VDD ≤ +18.8. 3. POSITIVE POWER SUPPLY FOR DEVICES 74LS05 AND 74LS14 IS +5V. 4. HUGHES TELEPHONE NUMBER (714) 759-2665.

1k

7.5

1k

7.5

+7.5

VIN

GND

V–

CLK OUT

VOS ADJ

VOUT

V+

CLK IN

HC2021

nal resistor and capacitor. The schemeshown here allows the filter’s cutofffrequency to be programmed usingan external microprocessor or theparallel port of a personal computer.This allows the cutoff frequency of thefilter to be set before the product isshipped.

The new LTC1063 is a clock-tun-able, monolithic filter with low-DCoutput offset (1mV typical with ±5Vsupplies). The frequency response ofthe filter closely approximates a fifth-order Butterworth polynomial.

Most users choose to tune the filterwith an on-board microprocessorand/or timer. This is quite conve-nient if these components are avail-able. If a clock is not available, theLTC1063 can be tuned with an exter-

by Richard Markell

The tuning scheme makes use ofnon-volatile, tunable capacitors avail-able from Hughes Semiconductor.These capacitors allow approximatelya decade of tuning range. More rangecould be obtained by using dual de-vices. Figure 1 shows the schematicdiagram of the application. Be sure toplace the variable capacitor as closeas possible to the LTC1063 to mini-mize parasitic elements. Figure 2shows the frequency response of thefilter when the capacitor is variedfrom minimum to half-value, and thento maximum capacitance. The pro-gramming part of the circuit may bedisconnected once the variable ca-pacitor is set. The capacitor will re-member its value until it isreprogrammed.

DESIGN IDEAS

Figure 2. LTC1063 frequency response


DESIGN FEATURES

New Device Cameos by LTC Marketing

LT1246: 1MHz Current-Mode PWMController

The LT1246 is an improved UC1842-architecture device that can operate atswitching frequencies up to 1MHz.The improvements are: It eliminatesoutput cross conduction and achieves5x shorter current-sense delay times(30ns typical), 2x tighter oscillator ac-curacy, reference tolerance, and drift,and better than 2x faster output rise/fall times. Start-up current is 4 x lower(<250µA). It is equipped with a cur-rent-sense blanking circuit that elimi-nates erratic operation and it also hasactive PWM output pulldown in un-der-voltage lockout. The 1MHz switch-ing frequency allows the use of verysmall inductors and capacitors.

LT1117 Adjustable, 800mA, Low-Dropout Regulator

The LT1117 adjustable, low-drop-out regulator provides up to 800mAoutput current with a 1.0V (typical)dropout voltage in a compact surface-mount SOT-223 package. The LT1117(adjustable) provides the most outputcurrent of any surface-mountable,low-dropout regulator. Unlike PNP low-dropout regulators, where up to 10%of the output current flows to groundas quiescent current, the LT1117 qui-escent current flows to the load, rais-ing efficiency.

Dropout voltage is a function ofload current and is guaranteed to be1.2V maximum at 800mA load cur-rent. Dropout voltage decreases withlower output currents. The LT1117reference is trimmed to ±1%. TheLT1117 has output-current limiting tominimize stress during overloadconditions. Fixed 2.85 and 5V ver-sions are available for SCSI-2 andother applications.

driving applications. This drivingcapability is achieved using a tech-nique which senses the load inducedoutput pole and adds compensation atthe amplifier gain node.

LT1217: Low Power, 10MHzCurrent-Feedback Amplifier

The LT1217 offers high speed alongwith excellent DC accuracy. The 10MHzbandwidth, 500V/µs slew rate, andfast settling time of only 280ns (to0.1%) is complemented by a DC offsetvoltage of only 1mV. Manufactured onLinear Technology’s proprietarycomplementary-bipolar process, theLT1217 draws only 1mA of quiescentcurrent. The LT1217 also features ashutdown mode that reduces supplycurrent to 350µA.

The LT1217 has a high gain- band-width product at high gains. Thebandwidth is over 1MHz at a gain of100. With a 50mA guaranteed mini-mum output current, the LT1217 isexcellent for driving cables or otherlow-impedance loads. The LT1217 op-erates on supplies from ±5V to ±15Vand can drive a 2kΩ load to ±13V with±15V supplies.

LT1217 applications include high-speed buffers, wide-band amplifiers,multi-stage active filters, high-speeddata acquisition systems, and videoamplifiers. The LT1217 comes in theindustry-standard pinout and can up-grade the performance of many olderproducts.

For further information on the aboveor any other devices mentioned in thisissue of Linear Technology, use thereader service card or call the LTCliterature service number: (800) 637-5545. Ask for the pertinent data sheetsand application notes.

Information furnished by Linear Technology Corpo-ration is believed to be accurate and reliable. How-ever, no responsibility is assumed for its use. LinearTechnology Corporation makes no representationthat the circuits described herein will not infringe onexisting patent rights.

Single, 3V Supply Family of 10-Bitand 12-Bit A/D Converters

LTC leads the pack in 3V-supplyA/D converters with three newproducts— the LTC1283 and 128910-bit and 12-bit serial-output A/Dswith 8-channel input MUX and sample-and-hold; and the LTC1287, a 12-bit,serial-output A/D with a differentialinput. All three devices are guaranteedto operate on supply voltages as low as2.7 volts.

The LTC1289 and LTC1283 allowthe input MUX to be softwareconfigured for either single-ended ordifferential inputs (or combinations ofboth). An on-chip sample-and-hold isprovided for all single-ended inputchannels. The LTC1289 can be putinto a power shutdown state in whichit consumes only 5µA of supplycurrent.

All three devices feature a three- orfour-wire serial interface that commu-nicates directly to most controllersand microprocessors.

LT1200: High-Speed Op Amp withLow Power Consumption

The LT1200 is a unity-gain-stableop amp which combines low-poweroperation with high speed and excel-lent DC characteristics. Its 50V/µsslew rate, 11MHz gain-bandwidthproduct, 430nA settling time (to 0.1%),and 1mA supply current make theLT1200 an ideal choice for applica-tions where power is at a premium.Excellent DC specifications (1mV maxi-mum VOS, 100nA maximum IOS) andhigh gain (6 V/mV) combined with thefast settling, enable the LT1200 to beused for fast data acquisition systems.

The output can drive a 2kΩ load to±12 volts with a ±15 volt supply andcan drive 500Ω to ±3 volts on ±5 voltsupplies. The circuit is stable with allcapacitive loads, a property whichmakes it useful as a buffer or in cable-

NEW DEVICE CAMEOS


DESIGN FEATURES

DESIGN TOOLSApplications on DiskNOISE DISKThis IBM-PC (or compatible) progam allows the user tocalculate circuit noise using LTC op amps, determine thebest LTC op amp for a low noise application, display thenoise data for LTC op amps, calculate resistor noise, andcalculate noise using specs for any op amp.

SPICE MACROMODEL DISKThis IBM-PC (or compatible) high density diskette containsthe library of LTC op amp SPICE macromodels. Themodels can be used with any version of SPICE for generalanalog circuit simulations. The diskette also contains work-ing circuit examples using the models, and a demonstrationcopy of PSPICETM by MicroSim.

FILTERCAD DISKFilterCAD is a menu-driven filter design aid program whichruns on IBM-PCs (or compatibles). This collection of designtools will assist in the selection, design, and implementationof the right switched capacitor filter circuit for the applicationat hand. Standard classical filter responses (Butterworth,Cauer, Chebyshev, etc.) are available, along with a CUS-TOM mode for more esoteric filter responses. SAVE andLOAD utilities are used to allow quick performance com-parisons of competing design solutions. GRAPH mode,with a ZOOM function, shows overall or fine detail filterresponse. Optimization routines adapt filter designs forbest noise performances or lowest distortion. A design timeclock even helps keep track of on-line hours.

Technical BooksLinear Databook — This 1,600 page collection of datasheets covers op amps, voltage regulators, references,comparators, filters, PWMs, data conversion and interfaceproducts (bipolar and CMOS), in both commercial andmilitary grades. The catalog features well over 300 devices.$10.00

Linear Applications Handbook — 928 pages chock full ofapplication ideas covered in-depth through 40 ApplicationNotes and 33 Design Notes. This catalog covers a broadrange of “real world” linear circuitry. In addition to detailed,systems-oriented circuits, this handbook contains broadtutorial content together with liberal use of schematics andscope photography. A special feature in this edition in-cludes a 22-page section on SPICE macromodels.$20.00Monolithic Filter Handbook — This 232 page book comeswith a disk which runs on PCs. Together, the book and diskassist in the selection, design and implementation of theright switched capacitor filter circuit. The disk containsstandard filter responses as well as a custom mode. Thehandbook contains over 20 data sheets, Design Notes andApplication Notes. $40.00

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CENTRAL REGIONLinear Technology CorporationChesapeake Square229 Mitchell Court, Suite A-25Addison, IL 60101Phone: (708) 620-6910FAX: (708) 620-6977

NORTHEAST REGIONLinear Technology CorporationOne Oxford Valley2300 E. Lincoln Hwy., Suite 306Langhorne, PA 19047Phone: (215) 757-8578FAX: (215) 757-5631

NORTHWEST REGIONLinear Technology Corporation782 Sycamore Dr.Milpitas, CA 95035Phone: (408) 428-2050FAX: (408) 432-6331

SOUTHEAST REGIONLinear Technology Corporation17060 Dallas ParkwaySuite 208Dallas, TX 75248Phone: (214) 733-3071FAX: (214) 380-5138

SOUTHWEST REGIONLinear Technology Corporation22141 Ventura BoulevardSuite 206Woodland Hills, CA 91364Phone: (818) 703-0835FAX: (818) 703-0517

U.S. AreaSales Offices

World HeadquartersLinear Technology Corporation1630 McCarthy BoulevardMilpitas, CA 95035-7487Phone: (408) 432-1900FAX: (408) 434-0507

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