leading-edge embedded nvm workshop programme · alexander kotov, sst-microchip, usa 9.45 am:...
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September 30th & October 1st, 2013 Centre Microélectronique de Provence, Gardanne, Aix en Provence area
(France)
Organized by: Supported by: Sponsored by:
Leading-Edge Embedded NVM
Workshop
PROGRAMME
Monday 30th September 2013 8.00 am: Registration – Welcome coffee
8.45 am: Workshop opening (Luc JEANNEROT, ARCSIS and Stéphane DAUZERE-PERES, Ecole des Mines de Saint-Etienne)
9.00 am: Keynote speaker, Jean DEVIN, STMicroelectronics, France «A Quiz about Embedded NVM today ‘s challenges»
Session 1 - Part 1: Embedded flash memories Technology providers: state of the art and trends
Chairpersons: Christian DUPUY (StarChip), Philippe BOIVIN (STMicroe-lectronics)
9.30 am: «The Scalability of the Split-Gate NOR Flash for future SoC applications» Weiran KONG, Grace Semiconductor Manufacturing Corporation, China
9.55 am: «Application and cost-down requirements for next genera-tion embedded non-volatile memories» Dr. Thomas WILLE, NXP Semiconductors, Germany
10.20 am: «Challenges of embedded NVM in the automotive field»Alfonso MAURELLI, STMicroelectronics, Italy
10.45 am: Break
Session 2 - Part 1: Emerging and leading-edge technologies for Non-Volatile Memories: PCM
Chairpersons: Didier SAVE (Gemalto), Bertrand SAILLET (LFoundry)
11.10 am: «Scaling challenges for MOS-selected Phase Change Memory» Paola ZULIANI, STMicroelectronics, Italy
11.35 am: «PCM Role in the Memory Technology Evolution» Roberto BEZ, Micron, Italy
12.00 pm: «Advanced thin film technology for NVM development and pilot production» Mohamed ELGHAZZALI, Oerlikon, Liechtenstein
12.25 pm: Lunch / Poster session
Session 2 - Part 2: Emerging and leading-edge technologies for Non Volatile Memories: RRAM
Chairpersons: Didier SAVE (Gemalto), Bertrand SAILLET (LFoundry)
2.00 pm: «RRAM as an Embedded NVM Technology» Christophe CHEVALLIER, Rambus, USA
2.25 pm: «Innovative materials & precoding methods to address the packaging thermal issue in RRAM» Luca PERNIOLA, CEA-LETI, France
PROGRAMME
Leading-Edge Embedded NVM Workshop
2.50 pm: «ASM ALD Solutions: Taking Memory to the next Level» Robin ROELOFS, ASM, Belgium
3.15 pm: Break
Session 2 - Part 3: Emerging and leading-edge technologies for Non Volatile Memories: RRAM and others
Chairpersons: Yves LEDUC (Polytech Sophia, Univ. of Nice), Damien DELERUYELLE (IM2NP, Aix-Marseille Univ.)
3.40 pm: «Magnetic Logic Unit (MLUTM): status and perspectives» Ken MACKAY, Crocus Technology, USA/ France
4.05 pm: «Scalable, low voltage, low cost technologies for embedded NVM applications» Igor KOUZNETSOV, Cypress Semiconductor, USA
4.30 pm: «Advances in Carbon Nanotube Memory (NRAM)» Thomas RUECKES, Nantero, USA
4.55 pm: Poster session
5.30 pm: End of the conference
8.00 pm: Conference dinner
Tuesday 1st October 2013
8.00 am: Registration - Welcome coffee
Session 1 - Part 2: Embedded flash memories technology providers: state of the art and trends
Chairpersons: Christian DUPUY (Starchip), Philippe BOIVIN (STMicroelectronics)
8.30 am: «Foundries Model in Leading Edge eNVM with broad portfo-lio for increasing market demands» Danny SHUM, GlobalFoundries, Singapore
8.55 am: «Leading performances and competitiveness for embedded security: how to get both?» Isabelle CONSTANT, LFoundry, France
9.20 am: «Three Generations of SuperFlash Split Gate Cell: Scaling Aspects - Program Disturb» Alexander KOTOV, SST-Microchip, USA
9.45 am: «Development of embedded flash in 65nm for automotive, industrial and consumer products» Christian PETERS, Infineon Technologies, Germany
10.10 am: Break
Session 2 - Part 4: Emerging and leading-edge technologies for Non-Volatiles Memories: RRAM and others
Chairpersons: Yves LEDUC (Polytech Sophia, Univ. of Nice), Damien DELERUYELLE (IM2NP, Aix-Marseille Univ.)
PROGRAMME
Leading-Edge Embedded NVM Workshop
10.35 am: «Printed Technologies at CEA Liten: Apllications to Non Volatile Memories on Flexible Substrate» Romain COPPARD, CEA-Liten, France
11.00 am: «Materials and Integration of e-NVM: Classic and New Approaches» Er-Xuang PING, Applied Materials, USA
Session 3 - Part 1: Device and architectures
Chairpersons: Jean-Michel PORTAL (IM2NP, Aix-Marseille Univ.), Arnaud VIRAZEL (LIRMM)
11.25 am: «Understanding operation and reliability of Hf-based RRAM Devices Through a Microscopic, Material Related Physical Model» Andrea PADOVANI, University of Modena and Reggio Emilia, Italy
11.50 am: «Emerging Resistive Memories: Compact Models» Marc BOCQUET, IM2NP, France
12.15 pm: «Design Exploration of Hybrid ICs using CMOS and ReRAM Technologies» Olivier THOMAS, CEA-Leti, France
12.40 pm: Lunch / Poster Session
Session 3 - Part 2: Device and architectures
Chairpersons: Jean-Michel PORTAL (IM2NP, Aix-Marseille Univ.), Arnaud VIRAZEL (LIRMM) PROGRAMME
2.00 pm: «Magnetic Memory and embedded processors» Lionel TORRES, Laboratory of Information Technology, Robotics and Microelectronics of Montpellier, France
2.25 pm: «Testing and Tolerating Faults in TAS-MRAMs» Valentin GHERMAN/Joao AZEVEDO, CEA List / LIRMM, France
2.50 pm: «Non-Volatile memories: a breakthrough for cognitive computing» Damien QUERLIOZ, Institut d’Electronique Fondamentale, France
3.15 pm: Break
Session 4: Users, applications and security
Chairpersons: Assia TRIA (CEA-EMSE), Didier NEE (Inside Secure)
3.40 pm: «Looking for low power, fast and cost efficient e-NVM for digital security» Pascal LEROY, Gemalto, France
4.05 pm: «True and false ideas about the eligibility of leading edge NVM technologies for automotive applications» Hugues RAYNAL, Continental, France
4.30 pm: «Recovering data from flash memories»Lieutenant Matthieu REGNERY, Institut de Recherche Criminelle de la Gendarmerie Nationale, France
4.55 pm: End of the day
5.00 pm: Conference closure
Leading-Edge Embedded NVM Workshop
Resistive switching in the AM4Q8 Mott insula-tors: from the avalanche breakdown mecha-nism to Mott memories and memristors - J. Tranchant, L. Cario, E. Janod, B. Corraze, M.-P. Besland (Institut de Matériaux Jean Rouxel (IMN), Université de Nantes, CNRS, France)
Determination of physical properties of semi-conductor-oxide-semiconductor structures using a new fast gate current measurement protocol - Philippe Chiquet, Romain Laffont, Fré-déric Lalande, Jeremy Postel-Pellerin (Université d’Aix-Marseille, France - IM2NP) / Pascal Masson (Université Nice-Sophia Antipolis, France) / Gilles Micolau (Université d’Avignon, France) / Arnaud Regnier (STMicroelectronics)
Posters Exhibitors
SST, Silicon Storage TechnologyA wholly owned subsidiary of Microchip
SST / Microchip450 Holger WaySan JoseCalifornia 95134United States Phone:+1 408-961-6400 Email: [email protected]: www.sst.com
EXHIBITION ROOM
Leading-Edge Embedded NVM Workshop
Organized by:
Event supported by:
September 30th - October 1st, 2013 Centre Microélectronique de Provence, Gardanne
Leading-Edge Embedded NVM
September 30th & October 1st, 2013 Centre Microélectronique de Provence, Gardanne, Aix en Provence area
(France)
Leading-Edge Embedded NVM Workshop
Contacts:Corinne Joachim / Charlène Froment
+33 (0)4 42 53 81 50email: [email protected]
website: http://www.e-nvm.org
ARCSIS is supported by:
Organized by: Supported by: Sponsored by: