keystone soc training srio demo:...
TRANSCRIPT
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KeyStone SoC Training SRIO Demo: Board-to-Board
MMI Application Team
December 2011
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Agenda
• Model
• Protocol
• Configuration
• Application Algorithm
• Build and Run
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The Model
One or more DSPs
Producer collects data from
external world
Consumer
(Core)
Consumer
(Core)
Consumer
(Core)
Consumer
(Core)
Consumer
(Core)
Consumer
(Core)
SRIO Channels
Requirements:
• Efficiency – Not fairness
• Minimize master logic
• Master is not aware of structure of internal cores
Producer = Master Consumer = Slave
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Agenda
• Model
• Protocol
• Configuration
• Application Algorithm
• Build and Run
![Page 5: KeyStone SoC Training SRIO Demo: Board-to-Boardprocessors.wiki.ti.com/images/7/78/Eindhoven_JAN_12-12... · 2012-02-03 · KeyStone SoC Training SRIO Demo: Board-to-Board MMI Application](https://reader033.vdocuments.site/reader033/viewer/2022042015/5e73cdd9acd37421581d2e11/html5/thumbnails/5.jpg)
Producer (Master) Protocol
Producer Initialization
Wait until there is enough data.When there is enough data, continue.
1. Discard all pending messages in the mailbox.2. Send request message to all Consumers.3. Wait for the first acknowledge message to arrive.
Send TOKEN message with data to the first consumer whose acknowledge message has arrived.
Producer = Master Consumer = Slave
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Consumer (Slave) Protocol
Consumer Initialization
Wait until there is a message in the mailbox.
Send an acknowledge
message to the Producer.
Is this a
REQUEST
message?
Yes
No
Is this a
TOKEN
message?
Yes Processing the data.
Processing time is
data dependent.
No
Error.
Wait for a new message.
Producer = Master Consumer = Slave
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Agenda
• Model
• Protocol
• Configuration
• Application Algorithm
• Build and Run
![Page 8: KeyStone SoC Training SRIO Demo: Board-to-Boardprocessors.wiki.ti.com/images/7/78/Eindhoven_JAN_12-12... · 2012-02-03 · KeyStone SoC Training SRIO Demo: Board-to-Board MMI Application](https://reader033.vdocuments.site/reader033/viewer/2022042015/5e73cdd9acd37421581d2e11/html5/thumbnails/8.jpg)
Hardware Components
TMS320C6678 Core
DDR and Internal Memory
Multicore Navigator
Queue Manager
Subsystem (QMSS)
Packet DMA (PKTDMA)
SRIO PKTDMA
SRIO Hardware
Descriptor
Area
Buffer Area
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Packet DMA Topology
PKTDMA
PKTDMA
PKTDMA
PKTDMA
PKTDMA
PKTDMA
Queue Manager SRIO
Network
Coprocessor
FFTC (A)
AIF
8192
5
4
3
2
1
0
.
. .
Queue Manager Subsystem
Multiple Packet DMA instances in KeyStone devices:
• PA and SRIO instances for all KeyStone devices.
• AIF2 and FFTC (A and B) instances are only in KeyStone devices for wireless applications.
FFTC (B)
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QMSS Descriptors Queuing
Region 1
Region 2
index 0
index 9
index 10
index 14
Link
RAM
Head
Ptr0x7ffff
Push index 0 to an empty queue
(starting condition)
Region 1
Region 2
index 0
index 9
index 10
index 14
Link
RAM0x7ffff
Head
Ptr0
Push index 0 to an empty queue
(ending condition)
• The Queue Manager maintains a head pointer for each
queue, which are initialized to be empty.
• We actually do not push indexes; We push descriptor
addresses. The QM converts addresses to indexes.
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Main Code
System_init
Enable_srio
srioDevice_init()
srio_init()
initializedMain
Start
multicoreTestTask
Exit main.
multicoreTestTask
TestMulticoreUser
ThreadInitialization
(queues/ channels/ interrupts)
slaveTaskInitialization
or
masterTaskInitialization
(sockets/buffers)
End of
Initialization
“Generic”
Initialization
(Main)
Application-based
Initialization
(BIOS Task)
Configuration/Initialization Flow
C o n f i g u r a t i o n S t e p s :
1 . Q M S S
2 . G e n e r i c P K T D M A
3 . Q M S S P K T D M A
4 . S R I O
5 . S R I O P K T D M A
6 . S o c k e t s
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QMSS Initialization
• Qmss_init (qmss_drv.c) – Number and location of the link RAM – Number of descriptors – APDSP firmware – Set global structure qmssLobj to be used later
• Qmss_start (qmss_drv.c) – Load global structure into local memory of each core
• Qmss_insertMemoryRegion (qmss_drv.c) – Base address of each region – Number of descriptors – Size of descriptors – Region type – How the region is managed (either by the LLD or the application) – Region number (or not specified)
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Global PKTDMA (CPPI) Initialization
• cppi_init (cppi_drv.c) loads all instances of PKTDMA from the global structure cppiGblCfgParas, which is defined in the file cppi_device.c – SRIO
– PA
– QMSS
– AIF (wireless applications only)
– FFTC (wireless applications only)
– BCP (wireless applications only)
• SRIO PKTDMA (CPPI) configuration after SRIO configuration
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SRIO Layers
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SRIO Physical Layer
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SRIO Initialization
• enable_srio – Power
– PLL/Clock
• srioDevice_init – Handle for the SRIO instance
– SERDES
– Port
– Routing and queues
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SRIO PKTDMA (CPPI) Initialization
• Configure SRIO PKTDMA
• Set the Rx routing table to the following default locations:
• Type 11
• Type 9
• Direct IO
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Application-specific Configuration “All Cores” Initialization
1. Create and initialize descriptors.
2. Allocate data buffers.
3. Associate a receive queue with each core.
4. Define receive free queue.
5. Define receive flows.
6. Define and configure transmit queues.
7. Enable transmit and receive channels.
8. Connect SRIO interrupts.
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Open Sockets
• Srio_sockOpen() opens a socket
• Srio_sockBind() binds the opened socket to routing
– Segmentation mapping
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Agenda
• Model
• Protocol
• Configuration
• Application Algorithm
• Build and Run
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Producer (Master) Application Algorithm
Follow the protocolto find an available core.
Generate variable size datausing the generic functiongenerateApplicationData()
Send a TOKEN message with data to an available core.
Master Algorithm Flow
Run Forever
Producer = Master Consumer = Slave
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Consumer (Slave) Application Algorithm
Consumer Initialization
Wait until there is a message in the mailbox.
Send an available
message to the Producer.
Is this a
REQUEST
message?
Yes
No
Is this a
TOKEN
message?
Yes Processing the data.
Processing time is
data dependent.
No
Error.
Wait for a new message.
Producer = Master Consumer = Slave
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Code Change: Producer
generateApplicationData(
fftInputBuffer[0],
¶meter1) ;
size = 1 << parameter1 ;
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Code Change: Consumer
else if (messageValue == TOKEN)
{
applicationCode (
ptr_rxDataPayload, parameter1,
coreNum);
}
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Agenda
• Model
• Protocol
• Configuration
• Application Algorithm
• Build and Run
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Breakout Connector Board
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C6678L w/ Mezzanine Emulator
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Build and Run Process
1. Unzip the two projects (producer and consumer).
2. Update the include path (compiler) and the files search path (linker).
3. Build both projects.
4. Connect DSP 0 and load producer to all cores.
5. Connect DSP 1 and load consumer to all cores.
6. Run DSP 0 and DSP 1.
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Expected Results
[C66xx_3] fft size 512 output 800058b0 real 8000bd00 imag 80009d00
[C66xx_2] fft size 128 output 800050a0 real 8000b900 imag 80009900
[C66xx_7] fft size 64 output 800078f0 real 8000cd00 imag 8000ad00
[C66xx_4] fft size 32 output 800060c0 real 8000c100 imag 8000a100
[C66xx_0] fft size 512 output 80004080 real 8000b100 imag 80009100
[C66xx_1] fft size 512 output 80004890 real 8000b500 imag 80009500
[C66xx_2] fft size 128 output 800050a0 real 8000b900 imag 80009900
[C66xx_7] fft size 512 output 800078f0 real 8000cd00 imag 8000ad00
[C66xx_4] fft size 512 output 800060c0 real 8000c100 imag 8000a100