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Volume 7, Number 4, April 2010 (Serial Number 65)

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Journal of Communication and Computer

Volume 7, Number 4, April 2010 (Serial Number 65)

Contents Theoretical Computer Science

1 An Optimal Management for SoC Memory Omar Saeed Al-Mushayt

5 An Analysis of Multiple Tag Co-existence Method for Generating Multiple Reader Co-existence Proof Aik Theng Tan, Rahmat Budiarto and Zainal Arifin Hasibuan

15 New Heuristic Rounding Approaches to the Quadratic Assignment Problem Wajeb Gharibi and Yong Xia

Computer Network and Information Security 19 Reviews on Well-known Evaluation Norms of Web-based Courses

Yan Dong, Lu Zhang and Baoping Li 24 Performance Analysis with Enhanced Distributed Channel Access (EDCA) in IEEE 802.11e for Real

Time Video Streaming (MPEG-4) in Multi-hop MANET Mohammad Abdul Matin and Najah Ahmed Naaji

30 Global Exponential Stability of Fuzzy Cellular Neural Networks with Constant Delays Wei Luo, Qianhong Zhang, Guozheng Wang and Changjin Xu

35 Development of a Web-based Interface for the ISA Simulator Hideaki Yanagisasa, Minoru Uehara and Hideki Mori

43 Decomposition of Graphs Representing the Contents of Multimedia Data Hochin Teruhisa

Communications and Information Processing 50 A Novel Scheme for Generating and Transmitting UWB Signals

Mithilesh Kumar, Ananjan Basu and Shiban K. Koul 56 Pattern Development Technology for Heterogeneous Enterprise Software Systems

Sergey Victorovich Zykov 62 Rapid Development and Application of CPLD for BLDCM Controller

Yigeng HuangFu, Ruiqing Ma and Yongliang Yang 66 Obstacles of Development and Usage of Information Technology in Public Organizations (Case Study)

Yaghoubi Nourmohammad, Arab Mohammad ali and Pourshahabi Vahid

Other Issues 70 Internet Usage among Teachers and Students in Science Teaching and Learning

Rossafri Mohamad and Afizah Musa 78 Research on Evaluation of Green Degree of Vehicles Reverse Logistics System

Ying Dai and Changbing Jiang

Apr. 2010, Volume 7, No.4 (Serial No.65) Journal of Communication and Computer, ISSN 1548-7709, USA

An Optimal Management for SoC Memory

Omar Saeed Al-Mushayt Dean of Computer Science & Information, Systems College, Jazan University, Jazan 82822-6694, KSA

Received: February 08, 2010 / Accepted: March 10, 2010 / Published: April 25, 2010.

Abstract: In this paper, the author proposes an optimal management for system on chip (SoC) memory by using the reserved memory components and solving the covering fault problem. This method will enable to realize many services, such as SoC diagnosis with given resolution of fault location, real-time functional testing of input patterns and analysis of output reactions. Key words: Diagnosis, system on chip, infrastructure intellectual property, fault, built in repair analysis, built in self repair.

1. Introduction

The memory diagnosis and repair problem [1-16] is related to the tendency of continuous reduction of chip area, which is allocated to original and standardized logic, and simultaneous growth of embedded memory. At present, most of publications, which cover SoC (system on chip) testing, diagnosis and repair problems, are related to the duplication of logic elements or chip regions to double hardware realization of functionality and application of genetic algorithms for memory diagnosis and repair.

The complexity of computational hardware for modern digital systems on a chip is characterized by millions of equivalent gates and it requires developing and implementation of new high-level design technologies, such as: Electronic System Level (ESL) Design, Transaction Level Modeling (TLM) and embedded service – Infrastructure Intellectual Property (I-IP). This means that the search for high-performance methods and facilities [1] reduces all researchers to the necessity of increasing an abstraction level for the Functional Intellectual Property (F-IP) models, which are created and embedded into a chip.

There are three procedures carried out in the process

Corresponding author: Omar Saeed Al-Mushayt, assistant

professor, research fields: computer science, management systems. E-mail: [email protected].

of operation and repair for any type of memory: (1) Memory testing that consists of test patterns

input, which oriented on identification of specific kinds of faults [2];

(2) In the case of fault appearance, it is necessary an additional diagnosis procedure that enables to determine location, cause and kind of fault;

(3) After fault detection, which blocks carrying out of the memory function, it is necessary to activate the repair process – replacement of faulty elements by spares, which initially are on a chip [3, 4].

So, it is necessary to apply a special mechanism for memory repair, by the means of replacement of faulty components by faultless ones from the chip reserve. As a rule, the testing procedure is realized by BIST (Built-In Self Test) block, which is hardware fast-acting generator of test patterns, as well as an analyzer (signature) of reactions of memory outputs on test patterns. (Fig. 1).

The following proposed method will enable to carry out the memory repair automatically in the operating process through embedded hardware or software implementation – a service I-IP module for fault repairing. The management of Soc memory will provide not only fast response of carrying out of functions, but also flexibility that is appropriate to software concerning design error correction.

The paper is organized as follows: Section 2 contains

An Optimal Management for SOC Memory

2

F-IP:FunctionalIntellectual

Property

Fault Simulator

SoC

Analyser(signature)

Infrastucture IP

ATPG

Diagnosis

Fault DetectionTable

IEEE 1500 Standard

Fig. 1 Infrastructure intellectual property of SoC.

management SoC memory. Section 3 describes our proposed algorithm for management Soc memory. Section 4 includes on chip-benefits and services of the proposed method. Conclusions are given in the last section.

2. Management SoC Memory

The management of SoC memory is the representation of an exact method of memory elements diagnosis and repair by using the spares that enable to cover a set of faulty cells by the minimum possible quantity of spares. This method is oriented on implementation of the Infrastructure Intellectual Property for SoC functionality.

In fact, memory module has two parts: (1) Functional cells, which are used for data and

program storage, when a module is used in SoC; (2) Reserve or spare cells, which are designed for

memory repair in case of functional cells failure. Functional and reserve cells are joined together in

the form of columns and rows. The repair analysis consists of definition of covering

possibility of faulty memory elements by available reserve components. When a fault is detected, a row (a column), which includes a faulty element, is disconnected from the functional structure of memory cells and a row (a column) from chip reserve is connected on its place. The number of reserve components is limited, so it is necessary to apply a special mechanism of effective allocation of repair resource, for support of faulty memory elements

covering by the minimum possible quantity of redundant rows and columns.

The search procedure of faulty cells covering by the minimum quantity of reserve rows and columns described above can be realized as on-chip repair module or external one [5]. In the second case data about errors is received from external modules; they are processed and pass to the controller that provides memory repair. It results in considerable time loss. So, the preferable solution is on-chip module realization, when data about errors is passed from BIST directly. Such mechanism is called as BIRA [6-8] – Built-In Repair Analysis.

Memory repair is realized by disconnection of faulty elements (rows and columns of a matrix) by means of electrical fusion of metal links and connection of reserve ones. The fuse process can be electrical or laser. Electrical fuse equipment has smaller dimensions than laser one and it is used more frequently. Fuse is carried out by means of an instruction set, which can be stored in permanent memory inside chip (hard repair) or in random-access memory (soft repair) [9, 10]. Soft repair has several advantages: when a defect appears, a new corrected instruction can be recorded to memory easily; there provide economic use of chip area and sufficient reliability. Hard repair enables to use a simplified manufacturing test and provides detection of errors, which cannot be fixed by soft repair under certain circumstances (for instance, overheat) [11].

The structure of on-chip memory analysis built-in and soft repair processes (BISR) is represented in Fig. 2.

Fig. 2 Flow of on-chip memory analysis and repair.


3

3. Algorithm for Management SoC Memory

The management algorithm steps can be summar- ized as follows:

(1) Chip activation, filling of the BISR register by zero values;

(2) Run the BIST controller. Memory testing and accumulation of information about faulty cells in the BIRA register;

(3) Transfer of information about faulty cells to the BISR register for subsequent fusion;

(4) Scanning the BIRA registers, which contain the repair status, by the BIST controller for obtainment of faults information;

(5) Run the fuse controller in record mode and transfer the repair instructions from the BISR;

(6) Chip restart. Recording the fuse information to the BISR register, replacement of faulty rows and columns by reserve components is fulfilled;

(7) Run the BIST controller for repeated memory testing and verification of the repair result correctness.

4. On Chip: Benefits and Services

By applying the proposed algorithm, we can obtain many benefits, services on chip, such as:

(1) Observation for state of input and output lines in functioning, verification and testing of standard blocks on the basis of utilization of the boundary scan standard IEEE 1500 [12-16];

(2) Testing of functional modules by means of input of the fault detection patterns from different test generators, which are oriented on the verification of faults or fault-free state;

(3) Fault diagnosis by means of analysis of an information obtained on the testing stage and utilization of special methods of embedded fault search on the basis of the standard IEEE 1500;

(4) Repairing of functional modules and memory after fixation of negative testing result, fault location and its type on diagnosis stage;

(5) Measurement of the general characteristics and parameters of a device operation on the basis of

on-chip facilities, which enable to make time and volt-ampere measurements;

(6) Reliability and fault tolerance of a device operation in working that is obtained by diversification of functional blocks, redundancy of them and repair of SoC in real time;

(7) Finally, the practical importance of the research consists of implementation of the method to SoC Functional Intellectual Property Infrastructure.

5. Conclusions

In the future, system on chip memory will occupy more than 90% of chip area that is oriented on the use of flexible software.

On-chip repair is oriented on all objects, which have an address: memory, multiplexers, matrix processors. If it is necessary to repair other structures, they must be designed with an allowance for component addressability. The addressability and regularity of components turn a system into reliable, robust, repairable and durable ones.

References [1] J. Bergeron, Writing Test Benches: Functional

Verification of HDL Models, Springer, 2003, p. 512. [2] Y. Zorian, Today’s SoC test challenges, in: ITC

International Test Conference, 2005. [3] S. Shoukourian, V. Vardanian, Y. Zorian, SoC Yield

Optimization via an Embedded-memory Test and Repair Infrastructure, IEEE Design and Test of Computers (2004) 200-207.

[4] V. Hahanov, W. Gharibi, K. Mostovaya, Embedded method of SoC memory repairing, Electronics and Electrical Engineering 90 (2009).

[5] P. Rashinkar, P. Paterson, L. Singh, System-on-chip Verification: Methodology and Techniques, Kluwer Academic Publishers, 2002, p. 393.

[6] Y. Zorian, S. Shoukourian, Embedded-memory test and repair: infrastructure IP for SoC yield, IEEE Design and Test of Computers (2003) 58-66.

[7] Y. Zorian, A. Yessayan, IEEE 1500 utilization in SoC design and test, in: ITC International Test Conference, 2005.

[8] IEEE-1800 IEEE Standard for System Verilog Language, 2005, p. 586, available online at: http://ieeexplore.ieee. org/servlet/opac?punumber=10437.


4

[9] L. Youngs, S. Paramanandam, Mapping and repairing embedded-memory defects, IEEE Design and Test of Computers (1997) 18-24.

[10] A.N. Parfentiy, V.I. Hahanov, E.I. Litvinova, SOC Infrastructure intellectual property models, ASU and Automation Devices С (2007) 83-99.

[11] V.I. Hahanov, I.V. Hahanova, VHDL + Verilog = synthesis for minutes, SMIT, Kharkov, 2007, p. 264.

[12] Z. Yervant, What is infrastructure IP, IEEE Design & Test of Computers, May-June, 2002, pp. 5-7.

[13] IEEE 1500 Web Site, available online at: http://grouper.

ieee.org/groups/1500/. [14] M. F. Bondarenko, G.F. Krivoula, V.G. Ryabtsev, S.A.

Fradkov, V.I. Hahanov, Design and Diagnosis of Computer Systems and Networks, NMTS VO, Кiev, 2000, p. 306.

[15] V. Hahanov, E. Litvinova, V. Obrizan, W. Gharibi, Embedded method of SoC diagnosis, Electronics and Electrical Engineering 88 (2008).

[16] V. Hahanov, W. Gharibi, K. Mostovaya, embedded method of SoC memory repairing, Electronics and Electrical Engineering 90 (2009).

Apr. 2010, Volume 7, No.4 (Serial No.65) Journal of Communication and Computer, ISSN 1548-7709, USA

An Analysis of Multiple Tag Co-existence Method for Generating Multiple Reader Co-existence Proof

Aik Theng Tan1, Rahmat Budiarto1 and Zainal Arifin Hasibuan2 1. School of Computer Sciences, Universiti Sains Malaysia, Pulau Pinang 11800, Malaysia

2. School of Computer Science, University of Indonesia, Kampus UI, Depok 16424, Indonesia

Received: January 13, 2010 / Accepted: February 04, 2010 / Published: April 25, 2010.

Abstract: There are a lot of multiple RFID (Radio Frequency Identification) tag proofs have been developed by researchers. However, the ability for these proofs to generate multiple RFID reader co-existence proof still in a question. There is no re-simulation for these network protocols in generating multiple RFID reader co-existence proofs have been done. Hence, this paper will reveal out the ability for generating multiple RFID reader co-existence proof by applying these previous multiple RFID tag co-existence proofs with the condition the flow for the network protocols remain same. This analysis will re-use yoking proof, on existence proof, an improved proof, ordinal authentication protocol for RFID tags and grouping proof for generating multiple RFID reader co-existence proof. There are two types of network protocols for generating multiple RFID tag co-existence proof: (1) tags dependent each other for generating hash value and message authentication code; (2) tags independent each other for generating hash value and message authentication code. Hence, these two types of network protocols will be the main focus in this research work to reveal out whether when applying in two readers in a field of RFID tag they are able to generate multiple RFID reader co-existence proof. Key words: RFID (Radio Frequency Identification), RFID tag, RFID reader, Network Protocol.

1. Introduction

Yoking Proof was developed by Juels in 2004 [1] for generating multiple RFID (Radio Frequency Identification) tag co-existence proof. The proof was critiqued by J. Saito and Sakurai due to vulnerable to replay attack. Hence, J.Saito and Sakurai have developed a Grouping Proof which applying timestamp to generate multiple tag co-existence proof. Even though timestamp has been developed but replay attack still could occur. According to Piramuthu in [2], eavesdropper might send few timestamps to guess the time for the event occurred [3].

Aik Theng Tan, master, research fields: smartcards, security.

E-mail: [email protected]. Corresponding author: Rahmat Budiarto, Ph.D., associate

professor, research fields: network security, intelligent systems. E-mail: [email protected].

Zainal Arifin Hasibuan, Ph.D., lecturer, research fields: information retrieval, grid computing, security. E-mail: [email protected].

To be secure, message authentication code [4] (MAC) generated by tag should include the hash value generated by itself as one of the inputs message for MAC to prevent replay attack occurs [5, 6]. On Existence Proofs for Multiple RFID Tags developed by Piramuthu [3] helps to prevent replay attack occurs but it cannot applies to proof multiple RFID reader co-existence because of network protocol issue. There was another proof developed by Thiti Nuamcherm, et al., called An Improved Proof for Multiple Tags [7]. The different in between this proof compares to others is each of the tag does not depend to each other for generating the hash value and the MAC. This paper investigates whether yoking proof, on existence proofs for multiple RFID tags, an improved proof for RFID tags, ordinal authentication protocols for RFID tags and grouping proof can be used to generate co-existence multiple reader proof. The flow of the cryptographic remains the same without changing and

An Analysis of Multiple Tag Co-existence Method For Generating Multiple Reader Co-existence Proof

6

they are simulated under two RFID readers in a field of RFID tag [8].

Rest of the paper is organized as follows: Section 2 (Yoking Proof), 3 (On Existence Proof), 4 (Ordinal Authentication Protocol), 5 (An Improve Proof), 6 (Grouping Proof) will be described on how multiple RFID tag and multiple RFID reader co-existence proofs have been generated. At last will be the conclusion for this paper.

2. Yoking Proof for Multiple RFID Tags

Fig. 1 show that the Yoking Proof is applied to proof co-existence multiple tag. The description about the proof is as followed.

(1) The server sends a random number r to reader. (2) The reader sends the random number r to tag A. (3) Tag A starts to generate a hash value ra applying

xa on r and transmitting its back to reader. (4) Reader receives hash value from tag A and

sending ra and r to tag B. Tag B generates hash value rb by applying xb on r and applying xb on ra for generating MAC mb.

(5) mb and rb are sent to reader by tag B. (6) Reader sends rb to tag A and tag A applies xa on

rb for generating MAC ma. (7) Finally, reader computes PAB= (A,B,ma,mb)

and submits to server for verification Fig. 2 show that Yoking Proof is applied to proof

multiple reader co-existence under 1 RFID tag existences as follow.

(1) First, reader 1 and reader 2 each receives random number r1 and r2 from server.

(2) Then, reader 1 and reader 2 transmit r1 and r2 to tag A.

(3) Tag A starts to generate hash values for both random numbers, let’s called it r1a and r2a. r1a and r2a were generated by applying xa on r1 and r2 respectively.

(4) Tag A transmits both of these hash values to reader 1 and reader 2. Reader 1 receives r1a while reader 2 receives r2a.

(5) Both of these readers start for looking another tag to generate the MAC.

From Fig. 2, we can summaries that without another tag appearances, there would no complete parameters can be submitted to server for verification. Hence, Yoking Proof was unable to generate co-existence multiple reader proof without more than 1 RFID tag existences. Fig. 3 shows an actual multiple reader co-existence proof by applying Yoking proof.

3. On Existence Proofs for Multiple RFID Tags

Fig. 4 shows on Existence Proof is applied to proof multiple tag co-existences. The descriptions about the proof are as followed.

(1) The server sends a random number r to reader. (2) The reader sends the random number r to tag A. (3) Tag A starts to generate a hash value ra by

applying xa on r and transmitting its back to reader. (4) Reader receives hash value from tag A and sends

ra and r to tag B for generating hash value and message authentication code. rb is generated by applying xb on r while message authentication code mb is generated by applying xb on r and ra.

(5) mb and rb are sent to reader by tag B. (6) Reader sends mb to tag A and applying xa on mb

for generating message authentication code ma. (7) Finally, reader computes PAB= (ra,rb,r,ma,mb)

and submitting to server for verification. Fig. 5 show that on Existence Proof is applied to

proof co-existence multiple reader under 1 RFID tag existences.

The steps are as followed: (1) First, reader 1 and reader 2 each receives random

number r1 and r2 from server. (2) Then, reader 1 and reader 2 transmit r1and r2 to

tag A. (3) Tag A starts to generate hash values for both

random numbers, let’s called it r1a and r2a.

(4) Tag A transmits both of these hash values to reader 1 and reader 2. Reader 1 receives r1a and reader 2 receives r2a.


7

r1

r1a,r1

r2

r1a,r1

m1a = MACxa [?]

Reader 2 Reader 1

r2a,r2

m2a = MACxa [?]

Tag TA

r2a,r2

P1= (r1a,r1,?)

P2= (r2a,r2,?)

Without another tag existing, multiple reader

existence proof could have not generated

r1 r2

r1a,r1 m1a = MACxa [r1b]

Reader 2 Reader 1

r2a,r2

m2a = MACxa [r2b]

Tag TA

r1a,r1 r2a,r2

P1= (r1a,r1,r1b,m1b,m1a)

P2= (r2a,r2,r2b,m2a,m2b)

m1b = MACxb [r1a]

m2b = MACxb [r2a]

Tag TB r1b, m1b

r1b

m1a

r2b

m2a

r2b, m2b

Fig. 1 Yoking Proof.

Fig. 2 Yoking Proof applied under two readers in a tag’s field.

Fig. 3 Completed multiple reader proof applying Yoking Proof.

A,ra

r

rb

ma

r,ra

B,mb,rb

Reader Tag B

mb= MACxb [ra]

PAB= (rb,r,ra,ma,mb)

Server

ma= MACxa [rb]

Tag A


8

Fig. 4 On Existence Proof.

(5) Both of these readers start for looking another tag to generate a message authentication code by sending (r1,r1a) from reader 1 and (r2,r2a) from reader 2.

From Fig. 5, we can summaries that without another tag appearances, there would no complete parameters can be submitted to server for verification. Hence, On Existence Proof is unable to generate co-existence multiple reader proof without more than 1 RFID tag. Fig. 6 shows an actual multiple reader co-existence proof generated by applying On Existence proof.

4. Ordinal Authentication Protocols for RFID Tags

Fig. 7 shows that Ordinal Authentication Protocols for RFID Tags is applied to proof multiple tag co-existences. The descriptions about the proof are as followed:

(1) The reader broadcasts a request signal to check the presence of a couple of tags [9].

(2) Once receiving the signal, tag A and tag B will respectively generate random numbers, ntA and ntB, and reply them to the reader [9].

(3) When the reader receives the random numbers ntA and ntB, it will decide the communication sequence. Whatever the reader first receives will be its priority. If the random numbers are received at the same time, the reader will randomly decide the sequence [9].

(4) Without loss of generality, we assume that the reader chooses tag A as the first priority. Then, the reader generates a random number nr, and broadcasts Order, ntA, ntB, and nr to the tags. When tag A and tag

B receive the message, they will know their priority in communication [9].

(5) Tag A computes mA= HKS (nr, ntA, ntB) and send it to the reader [9].

(6) Once receiving mA, the reader broadcasts the command Wake, mA and ntB. Since the third parameter is equal to tag B’s random number, tag B will be waked up. Then, tag B uses KS to check the validation of mA. If it is correct, tag B computes mB and sends it back to the reader, where mB=HKS (mA, nr, ntB) [9].

(7) After receiving mB, the reader transmits PAB to backend server for verification, where PAB = (ntA, ntB, nr,mA,mB) [9].

Fig. 8 shows that Ordinal Authentication Protocols for RFID Tags is applied to proof co-existence multiple reader under 1 RFID tag existences.

The steps are as followed: (1) The readers broadcast a request signals to check

the presence of a tag. (2) When the tag receives broadcast signals, it will

decide the communication sequence. Whatever the broadcast signal first receives will be its priority.

(3) Tag generates random number ntA1 and ntA2 for each reader 1 and reader 2 once received broadcast signals from readers.

(4) Reader 1 and Reader 2 each generate random number nr1 and nr2.

(5) The message authentication code MAC unable to generate because it’s requires two random numbers from different tags as inputs.

A,ra

r

rb

ma

r,ra

B,mb,rb

Reader Tag B

mb= MACxb [ra,r]

PAB= (rb,r,ra,ma,mb)

Server

ma= MACxa [mb,ra]

Tag A


9

r1

r1a,r1

r2

r1a,r1

m1a = MACxa [?,r1a]

Reader 2 Reader 1

r2a,r2

Tag TA

r2a,r2

P1= (r1a,r1,?)

P2= (r2a,r2,?)



r1 r2

r1a,r1 m1a = MACxa [m1b, r1a]

Reader 2 Reader 1

r2a,r2

m2a = MACxa [m1b, r1a]

Tag TA

r1a,r1 r2a,r2

P1= (r1a,r1,r1b,m1b,m1a)

P2= (r2a,r2,r2b,m2a,m2b)

m1b = MACxb [r1a, r1]

m2b = MACxb [r1a, r1]

Tag TB r1b, m1b

r1b

m1a

r2b

m2a

r2b, m2b

Fig. 5 On Existence Proof applied under two readers in a tag’s field.

Fig. 6 Completed multiple reader proof applying On Existence Proof.

From Fig. 8, we can summaries that without another tag appearances, there would no complete parameters can be submitted to server for verification. Hence, Ordinal Authentication Protocols for RFID Tags Proof is unable to generate co-existence multiple reader proof without more than 1 RFID tag. Fig. 9 shows an actual multiple reader co-existence proof generated by applying Ordinal Authentication Protocols for RFID Tags proof.

5. An Improved Proof Applied to Proof Multiple Reader Co-existence

Fig. 10 shows that An Improved Proof is applied to proof co-existence multiple tag. The descriptions about the proof are as followed:

(1) The server sends a random number r to readers. (2) Reader sends the random number r to tag A and

tag B.


10

request

request

ntA,

nr, ntA, ntB

ma

Reader

ma=MACxa [nr, ntA, ntB]

Tag B

mb= MACxb[ma, nr, ntB]

PAB=(ntA,ntB, nr,,ma,mb)

Tag A

Server

ntB

ntB nr, ntA,

mb

ma, ntB

Fig. 7 Ordinal authentication protocols for RFID tags [4].

nr2,ntA2,?

Fig. 8 Ordinal authentication protocols for RFID tags applied under two readers in a tag’s field.

(3) Tag A and Tag B each generates a hash value ra and rb by applying xa and xb on r as a seed.

(4) ra and rb are sent to reader by tag A and tag B. (5) Then, the reader generates rt by using ra, rb, and r,

based on XOR operation, i.e., rt=(ra⊕ r ⊕ rb) [7]. (6) The reader sends rt to tag A, and tag A reacts by

generating and sending the MAC ma, applying xa on ra and rt, to the reader [7].

(7) The reader sends rt to tag B, tag B reacts by generating and sending the MAC mb, applying xb on rb and rt, to the reader [7].

(8) The reader generates the MAC mr, applying xr on r and computes PAB= [ra,rb,rt,ma,mb,mr] [7].

(9) The reader sends PAB to the server for verification. Fig. 11 shows that An Improved Proof is applied to

proof co-existence multiple readers under 1 RFID tag existences. The steps are as follows:

(1) The server sends random numbers r1 and r2 to reader 1 and reader 2.

(2) Reader 1 and Reader 2 send the random numbers to tag A.

(3) Tag A generates two hash values (ra, ra’) by applying xa on r1 and r2.

r1

request

request

ntA1

m1a = MACxa [?]

Reader 2 Reader 1

ntA2

m2a = MACxa [?]

Tag TA

request

P1= (ntA1, nr1,?)

P2= (ntA2, nr2,?)



nr1, ntA1, ?


11

P2= (nr2, ntA2, ntB2 ,m2a,m2b)

request request

ntA1 m1a = MACxa [ntB1, m1b, nr1]

Reader 2 Reader 1

ntA2

m2a = MACxa [ntB2, m2b, nr2]

Tag TA

nr1, ntA1, ntB1

m2b

P1=(nr1, ntA1, ntB1 ,m1b,m1a)

m1b = MACxb [nr1, ntA1, ntB1]]

m2b = MACxb [nr2, ntA2, ntB2]

Tag TB

nr1, ntA1, ntB1

m1a

nr2, ntA2, ntB2

m2a

request

ntB1

m1b

ntB1, m1b ntB2, m2b

request

ntB2

nr2, ntA2, ntB2

r r

ra

rt

ma

rt

Reader

ma= MACxa [ra,rt]

Tag B

mb= MACxb [rb,rt]

PAB= (ra,r,rb,ma,mb,mr)

Tag A

Server

r

rb

mb

rt=(ra⊕ rb⊕ r)

mr= MACxr [r]

Fig. 9 Completed multiple reader proof applying ordinal authentication protocols for RFID tags.

Fig. 10 An Improve Proof [3].

(4) Hash values are transmitted back to readers by tag A.

(5) Then, the readers generate rt and rt’ by using ra, ra’, r1, and r2, based on an XOR operation, i.e., rt=(ra⊕r1) (Reader 1) , rt’=(ra’⊕ r2) (Reader 2).


12

(6) Readers send rt and rt’ to tag A, tag A reacts by generating and sending the MAC ma and MAC ma’ to readers, applying xa on ra and rt, (Reader 1) applying xa on ra’ and rt’ (Reader 2) [9].

(7) Reader 1 generates the MAC mr by applying xr on r1 while reader 2 generates MAC mr’ by applying xr’ on r2. Reader 1 computes P1= (ra,r1,ma,mr,rt) and Reader 2 computes P2= (ra’,r2,ma’,mr’,rt’).

(8) The readers send P1 and P2 to the server for verification.

From Fig. 11, it can be said that if 1 RFID tag occurs under multiple reader condition, readers are able to gather all the parameters from tag A and submitting at server for verification by applying An Improved Proof for RFID Tags. The readers submit all the parameters to server for verification almost at the same time.

6. Grouping Proof for Multiple RFID Tags

Fig. 12 shows that Grouping Proof is applied to proof co-existence multiple readers under 1 RFID tag existences. The steps are as followed:

(1) Reader receives TS from server [10]. (2) Reader sends TS to tag A and serves it as an input

for generating message authentication code A (ma) [10].

(3) Then, ma and TS send to tag B via reader. (4) Tag B applied ma and TS as inputs for generating

message authentication code B (mb). (5) Reader sends PAB=(TS,mb) to server for

verification. Fig. 13 shows that Grouping Proof is applied to

proof co-existence multiple reader under 1 RFID tag existences. The steps are as followed:

(1) Reader 1 and reader 2 each receive TS1 and TS2 from server [10].

(2) Reader 1 and reader 2 transmit TS1 and TS2 to Tag A for generating MAC (ma1) and MAC (ma2) by applying xa.

(3) TS1 and MAC (ma1) are applied as inputs for generating another MAC. If there were not another tag

appears, it would not able to generate multiple reader co-existences proof.

(4) Same as well TS2 and MAC (ma2) are applied as inputs for generating another MAC. If there were not another tag appears, it would not able to generate multiple reader co-existences proof.

From Fig. 13, we can summaries that without another tag appearances, there would no complete parameters can be submitted to server for verification. Hence, Grouping Proof is unable to generate co-existence multiple reader proof without more than 1 RFID tag appears. Fig. 14 shows an actual multiple reader co-existence proof generated by applying Grouping Proof.

7. Conclusions

Based on the simulations, it has been identified that existing multiple tag co-existence proofs such as Yoking Proof. Grouping Proof, On Existence Proof For Multiple Tags and Ordinal Authentication Protocols for RFID Tags are unable to apply for proofing co-existence multiple reader under 1 RFID tag existences. An Improved Proof for RFID Tags is one of the proofs that could be applied for proofing co-existence multiple readers because each of the tag does not depending each other for generating the parameters that need for submission to the server. An interesting fact from this research is about the network protocol applied for generating hash value and message authentication code. Based on the few proofs that had been gone through, it is recommended that the tag should be independent each other in generating the hash value and message authentication code otherwise; it is unable to generate a complete proof for verification purpose [11]. Hence, we have classified the network protocol as tag dependent or independent for generating multiple tag or reader co-existences proof. It is advisable to the protocol designer for considering about this important point else under some circumstances multiple reader co existence proof could not be generated.


13

Fig. 11 Multiple reader co-existence proof (An Improved Proof).

Fig. 12 Grouping Proof.

Fig. 13 Grouping Proof applied under two readers in a tag’s field.

Notation: r, r1, r2 – Random Numbers [12]; ra, rb, ra’, rb’, r1a, r2b – Hash Values [12]; PAB – Proof that Tag A and B scanned

simultaneously [12];

xa, xb, xr – Secret Keys sharing in between tag and server [12];

ma,mb,mr, ma’,m1a,m2b,mr - Message Authenti- cation Codes;

P1,P2 – Proof that Reader 1 and 2 read the tag simultaneously;

TS TS,ma

TS,ma mb

Reader

ma= MACxa [TS]

Tag B

mb=MACxb [ma,TS]

PAB= (TS,mb)

Tag A

Server

TS1 TS2

m1a

m1a = MACxa [TS1]

Reader Reader 1

m2a

m2a = MACxa [TS2]

Tag TA

m1a,TSm2a,TS2

P1= (TS1,?)

P2= (TS2,?)



r1 r2

ra

rt

ma

rt’

Tag A

ma’= MACxa [ra’,rt’]

Reader 2 Reader 1

ra’

ma’

rt=(ra⊕ r1)

mr= MACxr [r1]

P1=(ra,r,rt,ma,mr)

mr’= MACxr [r2]

rt=(ra’⊕ r2)

P2=(ra’,r2,rt’,ma’,mr’)

ma= MACxa [ra,rt]


14

Fig. 14 Completed multiple reader proof applying grouping proof.

nr1 nr2, ntA2, ntB2, ntA1, ntB1– Random Numbers [12].

Acknowledgments

This work was funded by the Directorate General of Higher Education, Ministry of Education, Republic of Indonesia, Hibah PASCA (No. 408 AL / DRPM-UI / N1.4 / 2009).

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[3] C.C. Lin, Y.C. Lai, J.D. Tygar, C.K. Yang, C.L. Chiang, coexistence proof using chain of timestamp for multiple rfid tags, available online at: http://www.icast.org.tw/.../ coexistence-proof-using-chain-of-timestamps-for-multiple-rfid-tags.pdf/download.

[4] M. Zimand, Hash functions and message authentication codes, available online at: http://triton.towson.edu/ ~mzimand / cryptostuff / N7-Hash.pdf.

[5] Wikipedia, The free encyclopedia “Hash Function”, available online at: http://en.wikipedia.org/wiki/Hash_ function.

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[7] T. Nuamcherm, P. Kovintavewat, C. Tanibundhit, U. Ketprom, C. Mitrpant, An improved proof for RFID tags, available online at: http://home.npru.ac.th/piya/ Docu- ments/Thiti_ECTI2008.pdf.

[8] Wikipedia, The free encyclopedia “Cryptographic Hash Function”, available online at: http://en.wikipedia.org/ wiki/Cryptographic.hash.function.

[9] N.Y. Lee, C.C. Pan, Ordinal authentication protocols for RFID tags, available online at: http://academic-papers. org/ocs2/session/Papers/Poster/231.doc.

[10] J. Saito, K. Sakurai, Grouping proof for RFID tags, in: Proc. of the 19th International Conference on Advanced Information Networking and Applications (AINA’05), 2005, pp. 621-624.

[11] A.T. Tan, R. Budiarto, Applying multiple tag co-existence proof for generating multiple reader existence, in: Proceedings 2009 IEEE International Conference on Antennas, Propagation and Systems (INAS 2009), Johor Baru, Malaysia, Dec. 3-5, 2009.

[12] P. Peris-Lopez, J.C. Hernandez-Castro, J.M. Estevez- Tapiador, A. Ribagorda, Solving the simultaneous scanning problem anonymously: Clumping proofs for RFID tags, available online at: http://www.avoine.net/ rfid/download/papers/Peris-clumping.pdf.

TS1 TS2

m1a

m1a = MACxa [TS1]

Reader Reader 1

m2a

m2a = MACxa [TS2]

Tag TA

m1a,TS m2a,TS2

P1=(TS1, m1b) P2=(TS2,m2b)

m1b = MACxa [TS1, m1a]

m2b = MACxa [TS2, m2a]

Tag TB

m1b m2b

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