dukepeople.ee.duke.edu/~jmorizio/ece261/f08/projects/2nd fft.pdf · 2008. 12. 7. · company...

Duke

Complex Multiplier for FFT

ECE 261 Project 2008

Team Members:

Xuan Bao Xiaoyan YinKai Wang Yang Jiang

Progress Report II

www.themegallery.comwww.themegallery.com Company LogoCompany Logo

Duke

Index

Overview of Our Present Step1

Basic Components2

4*4 Bits Signed Multipliers3

System Summarization4


Duke

Overview of Our Present StepThis is the top level schematic of our project.

Every block here has already been fully defined.

All components and the whole system have correctly passed digital simulation.


Duke

Introduction to the FIFO

This is the schematic of one FIFO component. It contains 8 Dflipflops with reset (for further testing) and works as a buffer for both input and output.


Duke

Introduction to the FIFO

This is the digital simulation result of FIFO component. All possible patterns have been exhaustively tested. To make top level testing easier, we then rewrote the verilog for Dflipflop. The key part of codes is shown above.


Duke

Index


2

4*4 Bits Signed Multipliers3


Basic Components


Duke

Half Adder


Duke

Full Adder

Verilog for Half Adder and Full Adder:


Duke

8-bit Ripple Carry Adder


Duke

8-bit Ripple Carry Subtractor


Duke

Index


Basic Components2

3


4*4 Bits Signed Multipliers


Duke

4*4 Bits Signed Multiplier

Quick Overview…Unsigned Multiplication: Signed Multiplication:

Algorithm: shift and addition Algorithm: Baugh-Woodley technique

Substitute AND2 gates to NAND2 gates, plus inverter… Schematics?


Duke


Duke

Verification of Multiplier’s Results:

Results: 0*8=0 -3*-5=15

-3*3=-93*2=-6

-4*2=-8…

Realizes the multiplication of input X and Y, with the correct outcome Z=XY, which will be sent to Ripple Carry Adder and Subtractor to calculate: AD+BC & AC-BD

Consists of:

Nand2 × 6And2 × 10

Full Adders × 9Half Adders × 3

Inv × 1


Duke

Index


Basic Components2

3


Signed Multiplier


DukeSystem schematic


DukeSystem Simulation

(A+Bj)(C+Dj)=(AC-BD)+j(BC+AD)


Duke

Feature estimation

Components

SUM*1 DIFF*1 MULT*4 FIFO*6

252 288 434*4 256*6 3812

Totaltransistors

Number of transistors

Area (mm^2)

0.5150.030*60.047*40.0330.028

FIFO*6MULT*4DIFF*1SUM*1

120%*Totalarea

Components


Duke

Feature estimationPower consumption

( ) ( ) ( )

2

2 60.1 3812 12 0.8 / 2 2 / 5 10

0.0915 /

P C V f

m fF m

mW MHz

α

λ μ λ μ

= ⋅ ⋅ ⋅

= ⋅ ⋅ ⋅ ⋅ ⋅ ⋅⎡ ⎤⎣ ⎦=


Duke

Floor Plan

overall

DIFF

MULTIPLIER

FIFO

FIFO

FIFOFIFO FIFO

FIFO

MULTIPLIER MULTIPLIER

MULTIPLIER


Duke

To be continued…

Complex Multiplier for FFTIndexOverview of Our Present StepIntroduction to the FIFOIntroduction to the FIFOIndexHalf AdderFull Adder8-bit Ripple Carry Adder 8-bit Ripple Carry SubtractorIndex4*4 Bits Signed MultiplierIndexSystem schematic System Simulation Feature estimationFeature estimationFloor PlanTo be continued…

dukepeople.ee.duke.edu/~jmorizio/ece261/f08/projects/2nd fft.pdf · 2008. 12. 7. · company...

Documents