introduction to arm
DESCRIPTION
Introduction to ARM architecture that show how ARM is better thanTRANSCRIPT
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ARMAdvanced RISC MachineKelompok 1IF5130 – Sistem Komputer
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Windows Phone
Are you using this ?
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great performance , GREAT (computing) power
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Low computing power, great performance
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History
Developed in 1985 at Acorn Computers Ltd for the 1st time
Established a new company named Advanced RISC Machine
Continuation of the architecture enchancements from the original architecture
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A large register file A load/store architecture Uniform and fixed length instruction field Simple addressing mode
ARM featuressimilar than RISC
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A 32-bit architecture Byte,halfword,Word relation to ARM Implement
32-bit ARM IS 16-bit Thumb IS
Jazell to execute Java bytecode
Data Sizes & Instruction Sets
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User FIQ IRQ Supervisor Abort Undef System
Processor Mode
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Control over both ALU & shifter Auto-increment & decrement Load / Store Multiple Instructions Conditional execution
New featuresbetter than RISC
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Windows Phone
More Control
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Data Processing – Dataflow Model
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Data Processing – Component
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Data Processing - Instructions
Contains:• Arithmetic instructions• Comparisons instructions (no results - just set
condition codes) Multipy Instructions• Logical operations• Data movement between registers
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Data Processing – Instruction
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Data Processing – LSL Example
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Data processing ARM != pure RISC
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Load & Store Instruction
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Load/Store Instruction
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Load/Store Instruction (2) 3 type transfer
Single register data transfer (LDR/STR) Block data transfer (LDM/STM) Single Data Swap (SWP)
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Single Data Transfer
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r10x20
0
BaseRegiste
r
Memory
0x5
0x200
r00x5
SourceRegiste
rfor STR
Offset12 0x20c
r10x20
0
Original
BaseRegiste
r
Memory
0x50x200
r00x5
SourceRegiste
rfor STR
Offset12 0x20c
r10x20c
UpdatedBase
Register
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Block Data Transfer
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Stack
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Block Data Transfer• Block Copying Modes
Increment – AfterIncrement – BeforeDecrement – After Decrement – Before
loop LDMIA r12!, {r0-r11} ; load 48 bytesSTMIA r13!, {r0-r11} ; and store themCMP r12, r14 ; check for the endBNE loop ; and loop until done
r13
r14
r12
Increasing
Memory
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Windows Phone
Conditional Execution
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Conditional Execution
?
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Conditional Execution
Conditional flagsN : NegativeZ : ZeroC : CarryV : Overflow
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Conditional Execution
Who’s reading flags?EQ : EqualNE : Not equalVS : Overflow setVC : Overflow clearMI : MinusPL : PlusCS : Carry setCC : Carry clear
HI : HigherLS : Lower than or sameGE : Greater than or equalLT : Less thanGT : Greater thanLE : Less than or equal
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Conditional Execution
C programing languageWhile (i != j) {
if (i > j) {i -= j;
} else {j -= i;
}}
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Conditional Execution
RISC loop:CMP Ri, RjBEQ doneBGT biggerBLT smaller
bigger:SUB Ri, Ri, RjBNE loop
smaller:SUB Rj, Rj, RiBNE loop
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Conditional Execution
ARMloop:
CMP Ri, RjSUBGT Ri, Ri, RjSUBLT Rj, Rj, RiBNE loop
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Windows Phone
Let’s recap
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Reference
[ZHU09 ]Dr Yifeng Zhu, The ARM Assembly, 2009, (http://arch.eece.maine.edu/ece471/images/8/8b/Lecture_05_ARM_ISA.pdf)
[ARM11] ARM Ltd., ARM Architecture Reference Manual, 2011, www.arm.com
[ROK11] Rokov, Josko , ARM Architecture and Multimedia Applications (http://www.fer.unizg.hr/_download/repository/Kvalifikacijski-Rokov.pdf)
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Reference
The ARM Instructions Set – ARM University Program v1.0
[ARM11] ARM Ltd., ARM Architecture Reference Manual, 2011, www.arm.com
www.ida.liu.se/~TDTS51/lectures/lectures5-6.pdf
ARM7-TDMI-manual-pt2
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ARMAdvanced RISC MachineKelompok 1IF5130 – Sistem Komputer