introduction tfe4180 halvlederteknologi (semiconductor...

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TFE4180 Semiconductor Manufacturing Technology 2013, IntroductionTFE4180 Semiconductor Manufacturing Technology 2015, Introduction

Introduction

TFE4180 Halvlederteknologi

(Semiconductor Manufacturing Technology)Spring Semester 2015

Bjørn-Ove Fimland,Department of Electronics and Telecommunication,

Norwegian University of Science and Technology ( NTNU )

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TFE4180 Semiconductor Manufacturing Technology 2013, Introduction

Teacher / Co-ordinator

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– Lectures– Lecturer: Saroj Kumar Patra ([email protected])– 3 hours a week (in general) [exception for some weeks]– Student lectures

– 3 students per 45 minutes lecture (team work)– Required for admission to the final exam

– Exercises– 12 exercises in total

– 8 approved exercises required for admission to the final exam

– Lab– Lab assistants: Johannes F. Reinertsen, Dingding Ren, Andreas L. Mulyo– 4 labs of 4 hours each with groups of 2 students– Lab report:

• Approved/not approved (no grade)– Required for admission to the final exam

Overview

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Lecture plan for the first 2 weeksWeek 2

Friday 9th Jan @10:15 - 11:00 Aud El 4: Introduction to course and practical informationLect: Bjørn-Ove Fimland

Friday 9th Jan @11:15 - 12:00 Aud El 4: Chap.13 Photolithography I, part 1 (pp.336-345 Quirk&Serda)Lect: Bjørn-Ove Fimland

Week 3

Monday 12th Jan @10:15 - 11:00 Aud El 4: Chap.13 Photolithography I, part 2 (pp.345-361 Quirk&Serda)Lect: Bjørn-Ove Fimland

Monday 12th Jan @11:15 - 12:00 Aud El 4: Chap.14 Photolithography II, part 1 (pp.367-376 Quirk&Serda)Lect: Bjørn-Ove Fimland

Friday 16th Jan @10:15 - 11:00 Aud El 4: Chap.14 Photolithography II, part 2 (pp.376-388 Quirk&Serda)Lect: Saroj Kumar Patra

Friday 16th Jan @11:15 - 12:00 Aud El 4: Chap.14 Photolithography II, part 3 (pp.388-405 Quirk&Serda)Lect: Saroj Kumar Patra

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• Main book:M. Quirk and J. Serda: “Semiconductor Manufacturing Technology”, Prentice Hall, 2001.– Available at sit tapir

• Additional book:

T.E. Jenkins: “Semiconductor Science; Growth and Characterization Techniques”, Prentice Hall, 1995.

- Available from: Nina LundbergInstitutt for elektronikk og telekommunikasjon, room B406 in Elektrobygget

Textbooks

http://www.amazon.com/gp/product/images/0130815209/ref=dp_image_0?ie=UTF8&n=283155&s=books

http://www.amazon.com/gp/product/images/0130815209/ref=dp_image_0?ie=UTF8&n=283155&s=books

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Overview

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• Each group of 3 students will give a lecture– Each lecture should take about 45 min. (team work)

• The student lectures will be part of the syllabus (pensum)– Which topics that will be given as student lectures will be

published in the lecture plan.– The lecture plan will be available on It’s learning

– The lecture plan will be updated frequently – The topics will be given out on a first come – first serve

basis– It is recommended to send an e-mail to the lecturer (Saroj

Kumar Patra) or use the message system on It’s learning

Student lectures

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• All information will (hopefully) be available on It's learning– Recommended to turn on email-notifications

It’s learning

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• An introduction to semiconductor processing and related subjects– Some semiconductor theory– How to make semiconductor samples

• Mainly thin films– How to process a semiconductor sample

• Hands-on experience in the labs– How to characterize a semiconductor sample

• Also practical experience in the lab (Profilometry, optical microscopy, electron microscopy, Hall effect measurements)

Content of the course

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Components on Printed Circuit Board

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1. Twin-well Implants2. Shallow Trench Isolation 3. Gate Structure4. Lightly Doped Drain

Implants5. Sidewall Spacer 6. Source/Drain Implants7. Contact Formation8. Local Interconnect9. Interlayer Dielectric to Via-110. First Metal Layer11. Second ILD to Via-212. Second Metal Layer to Via-313. Metal-3 to Pad Etch14. Parametric Testing

Passivation layer Bonding pad metal

p+ Silicon substrate

LI oxide

STI

n-well p-well

ILD-1

ILD-2

ILD-3

ILD-4

ILD-5

M-1

M-2

M-3

M-4

Poly gate

p- Epitaxial layer

p+

ILD-6

LI metal

Via

p+ p+ n+n+n+ 23

1

4

5

67

8

9

10

11

12

13

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CMOS Manufacturing Steps

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• Molecular beam epitaxy (MBE)• Liquid phase epitaxy (LPE)• Vapour phase epitaxy (VPE)

• Epitaxy– To build up a new crystal structure (monocrystal) on an existing

crystal structure• For example: AlGaAs on a GaAs substrate• Requires that the lattice constants of the two materials are very

similar

How to make semiconductor samples

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Semiconductor theory

• Electrical properties– Conductivity and mobility– Hall effect

• Charge carrier concentrations– Geometrical magnetoresistance (?)

• Resistance as a function of magnetic field– A little bit about band structures and crystallographic theory (?)

• Band gap• Lattice constant• Etc.

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How to characterize a semiconductor

• Characterization = describe the sample and its properties in numbers/words/images

• Optical Microscopy (Lab)• Scanning Electron Microscopy (SEM) (Lab)• Transmission Electron Microscopy (TEM)• Reflection High-Energy Electron Diffraction (RHEED)• Secondary Ion Mass Spectrometry (SIMS)• Focused Ion Beam (FIB)• Atomic Force Microscope (AFM)• Scanning Tunneling Microscope (STM)

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How to process a semiconductor

• Photolithography• Etching• Metallization• Deposition• Ion implanting• Process chamber• IC fabrication• Packaging

Done in the student lab

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1. Twin-well Implants2. Shallow Trench Isolation 3. Gate Structure4. Lightly Doped Drain

Implants5. Sidewall Spacer 6. Source/Drain Implants7. Contact Formation8. Local Interconnect9. Interlayer Dielectric to Via-110. First Metal Layer11. Second ILD to Via-212. Second Metal Layer to Via-313. Metal-3 to Pad Etch14. Parametric Testing

Passivation layer Bonding pad metal

p+ Silicon substrate

LI oxide

STI

n-well p-well

ILD-1

ILD-2

ILD-3

ILD-4

ILD-5

M-1

M-2

M-3

M-4

Poly gate

p- Epitaxial layer

p+

ILD-6

LI metal

Via

p+ p+ n+n+n+ 23

1

4

5

67

8

9

10

11

12

13

14

CMOS Manufacturing Steps

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Overview

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• Overview over the different aspects can be found in the Lab compendium– More about the labs will be explained in separate session

• Exercises for labs 1-4 have to be done BEFORE the labs!– Available on It’s learning– For questions regarding the exercises or labs, contact Johannes Reinertsen

• E-mail: [email protected] • Office: A461, IET, Elektrobygget, Tel.: 73594422 / 97545674

• Processing of a Hall bar– Lab 1 (in NanoLab):

• Put metal contacts on a doped thin semiconductor film– Lab 2 (in NanoLab):

• Etch a Hall bar geometry • Characterization of a Hall bar

– Lab 3 (in NanoLab):• Measure the dimensions of the structure

– Height, width, length• Look at the structure in an electron microscope (SEM)

– Lab 4 (in Hall effect lab – IET):• Determine dopant concentrations and mobilities• Measure the conductivity

Labs

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18.94.916:00-20:00FridayGroup 42

15.91.916:00-20:00TuesdayGroup 41

18.94.912:00-16:00FridayGroup 8

18.94.908:00-12:00FridayGroup 7

17.93.914:15-18:15ThursdayGroup 6

17.93.910:15-14:15ThursdayGroup 5

16.92.908:00-12:00WednesdayGroup 4

15.91.912:00-16:00TuesdayGroup 3

15.91.908:00-12:00TuesdayGroup 2

14.931.808:00-12:00MondayGroup 1

Vit. Ass.Date Lab 2Vit. Ass.Date Lab 1TimeDay of weekMember 2Member 1Group #

Emergency groups (only if all other groups are full)

Lab schedule (example only)

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Overview

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Thank You

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