Design of Preverifying Serial-Ethernet Communication Gateway Based on LM3S8962

Shuangye Chen, Dongyue Zheng, Rujun Yang College of Electronic Information and Control Engineering

Beijing University of Technology Beijing, 100124, China

jobszheng@emails.bjut.edu.cn Abstract - To connect different RS485 networks and transmit data on Ethernet without changing the current network structures and configurations, a preverifying Serial-Ethernet communication gateway is designed based on an ARM Cortex-M3 architecture microcontroller LM3S8962. It transfers the data through its integrated Ethernet controller, MAC link layer and PHY physical layer, as well as 2 Uart interfaces. The real-time operation system uC/OS II v2.89 has been ported and LWIP protocol stack also runs on the system. The preverifying function is optional applying to different communication protocols. Therefore, it is effective to reduce the load and collisions over the Ethernet. Certified the gateway accomplished, two RS485 bus with Modbus Protocol could connect via Ethernet to achieve a low-cost, long distance, transparent and reliable data transmission. Index Terms - Transparently Transfer, preverify, RS485, Ethernet.

I. INTRODUCTION

Electrical standard RS485 and physical layer electrical specification are released by the Electronic Industries Association (EIA). RS485 bus solution is proposed to achieve large network and substitute for RS232 interface which can only be point-to-point communication. The RS485 bus is commonly used in the field of industrial control because of its many advantages such as high transmission speed, far transmission distance, low cost and strong anti-interference. The number of single local area network is limited within 32 nodes due to its operational style. Though 128 nodes can be driven by using some chips, the number of nodes can’t satisfied the capacity of large network. Ethernet is the most common communication protocol standards of local area network. In February 1980, the Institute of Electrical and Electronics Engineers (IEEE) started project 802 to standardize local area networks (LAN). Since its commercial release, Ethernet has retained a good compatibility and easily connective. Data rates were periodically increased from the original 10 megabits per second to 100 gigabits per second. The IEEE 802.3 CSMA/CD(Carrier Sense Multiple Access / Collision Detection) standard is supported for Ethernet. CSMA/CD is a set of rules determining how network devices respond when two devices attempt to use a data channel simultaneously (called a collision). Once both two stations attempt to transmit data at the same instant, this cause a collision, which is detected by all participating stations. The stations that collided will attempt to transmit again after a random time interval.

Therefore the Ethernet supported by CSMA/CD cannot guarantee high real-time data transmission requirements and limited the application in time-critical situations directly. A new preverifying Serial-Ethernet communication gateway is designed considering the advantages and disadvantages of the different media transmission in network and takes full account of low-cost, convenience, reliability and versatility. Datum could transmit transparently used preverifying Serial-Ethernet communication gateway through RS485 serial bus and Ethernet. The remote terminal units (RTU) connect with each other through RS485 network, the one is called LAN1. One or more other RS485 network also composed with the same structures which are called LAN2, LAN3… the RS485 networks are connected by preverifying Serial-Ethernet communication gateway via Ethernet. One or more PCs are also connected via Ethernet If necessary. The data which are transmitting are monitored and could query in the application software on the PC. The structure of RS485 network connected by preverifying Serial-Ethernet communication gateway is shown as Figure1:

Fig.1 The structure of RS485 network connected by preverifying Serial-

Ethernet communication gateway II. HARDWARE DESIGN

The Core Microprocessor module, RS485 communication module, serial module, power module, reset module and storage module are composed of the Serial - Ethernet communication gateway hardware. The block diagram of the preverifying Serial-Ethernet communication gateway is shown in Figure2:

Fig. 2 The block diagram of the preverifying Serial-Ethernet communication

gateway The data is processed in the modules as follows: the data is received through RS485 interface from RS485 networks. Through the MCU, LM3S8962, the data is verified by the optional protocol. The passed data packs with parity checking into an Ethernet frame format but the failed one will be process as the protocol requires. Then the LM3S8962 built-in Ethernet MAC and PHY processes the data with network isolation transformer chip HR610168 and RJ45 connector to another one. The process of receiving data is just with adverse. Finally the data is all unpacked to RS485 frame format. In this design, Serial-Ethernet communication gateway could recognize the format of the MODBUS-RTU frame automatically. Once the MODBUS-RTU frames transmit from RS485 network, the data integrity and correctness would be checked by using CRC-16 checksum before packing into TCP frame. TCP/IP protocol stack which is the carrier of RS485 data packets is used in communicating among the Serial-Ethernet communication gateways. The processes of RS485 frame and UDP frame‘s packing or unpacking are all done in the LM3S8962. Consequently, the different RS485 networks have communicated transparently with each other via Ethernet. A. The Core Microprocessor Module LM3S8962 microcontroller which is based on the ARM® Cortex™-M3 controller core operating at up to 50 MHz, with 256 kB flash and 64 kB SRAM is chose as the processor of the Serial-Ethernet communication gateway. The LM3S8962 also features real-time industrial connectivity, with a 10/100 Ethernet MAC/PHY and 2UARTs, as well as hardware-assisted support for synchronized industrial networks utilizing the IEEE 1588 Precision Time Protocol (PTP). The LM3S8962 microcontroller provides a 24-bit systick timer, 4 32-bit or 8 16-bit general-purpose timers. It’s a good ideal for cost and power consumption requirements and high-performance applications demand. HR601680 which is belonging to HANRUN Company is used as net isolation transformer. Ethernet interface circuit diagram is shown in Figure 3:

Fig. 3 Ethernet interface circuit diagram

B. RS485 Communicate Module Only a transceivers for RS-485 communication is needed for the preverifying Serial-Ethernet communication gateway because the LM3S8962 microcontroller has provided 2 UART interfaces in additional of some discrete components. MAX485, draw between 120µA and 500µA of supply current when unloaded or fully loaded with disabled drivers, is selected as the RS485 transceivers. Drivers of MAX485 are short-circuit current limited and are protected against excessive power dissipation by thermal shutdown circuitry that places the driver outputs into a high-impedance state. The receiver input has a fail-safe feature that guarantees a logic-high output if the input is open circuit. The driver slew rates is not limited and allows it to transmit up to 2Mbps. The connecting between the microcontroller and the MAX485 is used by high-speed optocoupler 6N137 in order to achieve electrical isolation between each node on the bus and to improve the stability of the node. Optocoupler interface circuit diagram is shown in Figurer4. A 120 ohm termination resistor is connected with the two endpoints of the RS485 bus to ensure communication impedance matching network and to reduce the emission due to the mismatch, absorb noise effectively suppress outside noise interference[1]. RS485 interface circuit diagram is shown in Figurer5.

Fig. 4 Optocoupler interface circuit diagram

Fig. 5 RS485 interface circuit diagram

C. Other Peripheral Modules Power module: the linear regulator chip LM1117 is used to provide 3.3v by DC 5V power for the LM3S8962 microcontroller. In order to ensure reliable reset, the MAX809 chip is selected for the reset circuit in the design. The storage module: a storage module is mainly used to store critical system setup parameters at run time of the communication gateway. In this design, the memory chip selecting ferroelectric nonvolatile serial memory FM24CL16 having 16K bits of storage space to fully meet the demand.

III. EMBEDDED SOFTWARE DESIGN

The software design of preverifying Serial - Ethernet communication gateway system is based on uc/os-ii2.89 embedded operating system which is an embedded real-time operating system[2]. And the system runs four tasks according to its different functions, including the task of initialization, serial communication, Ethernet communication and the protocol conversion for the data communication. Specifically, the task of initialization consists of three steps, which means to do the peripheral initialization in hardware and the uc/os-ii system initialization and create the remaining three tasks. The main task of Ethernet communication is to receipt and transmit the data on Ethernet hardware while the purpose of serial communication is to send and receive the data by controlling a MAX485 chip [3]. For this purpose that we complete the initialization of RS485 bus, and then we check and do the encapsulation and de-encapsulation process of the data. When there’s a new data having been detected in serial communication queue, the task of protocol conversion would make the new data convert into the Ethernet format data. And it also makes the data convert into a standard Modbus protocol for serial communication tasks when the Ethernet communication queue has received a new data. That’s how the task of protocol conversion created works. A. Task of Initialization Design We should consider about the task of initialization in two parts. First, the hardware, making up of clock, serial peripherals, Ethernet peripherals and timer peripherals, should be configured. Second, the task of serial communication, Ethernet communication and the protocol conversion for the data communication should be created. In addition, we share and synchronize the data between tasks by a message queue. The initialization flow chart is shown as Figure6:

Fig. 6 The initialization flow chart

B. Task of serial communication Design The data received is roughly divided into two parts by how it generated. Firstly, in this task, we initialize serial communication by configuring related registers and prepare the send buffers and receive buffers. In order to ensure real-time performance and integrity of the data, the way of interrupts to receive serial data is used. Therefore, it must be interrupted when it has received new data via data bus and it should be stored in a message queue SerialReceive after a simple check for its integrity. Besides, using a message queue SerialReceive to store data increases its work efficiency effectively because it can transfer more than one massage at once. Simultaneously, the message queue SerialReceive is also waiting for the data converted by the task of the protocol conversion in which received Ethernet format data has been converted into Modbus frame format data. The serial communication flow chart is shown as Figure7. C. Task of Ethernet Communication Design TCP/IP protocol stack is ported in uC/OS-II embedded operation system which runs in the LM3S8962 microcontroller. As the limited resources in the embedded system, the standard TCP/IP protocol stack cannot be ported directly. LWIP protocol stack which reduced TCP/IP protocol while necessary cutting to meet the embedded system is used to provide the Ethernet transmission function. UDP protocol is adopted as its less consuming system resources and lower packet loss probability while light load situation than the TCP’s. For the shortcomings of the UDP, an additional checksum code for integrity and correctness to the data can optimize the transmission [4]. ARP protocol is also ported from Lwip protocol stack for the completion of the mapping of the destination IP address and MAC address; IP protocol is achieved so the packet can be forwarded; ICMP protocol is reserved for testing and connecting validly too[5].

Fig. 7 The serial communication flow chart

The way to send and receive Ethernet data is used through the LM3S8962 microcontroller’s interrupt. When the Ethernet data arrives, the interrupt trigger the LM3S8962 to read the data from the receive buffer and identify the Ethernet frame head and then determines that the packet is an IP data or ARP data. For IP data, it will have to be divided into UDP packets or ICMP packets, and handled accordingly. UDP packets need to extract part of its data into UDP receiving the message queue NetReceive to complete Ethernet data reception. Sending data through the Ethernet interface, contrary to the receiving process reads the data from the transmit buffer which will be encapsulated into a UDP packet through Lwip protocol and finally transmit via PHY [6]. The Ethernet receiving flow chart is shown as Figure8. D. Task of data conversion design The data conversion task includes two processes. One is the serial data to Ethernet’s, the other one is the Ethernet data to serial’s. Serial2Ethernet task is in the blocked state until SerialReceive queue a message is valid. As soon as getting the usage of the system, the task reads the data from queue message which contains the data coming from Serial communication and verifies the data under the communication protocol which is saved in the FM24CL16 and configured at the beginning of the transition. The passed one convert into Ethernet frame according to the preconfigured map which is saved in the storage module. Once it failed, the gateway will specially do what the protocol need to do or omit it as user’s definition [7]. The data packets are put into Ethernet send buffer waiting to be sent. Different from other converter, the preverified function could do strictly verify before next procedure. In this design, MODBUS protocol, Profibus protocol have been programmed in the onchip flash. Therefore, the user can select the protocol for using. In some special application in which the protocol is not open, the one coded by user’s definition can be used.

Shielded the mistaken data, it is a good degree of avoiding collision and reducing the load of Ethernet. Ethernet2Serial task is in the blocked state until NetReceive queue message is valid, as soon as getting the usage of the system, the task reads the data from queue message which contains the data coming from Ethernet communication and convert into serial frame according to the preconfigured map which is saved in the storage module, and then put the data packets into serial send buffer waiting to be send. The relationship between the tasks is shown in Figure9.

Fig. 8 The Ethernet receiving flow chart

Fig. 9 The relationship between the Serial2Ethernet task and Ethernet2Serial’s

IV. CONCLUSION

Preverifying Serial - Ethernet communication gateway designed in this paper conforms to the standards of the safe operation of the system, low cost, high speed, and stability. Two or more RS485 network could transmit transparently through the Ethernet without modifying any parameter of original RS485 network. Because of preverifying the data before transmitting over the Ethernet, the load and the collisions are all at a lower level. It is a high effective that it has for connecting different networks using the existing Ethernet network and avoiding the difficulties of rewiring and high cost. Standard communication frame format can also easily access to enterprise ERP system or monitoring system and realize remote or extranet view. The design of preverifying Serial - Ethernet communication gateway meets

the needs of the communication between RS485 network and Ethernet, reaching the goal that is superior to RS485 bus, Ethernet in the same transmission condition.

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