how memory works physical example 0 water tank 1 emptyfull
TRANSCRIPT
How Memory Works
• Physical Example
0
Water Tank
1
Water Tank
Empty Full
How Memory Works
• Physical Example
0
ElectronicCircuit
1
ElectronicCircuit
Discharged Charged
Practical Dynamic Memory
• Use capacitors to store the charge to represent “0” and “1”
+++ +++
_ _ _ _ _ _
Practical Static Memory
• Transistors play the main roles
•
Base
Collector
Emitter
Memory
• Memory is the second important component in modern computers.
1001111000011001
0000000000000000000000000000000100000000000000020000000000000003
0001101000011011
Content
Address
1111111111111111
Memory
• Memory is the second important component in modern computers.
10011110000110010001101000011011
Content
Address
0000h0001h0002h0003h
FFFFh
Memory Related Terms
• Bit------------------0 or 1
• Byte----------------8 bits
• Word---------------16 bits-----2 bytes
• Doubleword------32 bits-----4 bytes
• Quadword---------64 bits-----8 bytes
Range of Unsigned Integers
• Unsigned byte------------0 to 255
• Unsigned word-----------0 to 65535--64KB
• Unsigned doubleword--0 to 4,294,967,295
• 0 to -----4.3GB
• Unsigned quadword----
• 0 to 18,446,744,073,709,551,615
• 0 to 18,446,744,073GB
Memory Related Terms
• RAM -----Random Access Memory
• ROM -----Read Only Memory
• PROM--Programmable Read Only
• Memory
• EPROM--Erasable PROM
• EEPROM--Electrical Erasable PROM
• Dynamic RAM---Need to be refreshed
• very often (every few milliseconds)
• Static RAM---Expensive cache memories
Memory Related Terms
Memory Module
• .
DATA Bus
.
.
.
Address Bus
Control Bus
Memory Related Terms
MemoryModule
• .
DATA Bus
Address Bus
Control Bus
Memory Related Terms
• By Packaging Styles
• SIMM---Single Inline Memory Module
• DIMM---Dual Inline Memory Module
• SO-DIMM--Small Outline DIMM
Memory Organization
• For the same amount of capacity, there are many different layout patterns.
• Such as, for 1Kbits memory, we can have:• a. 1,024 cells and 1,024 addresses, each • stores a “0” or “1”• b. 128 cells and 128 addresses, each cell • has 8bits or I byte• c. 1 cell and 1 address, the cell has 1024bits
Number of bits per cell forSome Commercial Computers
• Burroughs B1700 1
• IBM PC 8
• DEC PDP-8 12
• IBM 1130 16
• DEC PDP-15 18
• CDC 3600 48
• CDC Cyber 60
Cache Memory
• Why do we need cache memory?• Main memory is always slower than CPU• Main memory is far away from CPU• Faster memory can be made but neither
economic nor practical• Small amount of expensive faster memory
made close to the CPU will solve most of the problems
Cache Memory
• *** The most often used memory words are kept in the cache.***
CPU Main Memory
Cache
Bus
h-Hit Ratio of Cache Memory
• h = (k-1)/k where;
• k --- a word is written or read k times in a short interval and only need to reference the main memory 1 time.
• 1 - h is called miss ratio
• mean access time = c + (1 - h)m, where m is the time to reference the main memory
Byte Ordering
• The big endian and the little endian
0
4
8
12
0
4
8
12
0 1 2 3 0123
45674 5 6 7
8 9 10 11
12 13 14 15
891011
12131415
Address Address
The big endian stores higher digits in the lower bytes& The little endian stores higher digits in higher bytes
Byte Ordering
• The big endian and the little endian
0
4
8
12
0
4
8
12
J I M
T
JIM
SMITS M I
H H
Address Address
The big endian stores higher digits in the lower bytes& The little endian stores higher digits in higher bytes
Big Endian & Little Endian
• Address store number 1234567h
• 100 101 102 103 104 105
• 01 23 45 67 xx xx Big
• 67 45 23 01 xx xx Little
What wrong with the two systems?
• There is nothing wrong when each system works alone (they are both internally consistent).
• However, when transfer information over the network, we have problems.
• We will also have problems when using a software from one machine to another.
• There is no easy way to make both compatible without a time consuming conversion.