high performance digital control presentation apec 2016 dr. hamish laird
TRANSCRIPT
![Page 1: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/1.jpg)
PAGE 1
High Performance Digital Control
IEEE APEC 2016
Long Beach
March, 2016
Hamish Laird
ELMG Digital Power
![Page 2: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/2.jpg)
PAGE 2
Outline for today
●Introduction ● Component Parts of Power Converter Control ● Power Converter Control Blocks
![Page 3: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/3.jpg)
PAGE 3
Digital Control System ● Introduction
● Power Converter Control Blocks
● Modulators ● Digital VPO performance ● Precision in VPOs – Extending, improving and correcting resolution ● Digital PWM performance ● Correcting in PWM ● Extending PWM precision.
● Compensators ● Unit Circle and Pole Zero Plots ● Useful pole zero combinations ● Pole zero placement – where to put them. ● Implementing these pole zero combinations ● A good filter structure.
● More compensators ● IIR Biquads – number of bits ● Filter coefficients from pole zero placements ● Digital Integrators
● Do I have precision and resolution problems? ● How to determine this?
● How to fix this resolution problem?
● Analogue to digital converters ● Single sample noise
● Anti aliasing filters ● Cutoff frequencies and orders
● Summary
![Page 4: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/4.jpg)
PAGE 4
About Hamish Laird
●CTO at ELMG Digital Power
●Power Electronics Career ● Induction Motor Drives ● Induction Motor Starters ● DC drives (analogue) ● HVDC and SVC ● Medical Devices – motor drives ● Household appliances ● Active Filters ● Medium voltage ● UPS ● Brushless DC drives
●All digital control ● Except analogue ● Microprocessors ● DSP ● FPGA
![Page 5: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/5.jpg)
PAGE 5
Modulators
●Modulator
●PWM
●VPO
●Any modulator is a Harmonic Generator
●Both PWM and VPO are nonlinear
![Page 6: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/6.jpg)
PAGE 6
Compensator
●Filter that ensures that connecting the system output to the system is useful and stable
●Usually low pass
●Useful means error is small
![Page 7: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/7.jpg)
PAGE 7
Analogue to Digital Converter
●Samples analogue.
●Multiplies two signals ● Train of impulses ● Feedback
●A2D is a modulator
●Aliasing can happen – spectrum out is not the same as the spectrum in
![Page 8: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/8.jpg)
PAGE 8
Anti Aliasing Filter
●Low pass filter
●Prevents Aliasing
●Makes A2D linear
![Page 9: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/9.jpg)
PAGE 9
●Typically has a low pass filter characteristic
●Prevents aliasing
Power Converter
![Page 10: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/10.jpg)
PAGE 10
Modulators
●Two kinds covered today
●Variable Period Oscillation ● For resonant power supplies
●Pulse Width Modulator ● Pulse modulator
![Page 11: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/11.jpg)
PAGE 11
●Quantization in modulators
Modulators – Quantization
![Page 12: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/12.jpg)
PAGE 12
VPO
![Page 13: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/13.jpg)
PAGE 13
Oscillators (VPO)
●Example ● 10 MHz clock ● 250kHz out ● Count is 40
●For count of 41
●Out is 243,902 Hz
●For count of 39
●Out is 256,410 Hz
![Page 14: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/14.jpg)
PAGE 14
VPO- characteristics
![Page 15: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/15.jpg)
PAGE 15
VPO- characteristics
![Page 16: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/16.jpg)
PAGE 16
VPO – characteristics
●For 100MHz clock
●715 counts is 9.48 bits
Count Frequency out Hz
285 350,877
1000 100,000
![Page 17: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/17.jpg)
PAGE 17
VPO – Characteristics
●For 1000MHz clock
●7143 counts is 12.8 bits
Count Frequency out Hz
2857 350,017
10000 100,000
![Page 18: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/18.jpg)
PAGE 18
VPO – Characteristics
●Effect of VPO error in feedback control
●Dead-band non linearity
●Slip strike behavior ● Typically requires more bandwidth in compensator
![Page 19: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/19.jpg)
PAGE 19
PWM – Characteristics
![Page 20: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/20.jpg)
PAGE 20
PWM – Characteristics
●Clock Frequency 10MHz
●PWM carrier frequency 25kHz
●Counter maximum = 10MHz/25kHz = 400
●Number of bits is 8.64
On Time Counts Duty On time
400 100% 40us
274 68.5% 27.4us
1 0.25% 0.1us
![Page 21: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/21.jpg)
PAGE 21
PWM – Characteristics
●Clock Frequency 100MHz
●PWM carrier frequency 25kHz
●Counter maximum = 100MHz/25kHz = 4000
●Number of bits 11.96
On Time Counts Duty On time
4000 100% 40us
2740 68.5% 27.4us
1 0.25% 0.01us
![Page 22: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/22.jpg)
PAGE 22
PWM – Characteristics
●Clock Frequency 1000MHz
●PWM carrier frequency 25kHz
●Counter maximum = 100MHz/25kHz = 40000
●Number of bits 15.28 bits
On Time Counts Duty On time
40000 100% 40us
27400 68.5% 27.4us
1 0.025% 0.001us
![Page 23: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/23.jpg)
PAGE 23
PWM Characteristics
●Clock Frequency 1MHz
●PWM carrier frequency 25kHz
●Counter maximum = 1MHz/25kHz = 40
●Number of bits is 5.32
On Time Counts Duty On time
40 100% 40us
27 67.5% 27us
1 2.5% 1us
![Page 24: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/24.jpg)
PAGE 24
Modulators Characteristics
●Spectra of PWM or VPO with quantization
![Page 25: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/25.jpg)
PAGE 25
PWM – Characteristics
●Effect of quantization resolution error in feedback system
●Step non linearity
●Creates slip strike behavior
![Page 26: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/26.jpg)
PAGE 26
Modulators error correction
●Resolution correction gives precision extension
●Resolution in VPO and PWM from timer precision.
●We know the quantization of the modulator
●So we know the error of each switching instant
●We can correct for the error on the next switching cycle
●In the long term we can apply the correct volt seconds.
●How to implement.
![Page 27: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/27.jpg)
PAGE 27
How to correct errors
![Page 28: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/28.jpg)
PAGE 28
Modulators error correction
●How it works
●1 sample at 14 and 1 sample at 15 for average of 14.5
Input Input + previous difference
Output Difference
14.5 14.5 14 0.5
14.5 15 15 -0.5
14.5 14.5 14 0.5
14.5 15 15 -0.5
14.5 14.5 14 0.5
14.5 15 15 -0.5
![Page 29: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/29.jpg)
PAGE 29
Modulators error correction
●For a different value
●Three at 14 and one at 15 for an average of 14.25
Input Input + previous difference
Output Difference
14.25 14.25 14 0.25
14.25 14.5 14 0.25
14.25 14.75 14 0.25
14.25 15 15 -0.75
14.25 14.25 14 0.25
14.25 14.5 14 0.25
14.25 14.75 14 0.25
14.25 15 15 -0.75
14.25 14.25 15 0.25
![Page 30: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/30.jpg)
PAGE 30
Modulators error correction
●Error correction or precision increase is spectral control
![Page 31: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/31.jpg)
PAGE 31
Modulators error correction
●Error correction or precision increase is spectral control
![Page 32: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/32.jpg)
PAGE 32
Modulators spectral effects
●Frequency components with error correction
●Without error correction
Input 0Hz Fs/2 Fs/4
14.5 14.5 0.636 0
14.25 14.25 0.318 0.448
Input 0Hz Fs/2 Fs/4
14.5 14 0 0
14.25 14 0 0
![Page 33: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/33.jpg)
PAGE 33
Modulators –spectral control
![Page 34: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/34.jpg)
PAGE 34
Modulators spectral control
●Simplest
![Page 35: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/35.jpg)
PAGE 35
Modulators error correction
●How to code it
●difference[n]= input[n] – output[n]
●output[n] = input[n] + difference[n-1]
![Page 36: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/36.jpg)
PAGE 36
●Increase filter order for less noise in the control band
Modulators - spectral control
![Page 37: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/37.jpg)
PAGE 37
Modulators – spectral control
●H(z) = (1-z-1)N
●Often plotted on linear frequency scale
![Page 38: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/38.jpg)
PAGE 38
Modulators – spectral control
●H(z) = (1-z-1)N
●Attenuates noise in the converter pass band
●Typically converter bandwidth target is 1/10th to 1/5th of the switching frequency
![Page 39: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/39.jpg)
PAGE 39
Modulators – spectral control
●H(z) = (1-z-1)N
●Log Scale plot gives better insight
![Page 40: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/40.jpg)
PAGE 40
Modulators error correction
●How many more bits?
●Frequency dependent ● At 0Hz get pre-quantization number of bits. ● At Fs/2 get no accuracy.
![Page 41: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/41.jpg)
PAGE 41
Modulators – Summary
●Quantization in PWM and VPO modulators leads to white noise generation in control band.
●Fix this with a simple accumulate and correct.
●Use first order system with 1 delay. ● Typically need no more.
●Second or higher order if you really need to. ● Be careful – watch for its effect on the transient response.
●2nd order in our PWM IP Core block
●Because power converter, compensator and anti aliasing filter are all low pass ● High frequency noise is attenuated by the rest of the loop.
![Page 42: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/42.jpg)
PAGE 42
Modulators error correction
●“This really works.” - Tomek Kotula
●Resolution corrected modulation: the practical realisation of ideal PWM waveforms. Boys and Handley - Electric Power Applications, IEE Proceedings B (Volume:139 , Issue: 4 ) 1992 (IET)
![Page 43: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/43.jpg)
PAGE 43
Summary
●Modulators have low number of bits
●Increase the number of bits with precision extension
●Accumulate the error to correct the next switching
●Works with ● VPO for variable frequency converters ● PWM for pulse modulated converters
![Page 44: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/44.jpg)
PAGE 44
Second Half Introduction
●Digital Control Design ● No analogue translation
●Unit circle
●Digital control blocks – a library
●Compensator form ● IIR Biquad ● Second order
●Design example ● Loop shaping ● Filter coefficients
●Things to watch out for
●Single sample noise
●Anti aliasing filters
![Page 45: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/45.jpg)
PAGE 45
Digital controller design
●A way to design compensator frequency response directly in the digital domain.
●No analogue translation.
![Page 46: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/46.jpg)
PAGE 46
Unit Circle – Poles and Zeros
●z Domain
●The unit circle
●Poles and Zeros in the digital domain
●Stability in z domain poles inside unit circle
●Zeros can be outside unit circle ● Avoid zeros outside unit circle.
●Laplace transforms uniqueness does not apply to the z domain
![Page 47: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/47.jpg)
PAGE 47
Pole Zero combinations
●In analogue control design we use known frequency responses to create compensator
●Integrators
●Lead Lags
●Low Pass filters
●High Pass filters
●Let’s just do the same in the z domain
![Page 48: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/48.jpg)
PAGE 48
Digital control blocks
●Useful digital blocks ● Integrator ● Differentiator ● Low pass filter ● High pass filter ● Lead ● Lag
●Some Others perhaps not so useful ● Complex poles and zeros
![Page 49: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/49.jpg)
PAGE 49
Integrator
●Fs =
●Filter response continues above Fs/2
![Page 50: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/50.jpg)
PAGE 50
Integrator
![Page 51: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/51.jpg)
PAGE 51
Differentiator
![Page 52: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/52.jpg)
PAGE 52
Differentiator
![Page 53: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/53.jpg)
PAGE 53
High Pass Filter
![Page 54: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/54.jpg)
PAGE 54
High Pass Filter
![Page 55: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/55.jpg)
PAGE 55
Low Pass Filter
![Page 56: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/56.jpg)
PAGE 56
Low Pass Filter
![Page 57: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/57.jpg)
PAGE 57
Low Pass Filter
![Page 58: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/58.jpg)
PAGE 58
Low Pass Filter
![Page 59: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/59.jpg)
PAGE 59
Low Pass Filter
![Page 60: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/60.jpg)
PAGE 60
Low Pass Filter
![Page 61: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/61.jpg)
PAGE 61
High Pass Filter
![Page 62: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/62.jpg)
PAGE 62
High Pass Filter
![Page 63: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/63.jpg)
PAGE 63
Lead Lag
![Page 64: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/64.jpg)
PAGE 64
Lead Lag
![Page 65: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/65.jpg)
PAGE 65
Lag
![Page 66: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/66.jpg)
PAGE 66
Lag
![Page 67: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/67.jpg)
PAGE 67
Complex Poles and Zeros
![Page 68: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/68.jpg)
PAGE 68
Complex Poles and Zeros
![Page 69: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/69.jpg)
PAGE 69
Complex Poles and Zeros
![Page 70: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/70.jpg)
PAGE 70
Complex Poles and Zeros
![Page 71: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/71.jpg)
PAGE 71
Complex
![Page 72: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/72.jpg)
PAGE 72
Complex
![Page 73: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/73.jpg)
PAGE 73
Compensator design
●Compensator design is now ● Loop frequency response shaping
●Use one, two or three of the cookbook blocks to implement ● Integrator ● Lead Lag ● Low pass
●Shape the loop
●Pole and zero positions give compensator coefficients
●Compensator form?
![Page 74: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/74.jpg)
PAGE 74
Digital filter implementation
![Page 75: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/75.jpg)
PAGE 75
Second order blocks
●Second order blocks ● Signal to noise is good for 16 bit mathematics. ● Easy to find precision, resolution or quantization
problems.
![Page 76: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/76.jpg)
PAGE 76
Second order blocks
●Useful precision is retained
●Usually good enough for what power electronics control requires (with care)
●Set a0 to -1 normalizes the filter.
![Page 77: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/77.jpg)
PAGE 77
No analogue design
●fs/2 = 10kHz
●Plant measurement
●Made using the digital controller
![Page 78: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/78.jpg)
PAGE 78
Direct Digital Compensator
●Add the integrator
●Scale to close the loop with reasonable margin
●Need an integrator gain of 1/4
![Page 79: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/79.jpg)
PAGE 79
Get the poles and zeros
●Total loop with the integrator added
![Page 80: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/80.jpg)
PAGE 80
Get the poles and zeros
●Integrator form
●Scale the basic integrator form to move the crossover frequency
![Page 81: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/81.jpg)
PAGE 81
Get the poles and zeros
●Lead Lag pole and zero
![Page 82: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/82.jpg)
PAGE 82
Lead Lag
●Lead Lag also
![Page 83: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/83.jpg)
PAGE 83
Complete response
●Frequency response of the complete system
![Page 84: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/84.jpg)
PAGE 84
Coefficients
●Zeros at -1 and 0.975
●Poles at +1 and +0.97
●Multiply out z polynomial to second order
●Divide top and bottom through by z2 to get delayed operator z-1.
Coefficient Value
b0 0.25
b1 -0.725
b2 -0.24375
a1 -1.972
a2 0.97
![Page 85: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/85.jpg)
PAGE 85
All done?
●Increase the precision of the modulator
●Measure the plant frequency response
●Use the block cookbook to design the loop compensator
●Integrator and Lead Lag
●Implement these in a second order IIR biquad.
• Once you have the coefficients your compensator filter design work is only about 1/8 done!
• Usually OK but there are some things to check.
![Page 86: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/86.jpg)
PAGE 86
Things to watch
●There is no a0 choice.
●As many poles as zeros
●Or less zeros than poles
●Precision! Quantization!
●Make the code so that the coefficients can be changed. ● Software engineer creates code for IIR biquad! ● Control design engineer designs compensator coefficients! ● Put the coefficients into the biquad.
●Verify that the filter blocks do what you need. ● Use an automated test harness
●Never never never tweak coefficients. ● a and b do not match directly to pole or zero positions
![Page 87: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/87.jpg)
PAGE 87
Numeric precision ●Timer precision
● Effect of low precision ● Extending precision ● Things to watch out for with precision extensions.
●Extending precision ● Sigma delta approach ● Bandwidth limits ● Intermodulation
![Page 88: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/88.jpg)
PAGE 88
Precision in filters ●Narrow bandwidth filter
●Low pass filter example
![Page 89: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/89.jpg)
PAGE 89
Low pass filter example
![Page 90: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/90.jpg)
PAGE 90
Quantization
![Page 91: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/91.jpg)
PAGE 91
Poles and Zeros
![Page 92: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/92.jpg)
PAGE 92
Low pass filter example
●Consider the case where input range is 40.96 Amps full range with 12 bits. 10mA per bit.
●16 bit maths – round to 16 bits.
●Put the A2D 12 bits in the MSBs
●b0 and b1 =1247
●At what coefficient precision do you lose accuracy?
●What about loss of function?
![Page 93: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/93.jpg)
PAGE 93
Low pass filter continued
●Your control design engineer now suggests these filters instead
●What do you say?
●b0 and b1 are 5
●b0 and b1 are 78
![Page 94: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/94.jpg)
PAGE 94
Low pass filter example 2
Input Digital Equivalent
b0 product b1 product Product Output
10mA 8 40 40 80 0
20mA 16 80 80 160 0
60mA 48 240 240 480 0
100mA 80 400 400 800 0
200mA 160 800 800 1600 0
600mA 480 2400 2400 4800 0
1A 800 4000 4000 8000 0
2A 1600 8000 8000 16000 0
6A 4800 24000 24000 48000 1
10A 8000 40000 40000 80000 2
20A 16000 80000 80000 160000 4
40.96A 32768 163840 163840 327680 10
![Page 95: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/95.jpg)
PAGE 95
Low pass filter example 2
Input Digital Equivalent
b0 product b1 product Sum of Products
Output
10mA 8 632 632 1264 0
20mA 16 1264 1264 2528 0
60mA 48 3792 3792 7584 0
100mA 80 6320 6320 12640 0
200mA 160 12640 12640 25280 0
600mA 480 37920 37920 75840 2
1A 800 63200 63200 126400 3
2A 1600 126400 126400 252800 7
6A 4800 379200 379200 758400 23
10A 8000 632000 632000 1264000 38
20A 16000 1264000 1264000 2528000 769
40.96A 32768 2588672 2588672 5177344 1580
![Page 96: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/96.jpg)
PAGE 96
Poles and zeros
●Second order blocks can have any poles and zeros from transfer function
●Look out for poles and zeros very close together – could you remove them?
●Poles and zeros definitely on top of each other should be cancelled.
●If you have two biquads spread the poles and zeros to minimize the quantization and precision loss.
![Page 97: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/97.jpg)
PAGE 97
Precision vs dynamic range
●Direct trade off between quantization and saturation
●How much precision is enough?
● Second order block precision rules of thumbs – it will mostly be OK but check.
●Noise effect of saturation is the same as precision loss ● Consider letting things saturate but be careful
![Page 98: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/98.jpg)
PAGE 98
Numeric Precision summary
• Once you have the coefficients for your compensator your design is only about 1/8 done!
• Usually OK.
• But • Check narrow band filters • Poles close to unit circle • Frequency response • Use a ramp to find places where LPF have problems
• Always • Work with biggest signals and biggest coefficients if possible • Check filter’s performance • Always CHECK it.
![Page 99: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/99.jpg)
PAGE 99
Digital Integrators
●Classic digital integrator from process control is an accumulator
![Page 100: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/100.jpg)
PAGE 100
Possible Digital Integrators
●Frequency response
![Page 101: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/101.jpg)
PAGE 101
Digital integrator choices
●Sum only integrator has pole zero map
![Page 102: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/102.jpg)
PAGE 102
Digital Integrator
●Better integrator has pole zero map
●Integrator has one pole and one zero
●Implement in biquad.
●Have spare pole and zero for something else.
●Most compensators need only one biquad!!!
![Page 103: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/103.jpg)
PAGE 103
Choosing the Best Integrator
●Better integrator
●Attenuation at Fs/2 – this is good
![Page 104: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/104.jpg)
PAGE 104
Implementing the Digital Integrator
●Use the biquad
●Put the pole and zeros into the biquad.
![Page 105: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/105.jpg)
PAGE 105
Resolution integrators
●Lower crossover frequency
●b0=0.001 b1 = 0.001, a0 = -1
![Page 106: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/106.jpg)
PAGE 106
Integrator Example
Input Digital In b0 product b1 product Sum of Products
Output
10mA 8 256 256 512 0
20mA 16 512 512 1024 0
60mA 48 1536 1536 3072 0
100mA 80 2560 2560 5120 0
200mA 160 5120 5120 10240 0
600mA 480 15360 15360 30720 0
1A 800 25600 25600 51200 0
2A 1600 51200 51200 102400 0
6A 4800 153600 153600 307200 9
10A 8000 256000 256000 512000 15
20A 16000 512000 512000 1024000 31
40.96A 32768 1048576 1048576 2097152 64
![Page 107: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/107.jpg)
PAGE 107
Fixing integrators
![Page 108: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/108.jpg)
PAGE 108
Analogue to digital converters
●A2Ds are clocked systems
●Power electronic switching is noisy
●In a microprocessor system have multiple clocks
●Some are PLL’d to each other ●All clocks jitter all the time.
●Can get single sample noise from the A2Ds when all the clock edges line up.
![Page 109: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/109.jpg)
PAGE 109
Single Sample Noise
●What does it look like?
●Impulse response of closed loop – part digital part analogue
●This response is almost completely unrecognizable behavior in the output
![Page 110: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/110.jpg)
PAGE 110
Single Sample Noise
●A true digital impulse
●System has all available energy of the power converter to put into the output ● Single sample noise issues often cause converter destruction. ● It might be the cause of your blow up.
●Input to modulator must be low pass filtered!!!!
●If you have single sample noise ● hopefully get reasonable occurrence rate – not too high not too low
●Find problem by looking at the digital stream. ● Build this feature into your converter controller.
●Solve problem by ● Dealing with the correlation ● Electrostatic shielding ● Change the A2D – qualify the A2D before you begin.
![Page 111: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/111.jpg)
PAGE 111
Anti Aliasing Filters
●Always use anti aliasing filters ● Always
•Always
●Always design the anti aliasing filter
●Some of the filtering from the power converter
●Get the rest by adding lowest order filter possible
![Page 112: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/112.jpg)
PAGE 112
Anti aliasing cutoff frequency
●Best case design rule ● Make the sampled ripple at the A2D input the same size as 1 LSB
change.
●Realistic Design Rule ● Choose the phase shift of the anti aliasing filter for stability ● Power converter phase shift ● Anti aliasing filter phase shift
![Page 113: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/113.jpg)
PAGE 113
Anti aliasing filter tips
●Transient response shorter than the sampling time if possible
●First order RC normally enough
●Even if you are oversampling and have digital anti-aliasing filters use an analogue anti-aliasing filter
●For higher orders - well damped is best.
![Page 114: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/114.jpg)
PAGE 114
Summary
●System
![Page 115: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/115.jpg)
PAGE 115
Summary
●Modulators ● Effective numeric precision ● Quantization ● Correcting the precision ● Frequency weighting
●Compensators ● Block set of useful pole zeros combinations ● Direct digital design ● No analogue translation ● Second order blocks IIR biquads ● Coefficients of IIR biquad filters from poles and zeros
●Anti Aliasing Filter ● How to Design
●Single Sample Noise ● How to find ● Effects ● How to diagnose
![Page 116: High Performance Digital Control Presentation Apec 2016 Dr. Hamish Laird](https://reader031.vdocuments.site/reader031/viewer/2022030304/587a130a1a28abb4238b4b1d/html5/thumbnails/116.jpg)
PAGE 116