harmonics in grid-connected converters - aalborg … · 2 harmonics in grid-connected converters |...

Harmonics in Grid-Connected Converters: challenges and cost -effective opportunities in ASD systems

POOYA DAVARI P DA @ E T. A A U . D K

2 0 O C TO B E R 2 0 1 6

WWW.NHTD.ET.AAU.DK

2

Harmonics in Grid-Connected Converters | Pooya Davari | 20 Oct, 2016

NHTD has two work-packages based on the harmonic mitigation techniques and solutions as follows: 1- Single Drive Systems 2- Multi Drive Systems MAY 2014 APRIL 2017

NHTD Team

THE PROJECT STRUCTURE:

New Harmonic Reduction Techniques for Motor Drives (NHTD)

Dr. Soltani

Dr. Soltani Prof. Zare

WP2 Leader http://www.nhtd.et.aau.dk

3

Outline

Introduction (three-phase diode front-end)

Electronic Inductor (EI) Concept

Proposed Selective Harmonic Mitigation

Multi-Drive Systems

Experimental Results

Conclusion


4

Introduction

Three-Phase Diode Front-End System


5 Typical ASD System

Passive Filtering Solution

AC or DC side passive filtering (inductor): simple and effective to some extent. But they are bulky, costly, causes resonance, worsen system dynamic, and etc.

Active harmonic mitigation solutions have been introduced to improve the input current quality. But most of them are complex, costly and reduce system efficiency.

AC or DC side passive filtering After passive filtering (THDi ≈ 40%)

Before passive filtering (THDi > 120%)

ia,n/ia,1

Harmonic order (n)

Simple

Cost effective

Efficient


6

Three-Phase Diode Rectifier Passive Filtering Challenges

Typical ASD System

Performance of three-phase diode rectification using dc-side passive filtering: (a) effect of loading condition, (b) corresponding power factor λ and input current THD at different power levels, (c) effect of dc-link inductor size.


(a) (b) (c)

7

Three-Phase Diode Rectifier Passive Filtering Challenges

Typical ASD System

Typical annual loading profile of adjustable speed drive applications: (a) water pump, (b) cooling tower.


8

Electronic Inductor Concept

Basic Idea


9 Electronic Inductor Technique

Basic Concept

Emulating the behavior of an ideal infinite inductor

λ ≈ 0.95

THDi ≈ 29%

THDi and Power Factor (λ) independent of the load profile.

Controlling dc-link (udc).

10 Electronic Inductor Technique

No major modification is imposed to the original system!

ia


11

Load Profile

5 A/div, 2 ms/div

Po = 100%

Po = 70%

Po = 50%

Po = 30%

Po = 10%

ia

λ ≈ 0.95

THDia ≈ 29 %

(b)

Cdc

+

_

Ldc

a

b

c

RL udc

D

S

electronic inductor (EI)

Grid

~ia

iL

ur

Udc*

udc

PI

iLiL*

S controller

(a)

Electronic Inductor Concept

Independent performance (10% to 100% Po)

Implementation of electronic inductor using a boost dc-dc converter topology in a three-phase diode rectifier: (a) circuit schematic, (b) corresponding input current waveform (ia) at different power levels. (Simulation parameters: rms line-to-line voltage Ug,LL,rms = 400 V, grid frequency fg = 50 Hz, grid impedance Lg = 0.18 mH, Rg = 0.1Ω , rated power Po,max = 7.5 kW, Udc = 700V, fsw = 40 kHz, dc-link capacitance Cdc = 470 μF, and dc-link inductance Ldc0 = 2 mH.)

Assuring CCM operation


12 Experimental Setup

System Specifications

Ug,LL,rms fg Lg, Rg Pomax

(100%)

Udc fsw Ldc0 Cdc

400 V 50 Hz 0.18mH, 0.1 Ω

7.5 kW 700 Vdc 20 kHz 1 mH 470 µF

Employed components

7.5 kW

13 Experimental Results

Original Drive (Passive Filter)

Po = 5kW Udc = 534V

Po = 3kW Udc = 534V

THDi = 48.7%, λ = 0.89

THDi = 67.6%, λ = 0.81

EI (flat current modulation)

L = 1mH, fsw = 20 kHz THDi = 28%, λ = 0.95

THDi = 28%, λ = 0.94

Po = 5kW Udc = 700V

Po = 3kW Udc = 700V

L = 1mH, fsw = 20 kHz

L = 2.5mH

L = 2.5mH

14

Improving Efficiency

Adjustable Switching Frequency Scheme


15 Proposed Solutions

Adjustable Switching Frequency

5 A/div, 2 ms/div

Po = 100%

Po = 70%

Po = 50%

Po = 30%

Po = 10%

ia

λ ≈ 0.95

THDia ≈ 29 %

5 A/div, 2 ms/div

Po = 100%

Po = 70%

Po = 50%

Po = 30%

Po = 10%

ia

λ ≈ 0.95

THDia ≈ 29 %

Po (%)

k'ripp

le (%)ƒ'sw

k'ripple (%)

ƒ'sw

(kHz)

[1] P. Davari, Y. Yang, F. Zare, and F. Blaabjerg, “Energy Saving in Three-Phase Diode Rectifiers using Adjustable Switching Frequency Modulation Scheme,” EPE-2016.

16

Adjustable Switching Frequency

System Specs:

Using ASFM strategy improves efficiency from 315W losses to 173W losses (95.8% vs 97.7%)

5 A/div, 2 ms/div

Po = 100%

Po = 70%

Po = 50%

Po = 30%

Po = 10%

ia

λ ≈ 0.95

THDia ≈ 29 %

5 A/div, 2 ms/div

Po = 100%

Po = 70%

Po = 50%

Po = 30%

Po = 10%

ia

λ ≈ 0.95

THDia ≈ 29 %

Proposed Solutions

Po (kW)

η (

%)

Fixed switching-EI, IGBT

with Xflux core @ 35 kHz

Proposed ASFS-EI, IGBT

with Xflux core @ 10-35kHz

Passive filtering





Three-phase rectification with: η : Effeciency

T : Power switch (Transistor)

sw : Switching loss

cond : Conduction loss

D : Boost diodegate : Gate-driver

1-λ

THDi

Ploss,total

(%)

(W)

PLdc (W)

Pbridge (W)

PT,sw

PT,cond

PD,sw

PD,cond

Pgate

(W)

(W)

(W)

(W)

(W)kripple(%)

9075

6045

3015

1

2

3

4

5

6

504540353025

0.12

0.1

0.08

0.06

0.04

0.02

60

3040

50

2010

60

50

40

30

20

10

300

250

200

150

100

50

20

18

16

14

12

105

1525

3545

55

160 10130 100 70 40

119

75

31

0.7

0.6

0.5

0.4

0.3

0.2

PC,ESR (W)

C,ESR : DC-Link Capacitor

Effective Series Resistor

Parameter Symbol Value

Grid phase voltage vabc 230 Vrms

Grid frequency fg 50 Hz

Grid impedance Lg, Rg 0.18 mH, 0.1 Ω

DC-link inductor Ldc-p, Ldc 2.5 mH, 2 mH

DC-link capacitor Cdc 470 µF

DC-link voltage Udc-p, Udc ≈ 534V, 700 V

Rate power Po,max (100%) 7.5 kW

17

Using WBG Devices

Applying SiC power devices reduces the size of magnetic components and losses (131 W vs 173 W)

Proposed Solutions

Passive filtering





Three-phase rectification with: η : Effeciency

T : Power switch (Transistor)

sw : Switching loss

cond : Conduction loss

D : Boost diodegate : Gate-driver

Passive filtering

Fixed switching-EI, SiC


Fixed switching-EI, SiC with

KoolMu core @ 100 kHz

Three-phase rectification with:

1-λ

THDi

Ploss,total

(%)

(W)

PLdc (W)

Pbridge (W)

PT,sw

PT,cond

PD,sw

PD,cond

Pgate

(W)

(W)

(W)

(W)

(W)kripple(%)

9075

6045

3015

1

2

3

4

5

6

504540353025

0.12

0.1

0.08

0.06

0.04

0.02

60

3040

50

2010

60

50

40

30

20

10

300

250

200

150

100

50

20

18

16

14

12

105

1525

3545

55

160 10130 100 70 40

119

75

31

0.7

0.6

0.5

0.4

0.3

0.2

1-λ

THDi

Ploss,total

(%)

(W)

PLdc (W)

Pbridge (W)

PT,sw

PT,cond

PD,sw

PD,cond

Pgate

(W)

(W)

(W)

(W)

(W)kripple(%)

9075

6045

3015

1

2

3

4

5

6

504540353025

0.12

0.1

0.08

0.06

0.04

0.02

60

3040

50

2010

60

50

40

30

20

10

300

250

200

150

100

50

20

18

16

14

12

105

1525

3545

55

160 10130 100 70 40

119

75

31

0.7

0.6

0.5

0.4

0.3

0.2

(a) (b)PC,ESR (W)

C,ESR : DC-Link Capacitor

Effective Series Resistor

PC,ESR (W)

Ldc = 2 mH Ldc = 1 mH


18

Proposed Solutions

Pulse Pattern Modulation




[1] P. Davari, F. Zare, and F. Blaabjerg, “Pulse pattern modulated strategy for harmonic current components reduction in three-phase ac-dc converters,” IEEE Trans. Ind. Appl., vol. 52, no. 4, pp. 3182-3192, July-Aug. 2016.




van

ia

Idc1

-Idc1

-Idc2

Idc2

Idc2

-Idc2

120o

30o

α1

α2

β β 2β

30o ωt

ωt

ωt

ωt

θ θ

2π

2π

2π

2π

π

π

π

π

π/2

Adding or subtracting phase-displaced current levels




Optimization

1 1(1)

(n)

(1)

a g

g

n n

g

Obj M i L

iObj L

i

2

obj n n nF w Obj L

0 1 2 0

3m

where n = 6k±1 with k being 1, 2, 3, ….

Instead of fully nullifying the distortions, the harmonics could be reduced to acceptable levels by adding suitable constraints (Ln).

Constraint

Objective Function Weighting Factor

Here, Fobj is formed based on a squared error with more flexibility by adding constant weight values (wn) to each squared error function


Employed components




ia

Idc1 2π ωt

ωt

ωt

iM

ib

ic

2π

2π

2π

Idc2

Idc1

Idc2

θ

β

2β

120o

120o

120o

30o

θ Idc2

Idc2

Idc1

Idc1

ωt

30o

2β

+ iM

ia

ib

ic

+

1/2

abs( )

abs( )

abs( )

|sin(3ω0t)|

β β

β

α1 α11

1 11

0

1 2

1

:

( sin(3 ) sin(3 ))

M dc dc

M dc

if t

i I I

else

i I

Synthesis of the modulation signal

1 11

0

1 2

1

:

( sin(3 ) sin(3 ))

M dc dc

M dc

if t

i I I

else

i I

24 Experimental Results

Harmonic Elimination [7th and 13th]

Harmonic Mitigation

Strategy

Harmonic Distribution and THDi (%)

ia (5)/ ia (1) ia(7)/ ia (1) ia(11)/ ia (1) ia (13)/ ia (1) THDi

7th and 13th harmonic

cancellation 31.2 2.3 9.5 1 34

5th, 13th harmonic

cancellation 4.7 37.5 23.4 4 47.7

Conventional method

(square wave) 20 14 8.7 7.3 28.6

Idc1 = 1, Idc2 = 0.618, α1= 42o

Harmonic Elimination [5th, 13th]

Idc1 = 1, Idc2 = 0.653, α1= 70o

Po = 5kW Udc = 700V Po = 5kW Udc = 700V

25

Proposed Solutions

Multi-drive


www.weg.net

26 Multi-Drive Configuration

Basic Concept

Generating staircase total input current by proper combination

In many applications it is a common practice to employ parallel connected drive units. In this situation the application demand is met using multiple modestly sized motor units rather than one single large unit.


27

Phase-shifted Flat Current Control

Multi-Drive Configuration

[1] Y. Yang, P. Davari, F. Zare, and F. Blaabjerg, “A dc-link modulation scheme with phase-shifted current control for harmonic cancellation in multi-drive applications,” IEEE Trans. Power Electron., vol. 31, no. 3, pp. 1837-1840, Mar. 2016.

28

The new current modulation technique is applied to each DC-DC converter in order to further improve the current quality. However, it requires PLL for synchronization purpose.


[1] P. Davari, Y. Yang, F. Zare, and F. Blaabjerg, “A multi-pulse pattern modulation scheme for harmonic mitigation in three-phase multi-motor drives,” IEEE J. Emerg. Sel. Top. Power Electron., vol. 4, no. 1, pp. 174-185, Mar. 2016.

[2] P. Davari, Y. Yang, F. Zare, and F. Blaabjerg, “Predictive pulse pattern current modulation scheme for harmonic reduction in three-phase multi-drive systems”, IEEE Trans. Ind. Electron, vol. 63, no. 9, pp. 5932-5942, Sept. 2016.

Pulse pattern current modulation


Pulse pattern current modulation (αf ≠ 0o)

van

1 2

Idc2Idc1

i1

Idc1

Idc2

Idc2

-Idc1

-Idc2

-Idc2

α1

α0

α2

120o

β 2β

θ 2π π ωt

ωt

ωt

ωt

i1'

i2'

isa

↑

30o

↑

↑

ꜛ ꜛ

αf

ꜛ ꜛ

αf

-Idc1

2π

2π

2π

30o

α0 β

θ

30o

120o

ꜛ

ꜛ

ꜛ

ꜛ

centered

↑ Idc2

2

2

0

1

2

2

0

1

1

1

2 2sin sin 2

3

2 2cos cos 2

3

( 1)

( 1)

dc

n j j

j

dc

n j j

j

j

j

I na n n n

n

I nb n n n

n

1

0 0

1

0 0

2 2sin sin

3

2 2cos cos

3

dc

n

dc

n

I na n n

n

I nb n n

n

2 2

s n n n ni n a a b b

+

+

=

30

Implemented Setup

SCR

Symbol PARAMETER Value

vg,abc Grid phase voltage 230 Vrms

fg Grid frequency 50 Hz

Zg (Lg, Rg) Grid impedance 0.1 mH, 0.01 Ω

Ldc DC link inductor 2 mH

Cdc DC link capacitor 470 µF

Vo Output voltage 700 Vdc

Kp, Ki PI controller (Boost converter) 0.01, 0.1

Kf, ts, ξ PLL parameters 0.8, 0.2 s, 1.41

HB Hysteresis Band 2A

Po_total Total output power ≈6.5 kW

Parameters of the multi-rectifier system


Diode

Rectifier


Experimental Results (phase shift control)

THDi ≈ 16%, λ = 0.93

PSCR = 3 kW, PDR = 3.63kW, Udc = 700V

THDi ≈ 15.8%, λ = 0.95

PSCR = 3 kW, PDR = 3.36kW, Udc = 700V


THDi ≈ 8.6%, λ = 0.94

PSCR = 3 kW, PDR = 3.65kW, Udc = 700 V

THDi ≈ 10%, λ = 0.94

PSCR = 3 kW, PDR = 3.86kW, Udc = 700 V

Experimental Results (current modulation)


Extending number of the units (phase shift control)


More flexibility in obtaining desired THDi and PF

Five parallel units (n = 5)

λmax THDi,min


Extending number of the units (current modulation)


Five parallel units (n = 5)

Lower harmonic distortion can be obtained

λmax THDi,min


Experimental Setup


Unit4 Unit3 Unit2 Unit1

ia_PCC THDi = 8.3% λ = 0.92

FFT

ia_DR

ia_SCR_1

ia_SCR_2 ia_SCR_3

36

The EI technique can significantly improve the THDi , λ and stable DC link

The proposed pulse pattern modulation can eliminate low order harmonics

The efficiency of EI technique can be significantly improved by employing WBG devices, alternative topologies and smart control techniques

Conclusion

With multi-drive configuration, the EI technique can further reduce the THDi

The EI technique can maintain the system performance under non-ideal operation conditions (e.g., unbalanced grid)


37

Thank You

http://www.nhtd.et.aau.dk

Pooya Davari [email protected]

harmonics in grid-connected converters - aalborg … · 2 harmonics in grid-connected converters |...

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