hardware komponen -...

HARDWARE KOMPONEN

ERI PRASETYOGUNADARMA

Inside Microsoft’s Wireless Bluetrack Mouse

Inside Palm Pre

Inside ARRU449 Universal Remote

ES: Simplified Block Diagram

actuatorsactuators

Information Processing• Processor Technology• Characteristics

Energy efficiency Code-size efficiency Run-time efficiency

• Special features of DSP processors• Multimedia instructions• Very Long Instruction Word (VLIW) machines

• Reconfigurable Hardware• Memory

Processors• What is a processor?

– Artifact that computes (runs algorithms)– Controller and data-path

• General-purpose processors (GP):– Variety of computation tasks– Functional flexibility and low cost at high volumes (maybe)– Slow and power hungry

• Application-Specific Instruction-set Processors (ASIP):– Tuned for application domain, but programmable– Fast and power efficient (compared to GP)

• Application-Specific Integrated Circuit (ASIC):– Customized hardware for specific task/application– Fast, power efficient, minimal area– Functional inflexibility and high cost at low volumes (maybe)

General-purpose processors• Programmable device used in

a variety of applications– Also known as “microprocessor”

• Features– Program memory– General datapath with large

register file and general ALU• User benefits

– Low time-to-market and NRE costs

– High flexibility• Examples

– Pentium, Athlon, PowerPC

IR PC

Registerfile

GeneralALU

DatapathController

Program memory

Assembly code for:

total = 0 for i =1 to …

Control logic and

State register

Datamemory

Application-specific IS processors (ASIPs)• Programmable processor optimized

for a particular class of applications having common characteristics– Compromise between general-purpose

and ASIC (custom hardware)• Features

– Program memory– Optimized datapath– Special functional units

• Benefits– Some flexibility, good performance, size

and power• Examples

– DSPs, Video Signal Processors, Network Processors,..

IR PC

Registers

CustomALU

DatapathController

Program memory

Assembly code for:

total = 0 for i =1 to …

Control logic and

State register

Datamemory

Application-Specific ICs (ASICs)• Digital circuit designed to

execute exactly one program– coprocessor, hardware accelerator

• Features– Contains only the components

needed to execute a single program

– No program memory• Benefits

– Fast– Low power– Small size

DatapathController

Control logic

State register

Datamemory

index

total

+

Application Specific Circuits (ASIC)

•Custom-designed circuits necessary if ultimately speed or energy efficiency is the goal and large numbers can be sold.•Approach suffers from long design times and high costs.

IC technology

• A digital implementation (gate-level) is mapped to silicon using various layers– Full-custom/VLSI– Semi-custom ASIC (gate array and standard

cell)– PLD (Programmable Logic Device)

source drainchanneloxidegate

Silicon substrate

IC package IC

Full-custom/VLSI• All layers are optimized for an embedded

system’s particular implementation– Placing transistors– Sizing transistors– Routing wires

• Benefits– Excellent performance, small size, low

power• Drawbacks

– High NRE cost (e.g., $300k), long time-to-market

Semi-custom

• Lower layers are fully or partially built– Designers are left with routing of wires and

maybe placing some blocks• Benefits

– Good performance, good size, less NRE cost than a full-custom implementation (perhaps $10k to $100k)

• Drawbacks– Still require weeks to months to develop

PLD (Programmable Logic Device)

• All layers already exist– Designers can purchase an IC– Connections on the IC are either created or

destroyed to implement desired functionality– Field-Programmable Gate Array (FPGA) very

popular• Benefits

– Low NRE costs, almost instant IC availability• Drawbacks

– Penalty on area, cost (perhaps $30 per unit), performance, and power

Full-custom/VLSI

MENGGUNAKAN SOFTWARE CAD TERTENTU

Software Tools Design

• LASI,MAGIC,DREAI• MAX,MyCAD LAYED• Cadence

• Mentor Graphics• Etc

Pengguna Mentor Graphics

CHIP Fabrication

• CMP-TIMA, France• TSMC, Taiwan• NEC, Japan• Mosis, USA• Mimos,Malaysia ?• Etc

Cost

• Austria Micro Systems– 0.6 CMOS CUP 390 Euro/mm2

– 0.35 CMOS C35B4C3 650 Euro/mm2

• STMicroelectronics– 0.18 CMOS HCMOS8D 990 Euro/mm2

– 0.12 CMOS HCMOS9GP 2500 Euro/mm2

– 90 nm CMOS CMOS090 5000 Euro/mm2

Process Visual

Disain skema

Hasil Simulasi

Process Visual

Disain skema

Hasil Simulasi

Disain Layout

Layout Siap Untuk Difabrikasi

CONTOH KASUS

MENDESAIN ADC 8 BITS

DENGAN ASIC

How to design …Case : Pipeline ADC design

• First Step :– Architecture Circuit Design

Stage 1 Stage 2

Diagram Block of One bit per stage


• First Step :– Architecture Circuit Design

Implemented bySwitched Capacitor

Each stage operates in two phase : Sampling phase Multiplying Phase


Sampling Phase Multiplying Phase

1. Vin is stored in capcitors

2. Comparator produces a digital output D

D = 1 if Vin > (Vrefp – Vrefn) / 2

D = 0 if Vin < (Vrefp – Vrefn) / 2

1. If D = 1

Capacitor C1 connect to Vrefp

Vout = 2 * Vin – Vrefp

2. If D = 0

Capacitor C1 connect to Vrefn

Vout = 2 * Vin - Vrefn


ComparatorConsists of three blocks :•Preamplifier•Decission circuit•Output buffer

•First Step :•Architecture Circuit Design


Operational Amplifier Vdd = 5 V and Vss = - 5V

•First Step :•Architecture Circuit Design


• Second Step :– Done Simulation

• Result of simulation of Operational Amplifier


• Second Step :– Done Simulation

• Result of simulation of one bit per stage pipeline


• More Step :– Made Layouts

• One stage A/D converter layout

CapacitorsComparator

OP-AMP


• More Step :– Layouts Design

• 8 bits A/D converter layout


• More Step :– Layouts Design

• 8 bits ADC layout of CHIP photograph

hardware komponen -...

Documents