handbook of silicon wafer cleaning technology || aqueous cleaning surface conditioning processes

201

K. A. Reinhardt and W. Kern (eds.), Handbook of Silicon Wafer Cleaning Technology,2nd Edition, 201–265 © 2008 William Andrew Inc.

4 Aqueous Cleaning and Surface Conditioning Processes

Glenn W. Gale

SEZ AG, Tokyo, Japan

Robert J. Small

RS Associates, Tucson, AZ, USA

Karen A. Reinhardt

Cameo Consulting, San Jose, CA, USA

4.1 Overview of Aqueous Cleaning, Rinsing, and Drying Applications and Techniques

Fabrication of integrated circuit (IC) devices requires contamination removal, particle removal, and surface conditioning to achieve high yield-ing products. Nearly all the cleaning and surface conditioning processes are done in the liquid phase, and a majority of these processes are aqueous. Liq-uids offer several advantages including high solubility of chemical reagents and contaminants, drag forces to aid in removal of solid contaminants, metal complexation, and easier avoidance of electrostatic deposition of particles compared with air. Aqueous liquids are further advantageous, in part because H 2 O is easily and inexpensively purifi ed so that ultra pure deionized water (DI H 2 O) is abundantly available in semiconductor factories. Thus by using aqueous cleaning processes, the requirements of achieving extremely high chemical purity, maintaining low manufacturing cost, and the minimization of adverse environment and health effects, which are all constant themes for semiconductor manufacturing engineers, are more manageable.

Mixing H 2 O with various chemicals forms the most common cleaning solutions used in IC manufacturing. Typically, these chemicals are mixed

202 Wet Chemical Processes

with the DI H 2 O at the manufacturing facility. Additionally, there are also numerous pre-mixed specialty chemicals, which are delivered from chemical suppliers. These chemicals may be solvent-based or aqueous-based.

Wet cleaning processes can be categorized as pre-process cleaning or post-process cleaning steps in the IC manufacturing fl ow. Further, they can be divided between the front end of line (FEOL) and back end of line (BEOL), the former essentially comprising steps to form the active devices and the latter steps to connect them by multiple levels of metal wiring. Historically, BEOL cleaning steps have been accomplished using organic solvents as opposed to aqueous chemistries, due to the incompatibility of typical FEOL aqueous cleaning solutions with the metal wiring. This is also changing, however, and aqueous cleaning has become increasingly used in the BEOL.

The cleaning process must be followed by rinsing and drying of the wafer. Many methods exist for these steps and will be discussed in later sections. The method used is usually based on the type of equipment used and will be discussed in Section 4.5.

4.1.1 FEOL cleaning

The general term of pre-process cleaning, also known as precleaning, refers to cleaning steps immediately before oxidation, deposition, annealing, and sometimes lithography. In such circumstances, it is essential to have a surface that is free from particulate, metallic, and organic contaminants prior to the next step. In some cases, such as deposition of epitaxial Si, it may also be necessary to have a H-terminated Si surface that is free from any native or chemical oxide. The terms “ surface preparation ” or “ surface conditioning ” are often used in place of “ cleaning ” , since the goal is in fact to chemically prepare a surface for the subsequent process.

Although the formulations have been modifi ed over the years and alter-natives have been proposed, the RCA cleaning sequence developed by Werner Kern et al. [ 1 – 3 ], more than 35 years ago has proven remarkably durable and effective, and it remains the backbone of most pre-process cleaning in the IC manufacturing industry today. In the two-step cleaning sequence wafers are contacted by a fi rst solution called SC-1 (sometimes referred to as APM- ammonium hydroxide and hydrogen peroxide mixture) and a second solution called SC-2 (HPM-hydrochloric acid and hydrogen peroxide mixture). The SC-1 is a dilute aqueous mixture of ammonium hydroxide (NH 4 OH) and hydrogen peroxide (H 2 O 2 ), an oxidizer, which is used primarily to effectively remove particles, although it is also capable

4: Aqueous Cleaning, Gale et al. 203

of removing light organic contamination and complexing some metals such as Cu and Zn. Other metals such as Fe, however, are easily adsorbed from SC-1 solutions. For effective removal of alkaline contaminants and a wide range of metals, the SC-2 aqueous solution comprising hydrochloric acid (HCl) and H 2 O 2 is used. The RCA cleaning steps form an integral part of commonly used precleaning sequences. The overall strategy of such a sequence is typically as follows, with intermediate rinsing steps separating each chemical step:

1. Removal of relatively heavy organic contamination, such as residual photoresist.

2. Removal of silicon oxide, either in bulk or the very thin (chemical) oxide formed by the organic removal step.

3. Particle and metal removal by SC-1, with chemical oxide re-growth.

4. Residual metal removal by SC-2 (including metals that may have been deposited in the SC-1 solution).

5. Final rinsing and drying.

A detailed description of the original RCA cleaning process and its subse-quent modifi cations is presented in Chapter 1.

RCA Solution Chemicals and Contaminant Conditions Removal

SPM H2SO4 and H2O2, 2:1–4:1, Organics 90–140°CSC-1 NH4OH:H2O2:H2O, Organics, some 1:1:5–1:1:50, 40–75°C metals, particles, surface conditioning of Si along with DHF (dilute HF)SC-2 HCl:H2O2:H2O, Metals: alkaline 1:1:6–1:1:50, 40–75°C and trace metalsDHF HF, 1:10–1:200, 25°C Sacrifi cial oxide removal, surface conditioning, native oxide removal

Table 4.1-1 RCA Chemistries Showing Typical Dilution and Temperature Ranges Used for IC Manufacturing


Table 4.1-1 shows typical chemicals used for the precleaning process. The sulfuric acid (H 2 SO 4 ) and H 2 O 2 mixture (SPM) is also relied upon for the post-cleaning process. Hydrofl uoric acid (HF) is widely used for SiO 2 removal. Each of these chemicals will be described in more detail in Section 4.1.3 . The chemical composition and properties of the solutions are shown in Table 4.1-2 . The sequences of the cleaning steps are shown in Table 4.1-3 .

4.1.2 FEOL post-process cleaning and resist strip

Post-process cleaning involves removal of all the contaminants previ-ously mentioned particulate, metallic, and thin layer of organic plus oth-ers such as residual slurry, thick organic fi lms and polymers, and fi lm passivation layers. Three common types of post-cleans occur after resist stripping, also known as ashing, after reactive ion etching (RIE), and

Chemical Chemical Typical Surface TensionFormula Name Commercially at 20°C Available (dynes/cm) Concentration (wt%)

H2O Water N/A 73NH4OH Ammonium 25.5–29 63 hydroxideHCl Hydrochloric 15–37 65 acidHF Hydrofl uoric 49 acidNH4F:HF (BHF) Ammonium 10:1 volume 80–90 fl uoride: ratio, Hydrofl uoric 40:49 wt% acidH2SO4 Sulfuric acid 95–100 75H2O2 Hydrogen 30–40 74–78 peroxideCH3–CH(OH)– CH3 Isopropyl alcohol) (IPA) 100 21.7

Table 4.1-2 Chemicals Used for Cleaning and Drying Processes andSome of their Properties


Cleaning Steps Typical Sequence

FEOL post-strip clean or 1) SPM – SC-1 photoresist strip and clean

FEOL post-etch clean 1) DHF – SPM – SC-1

Post-CMP clean (FEOL 1) DHF – SC-1 oxide CMP)

Post-CMP clean (W CMP) 1) Dilute ammonia (ammonium hydroxide)

Table 4.1-4 Post-processing Cleaning Sequences and Chemistries

Table 4.1-3 Pre-thermal Processing Cleaning Sequences and Chemistries

Cleaning Step Typical Sequence

Pre-oxidation 1) SPM – DHF – SC-1 – SC-2 (e.g., pre-gate oxidation, pre-pad oxidation)

Pre-anneal 1) SC-1 – SC-2Pre-spacer

Pre-contact 1) SC-1 – DHF or BHFPre-silicide 2) DHF

after chemical mechanical planarization (CMP). Common post-cleaning sequences are shown in Table 4.1-4 .

4.1.2.1 FEOL photoresist removal

Photoresist, used as a mask for the formation of features or for ion implan-tation, requires subsequent removal by dry and/or wet methods. Most com-monly a combination of these methods is used. A plasma process is typically used to strip the bulk photoresist followed by a wet cleaning process such as hot SPM (typically >120 ° C) to remove any remaining residues. Another method, ozone (O 3 ) gas dissolved in H 2 O (DI H 2 O/O 3 ) has been applied


using various techniques, resulting in reduced cost and reduced impact to the environment, safety, and health relative to SPM. Photoresist is an organic material containing long-chain polymer, so oxidation is critical to its breakdown and removal. The diffi culty of resist removal depends on prior processing. Baking of the resist hardens it, exposure cross-links the portion of resist that is not developed, and in particular ion implantation at a high dose heavily cross-links and dehydrogenates the polymer into a hard “ crust ” near the outer surface of the resist [ 4 ]. Historically, aqueous-based chemistry methods have been capable of removing photoresist that has not been ion implanted or that has been implanted at a dose less than about 1.0 × 10 14 atoms/cm 2 , but higher dose implanted resists have required plasma stripping before wet cleaning.

4.1.2.2 FEOL post-etch cleaning

One advantage of the RIE process, for pattern defi nition using a pho-toresist mask, is the anisotropic nature of the plasma resulting in vertical profi les without horizontal etching. This enables the formation of trenches, contact holes, and vias. The anisotropic etch is achieved by a combination of ion directionality and the formation of solid residue, the so-called “ etch polymer, ” during the RIE process. The residue, however, must be subse-quently removed, a typical task for wet cleaning processes, frequently in conjunction with plasma stripping of the photoresist mask. The residue contains both organic and inorganic (often Si-containing) materials that must be removed. After etching of the gate stack polysilicon, for example, a sequence including SPM and HF is normally used for removal of both etch and strip residues, in addition to unwanted gate oxide that remains in the etched areas.

4.1 .2.3 FEOL post-chemical mechanical planarization cleaning

The CMP process uses slurry to thin down fi lms and form a planar surface. The slurry is composed of small particulate matter, the abrasive material, which effects the mechanical removal of the fi lm, and a chemical etchant that assists with the chemical fi lm removal. Other additives are also in the slurry, such as passivation agents, chemicals that control the zeta potential/charge, and other inert chemicals such as surfactants. The process is very effective, but leaves a large quantity of small slurry particles, such as silica (SiO x ), alumina (AlO x ), or ceria (CeO x ), on the wafer. Worse, if allowed to dry between polishing and cleaning, the slurry will leave particles


chemically bonded to the wafer. In fact, although CMP is a mainstream process now, it was originally thought by many to be impossible to use in manufacturing due to this contamination issue. However, effective clean-ing processes for removing the slurry residue have been implemented.

4.1 .3 FEOL oxide etching and removal

An important part of aqueous cleaning is the removal of oxide layers that are present before the cleaning process, or created by the cleaning steps themselves. These oxides may contain contaminants, or may be sac-rifi cial (temporarily used) oxides that subsequently must be removed. This is accomplished using hydrofl uoric acid (HF), either diluted with H 2 O (DHF), or pH buffered using ammonium fl uoride (NH 4 F), known as buff-ered HF (BHF) or buffered oxide etch (BOE). These chemistries will be discussed in detail in Section 4.2.2.

A critical difference between dry etching using RIE and wet etching is that the latter is isotropic. Etching will occur in all directions, which makes wet etching effective for fi lm removal or etch-back but inferior to RIE processes for unidirectional etch requirements such as trenches and vias. Also, the isotropic nature of wet etching makes undercut (undesired lateral etching) a concern in some cases.

Concentrated HF is actually a 49 wt % solution of HF in H 2 O, so that a volume dilution of 10:1 HF indicates 4.9 wt % HF, 100:1 indicates 0.49 % , and so on. Dilutions ranging from 5:1 to 200:1 are commonly used in the industry. A hydrofl uoric acid solution reacts with SiO 2 as follows [ 5 ]:

SiO2 + 4 H + + 6 F– → SiF6 2 – + 2 H 2 O Eq. (4.1-1)

The etching rate increases with temperature and concentration. Typi-cally room temperature is used, while time and concentration determine the amount of fi lm removal.

In BHF solutions, 40 wt % NH 4 F is added to the aqueous HF solution. The NH 4 F dissociates to provide F - ions that stabilize etch rates by replac-ing ions consumed in the SiO 2 etch reaction, hence the buffered solution. Such solutions may also contain surfactants that aid in the wetting of high aspect ratio trench and contact structures and in preventing Si attack in higher pH formulations. Buffered HF or DHF solutions are often used with some photoresist formulations that may react with concentrated HF solutions.


4.1.4 BEOL cleaning for metal interconnect

The most common application for BEOL wet cleaning is after the dry etching process. Because of the increasing number of interconnect layers and the decreasing feature sizes there is a constant effort to develop more effective post-etch residue (PER) removal processes while minimizing wafer contamination. This shifting technology is requiring more cleaning steps in the manufacturing process of Si wafers. The PER processes are not well defi ned compounds but mixtures of metal, metal oxides, Si, O, C and etch gas residues, sometimes containing F. New materials such as Cu and low- k (dielectric constant) dielectrics, plus decreasing linewidths and higher aspect ratios and the transition to 300 mm wafers also require more sophisticated and cost effective cleaning solutions. Depending on the device type (logic, memory, etc.), the types of material (Al or Cu, low- κ ), and number of interconnect layers, there could be as many as 50 BEOL cleaning steps. Besides removing PER and possibly the photoresist used to pattern the device features, it is also critical to remove surface contami-nants such as mobile ions and particles.

4. 1.4.1 Aluminum interconnect cleaning

The Al metallization process involves either the subtractive etching of metal to form the metal interconnect lines or etching vias through silica to a previous metal layer. Each etching process generates a different type of PER. After etching the Al metal interconnect, cleaning typically consists of an in situ downstream O2 or H2/O2-based plasma step for resist removal, followed by wet chemistry. Although the plasma may remove most, if not all, organic species, a Cl-containing residual fi lm often remains on the sidewall surface. The addition of a small amount of CF 4 to the O 2 or H2/O2 plasma can help fl uorinate the embedded metallic contamination, ren-dering the metal complexes more soluble in the subsequent wet cleaning chemistries and H 2 O rinse. Residual Cl species are a concern because of possible subsequent metal corrosion if they are not removed. Chapter 6 covers plasma stripping and cleaning processes.

Wet cleaning chemical manufacturers are under constant challenges to develop more effective chemical formulations. In the early days of the semiconductor industry it was possible to use phenolic and/or hydrocar-bon-based strippers to remove the photoresist [ 6 , 7 ], but in many cases the PER required high bath temperatures (>120 ° C) to remove the residue. As the technologies evolved, newer solvent systems based on N -methyl pyrrolidone (NMP) or other polar solvents were developed. The PER com-


positions changed with the use of antirefl ective coatings (ARC) and vari-ous concentrations of Cu added to the Al metal. An important feature of the wet cleaning chemistries was that they contained low concentrations of H 2 O to avoid possible metal etching during the cleaning step. Processing temperatures were usually 95 – 115 ° C and process times ranged from 15 to 60 minutes in batch immersion or spin – spray operation.

The IC manufacturing industry has made a shift to semi-aqueous chemistries [ 8 ]. Water (10 – 30 wt % ) was incorporated into the solution by carefully controlling the active ingredients, such as hydroxylamine (NH 2 OH), and by adding corrosion inhibitors. The hydroxylamine (HA) cleaning processes have become a signifi cant part of the Al-based tech-nology with features larger than 0.13 µ m. Process temperatures could be reduced to 60 – 75 ° C, but the H 2 O concentration is still a critical factor in effective cleaning. If too much H 2 O is added to the formula-tions then metal corrosion occurs. If the H 2 O concentration decreases below an optimum level, the formulation is not aggressive enough to remove the PER.

4.1 .4.2 Copper interconnect cleaning

The introduction of Cu and low- κ materials has changed the basic method for fabricating interconnects. The damascene method involves etching line and via features in the dielectric, a silica-based material, then fi lling those features with barrier and Cu metal. The excess metal is removed by CMP and the wafer is then processed by an aqueous post-CMP cleaning step.

The PER from the silica-based fi lms that are etched has a high concen-tration of silica, Cu and CuO x due to the exposure to the previous Cu layer. In many damascene processes there also may be remaining photoresist and a hard mask. Since many low- k materials contain various amounts of C, for example the CDO (carbon doped oxides) fi lms, the usual O 2 plasma stripping process cannot be used without damaging the desired underly-ing features. Since Cu is even more susceptible to corrosion, earlier types of solvent chemistries (including hydroxylamine-based chemistries) have proven to be too aggressive.

The cleaning chemistries used in Al technology are inadequate for the more sensitive low- k and Cu fi lms. Many of these chemistries contain sol-vents with caustic components that will attack these new materials. The wet chemical suppliers have responded by designing compositions with higher H 2 O content (60 – 90 wt % ). These chemistries can either be acidic, mildly


basic (pH 7.5~8.5) with an F-based additive, or strongly basic (pH>11). A common example in the acid case is H2O/H2SO4/H2O2 (diluted sulfuric acid and hydrogen peroxide or DSP), to which a small amount of HF is sometimes added (known as DSP+) [9].

Most of the commercially available compositions are custom formula-tions with very specifi c concentration(s) of the active ingredient(s); some of which are shown in Table 4.1-5 . These preparations are very specifi c in formulation and each component performs a particular function. For example, aprotic solvents are classifi ed as molecules that do not contain an O – H bond, for example diethylether and acetone. On the other hand, protic solvent molecules contain a H atom attached to an electronegative atom, such as O, with the general formula ROH.

An important driving force for the shift to aqueous chemistries with very aggressive components has been the change from batch immersion and batch spin – spray tools to single-wafer cleaning methods. Single-wafer cleaning has been gaining acceptance for processing BEOL pho-toresist stripping and post-etch residue removal, especially for 300 mm wafers at the <130-nm node. Batch immersion processing with F-based chemistries can be challenging because they are more likely to attack the metal and cause corrosion during post-metal cleaning. Addition-ally, batch processing takes more time compared to single-wafer pro-cessing for the residue and photoresist to be removed from the wafer surface. Therefore, longer processing times are needed for the diffusion and removal of the F – ions during the H 2 O rinsing, to avoid a possible increase of metal corrosion.

Table 4.1-5 Commercially Available BEOL Post-etch Cleaning Formulations

Commercially Available Formulation Chemicals

EKC640, 652, 6800 NH4F, H2O, aprotic solvents, aminesATMI ST250 HF, NH4F, amines, solventAir Products NE-14, NE-89, NE-28 NH4F, amines, glycolsMitsubishi ELM-C20, ELM C-30 Quaternary fl uoride, aprotic solvent, aminesTOK SST-A1, SST-A2 HF, NH4F, H2O, amines, solvents


4.2 Common Chemistries and Their Applications

4.2.1 Organic contamination removal and photoresist stripping

The most commonly removed organic compound on the wafer surface is photoresist. Although not considered a contaminant, the method of removal of photoresist is similar to that of organic contamination, and is considered a surface conditioning technique. Methods for removing photoresist and organic contamination include wet cleaning, but also effective methods for dry cleaning are available, discussed in Chapters 6 and 7.

Photoresist compounds are composed mainly of an organic resin, the composition of which depends on the lithographic wavelength to be applied, and a light-sensitive photoactive compound (PAC), such as diaz-onaphthoquinone, that is photochemically transformed by light exposure to a “ photoacid ” . For many years the resin was novolac-based, however, for 248 nm and shorter wavelengths, where absorption by novolac mate-rials is excessively high, various chemically amplifi ed resists have been used [ 10 ]. After patterning, etching, and stripping, it is common to use a wet chemical clean to ensure complete removal of organic residues from the photoresist.

4.2.1.1 Sulfuric acid/hydrogen peroxide photoresist stripping

The most common chemistry used for FEOL post-strip cleaning, and sometimes complete stripping of resist, is SPM. The ratio used may vary, but it is commonly a mixture by volume of between 2:1 and 4:1 H 2 SO 4 (96 wt % ):H 2 O 2 (30 wt % ) at temperatures in excess of 100 ° C. In some cases this temperature is reached by the heat of the exothermic reaction of the chemical components such as in a batch spin spray systems, as shown in Figure 4.2-1 . In other cases, a heated bath is used to maintain the tempera-ture above 100 ° C.

In SPM solutions the organic material is oxidized to form H 2 O-soluble carboxylic acids [5]. SPM is very effective for removing photoresist and other organic residues. However, extensive rinsing is required to remove the viscous chemical and avoid hygroscopic S residues on the wafer, which can over time absorb moisture or chemical contaminants from the atmosphere and nucleate small particulate defects [ 11 , 12 ]. To mitigate this effect small amounts of HF can be added to the mixture to alter wafer surface wetting properties, causing the chemical to effectively


Figure 4.2-1 The temperature change of an SPM solution with the temperature of H2SO4 initially at 20°C upon mixing with H2O2. The reaction is exothermic and the equilibrium temperature is reached in less than 5 minutes. Courtesy of FSI International.

2:1 SPM

5 10Time (minutes)

Tem

pera

ture

(°C

)

020

30

40

50

60

70

80

90

100110

120

8:1 SPM

4:1 SPM

H2SO4 at 20°C

drain from the wafer after rinsing [ 13 ]. SC-1 treatment after SPM is the most commonly used countermeasure, and is quite effective.

The SPM chemistry, if applied to a bare Si surface, creates a thin oxide layer. Oxide layers created by wet chemistries are known as chemical oxides. Such oxides typically grow in a self-limiting fashion (oxidizing species lacking suffi cient energy to diffuse through the formed oxide layer to react at the Si surface) such that they do not exceed about 1.0 – 1.2 nm in thickness, and are not comprised of the stoichiometric SiO 2 formed by thermal oxidation [ 14 , 15 ]. As shown in Figure 4.2-2, it has been theorized that chemical oxides comprise aggregates of molecu-lar silicic acid clusters whose OH groups can be removed by heating, causing the fi lm to densify [ 16 , 17 ], further discussed in Chapter 9. While chemical oxides have been reported to have dangling bond defect densities on the order of 1.0 × 10 12 /cm 2 at the Si – SiO 2 interface, about two orders of magnitude higher than thermally grown oxide, their qual-ity is understood to be dependent on the type of solution in which they are generated [ 18 ].

4.2.1.2 Ozonated deionized water photoresist stripping

The impact of the SPM cleaning and required rinsing chemicals on the environment, safety, and health (ESH) represents a serious drawback. Fur-thermore, as is often the case, ESH and cost are related, and the heavy use


of chemicals and H 2 O results in high cost to the industry. Consequently, many efforts have been made to replace SPM with more environmentally benign (and lower cost) processes using only O 3 and DI H 2 O. The strong oxidizing power of O 3 , and that of the OH* species formed by decomposi-tion of O 3 in H 2 O, make such a process attractive. However, the solubil-ity of O 3 gas in H 2 O is about 20 ppm at room temperature ( ∼ 20 ° C) [ 19 ], which is considered low, and its rapid consumption (the reaction rate is limited by diffusion of fresh O 3 to the wafer surface) presents a fundamen-tal limitation. Taking advantage of the inverse proportionality of the solu-bility with temperature, a sub-ambient temperature process can be used to increase the concentration of O 3 dissolved in an immersion bath [ 20 ]. While effective in some cases, the process has not been widely used since the same low temperature condition that enables increased O 3 solubility simultaneously limits its heterogeneous reaction rate with photoresist at the wafer surface. To avoid the limitations of O 3 immersion batch process-ing, several researchers have developed processes that instead use spray or vapor H 2 O in the presence of O 3 gas [ 21– 23 ]. Using this technique, the O 3 must only diffuse through a thin liquid layer or can dissolve in the

Figure 4.2-2 A suggested model for the chemical SiO2 formation in an oxidative aqueous medium. (a) formation of silicic acid molecule and SiO2 after a thermal treatment and (b) chemical oxide with a highly hydrated SiO2, or aggregates of silicic acid clusters. Adapted from reference [17]. Reproduced by permission of ECS - The Electrochemical Society from Guan, J., Gale, G., Bersuker, G., Jeon, Y., Nguyen, B., Barnett, J., Jackson, M., Burkman, D., Peavey, P., Yokomizo, K., Ueno, K., Yamasaka, M., Imai, M., Kitahara, S., and Shindo, N., Sixth International Symposium on Cleaning Technology in Semiconductor Device Manufacturing.

(B)

HO

HO

HO

HO

OH

OH

OH

OH

Si Si Si

O O O O O O

H H H H HH

Si Si Si Si

Si Si

Si + 20 + 2H 2O Si + O2 + 2H2OHO

HO

OH

OHSi

heat

(A)


H 2 O mist at the wafer surface, making it possible to simultaneously have a high temperature and a high O 3 concentration. These techniques have proven effective not only as post-plasma strip cleans but also for complete removal of photoresist layers in lieu of plasma stripping. However, pho-toresist with an ion implant dose exceeding ∼ 10 14 atoms/cm 2 still requires plasma stripping.

4. 2.1.3 Organic contamination removal

The SC-1 solution, discussed in Section 4.2.2 , is also capable of removing lighter organic contamination by oxidation. The SC-1 solution is not used for photoresist stripping, but can be used as a clean-up step to remove thin organic layers. Typically, after SPM, SC-1 is used for its particle removal capability.

4.2.2 Particle removal

4.2.2.1 SC-1 particle removal

State-of-the-art wafer cleaning processes accomplish particle removal by a combination of chemical and physical means. The SC-1 portion of Kern’s RCA sequence, used for batch immersion processing, has histori-cally been the workhorse chemistry for particle removal, and although alternatives have been proposed it remains so. The SC-1 solution consists of NH 4 OH (29 wt % ):H 2 O 2 (30 wt % ):DI H 2 O at a pH near 10 [ 1 – 3 ]. The original formulation was 1:1:5 by volume at 70 – 80 ° C, although modifi -cations have been made, which will be discussed in Section 4.3.1. SC-1 removes particles by a combination of slightly etching the SiO 2 or Si to undercut particles and electrostatic repulsion due to the high pH of the solution. The etching of Si in SC-1 is accompanied by:

1. The formation of a thin chemical oxide (as with SPM), and then

2. The removal of the oxide layer.

Hence, the combination of Si oxidation to form SiO 2 and then the subse-quent etching of SiO 2 results in some Si removal. The electrostatic repul-sion is a result of electrostatic double layer phenomena, which will be briefl y introduced here. A more thorough treatment of this complex theory can be found in Chapter 3 and in reference [ 24 ].

The interaction of a solid surface with a surrounding electrolyte, includ-ing adsorption of ions from the solution and/or dissociation of surface groups, causes the surface to become charged. The layer of counter-ions


(called the Stern layer) that attach to this charged surface and move with it, along with a diffuse layer of ions outside it, are together termed the elec-trical double layer. The charge at the boundary between these two layers is called the zeta potential, and it determines how surfaces will interact in the liquid. Surfaces of opposite charge will be attracted to one another, and surfaces of like charge will repel one another. Electrical double layer and zeta potential concepts were fi rst applied to the elucidation of wafer cleaning mechanisms by Riley et al. [ 25 ].

Zeta potential is a function of both the pH and the ionic strength of solu-tion. The zeta potential decreases from a positive value at very low pH to a negative value at high pH, as the OH– ion concentration increases. The pH value for which the zeta potential is zero is known as the isoelectric point. Figure 3.3-4 in Chapter 3 shows the zeta potential of particles of various materials, as a function of pH obtained by electrophoresis measurements. For high pH values in the SC-1 regime of 9 – 10, these materials take on strongly negative charges. Therefore, a silica particle or silicon nitride par-ticle, for example, are repelled from a silicon oxide wafer surface in SC-1. This electrostatic interaction prevents deposition of particles from solution onto wafers, and is important in ensuring particles that have been detached from a wafer during cleaning do not simply reattach.

4.2.2.2 RCA cleaning and HF particle removal

Hydrofl uoric acid, applied after an oxidizing chemistry such as SPM or DI H 2 O/O 3 , has been studied as an alternative to SC-1 for particle removal. The undercut and lift-off mechanism can be achieved by DHF. However, the zeta potential conditions are less favorable than with SC-1 due to the low pH. It has been shown that detached particles from the chemical layer close to the wafer surface can redeposit during rinsing. The use of anionic surfactants to adjust the zeta potential and thus help to avoid attraction can be an effective countermeasure for improving the net particle removal in DHF [ 26 ].

Menon et al. [ 27 ] conducted a study of particles added by various steps of an RCA clean. Figure 4.2-3 shows the number of particles, in the size range of 0.2 – 0.5 µ m, added during each step of an RCA clean-ing sequence (SC-1 – SC-2 – 10:1 BHF), and for the entire clean [ 27 ]. The SC-2 and buffered HF treatment added particles to the wafer, while the SC-1 treatment removed a few particles. The overall number of particles added to the wafer was very close to that added during the HF-last process. The addition of the particle contributions from the individual steps of the cleaning sequence does not equal the particles added for the entire clean.


This implies that some of the particles added during the initial cleaning step are removed during the next step, possibly due to interfacial effects or chemical dissolution [ 28 , 29 ].

Use of HF solutions as a fi nal cleaning step has generally been known to add particles to wafers [ 29 , 30 ]. Stripping a SiO 2 fi lm from a Si wafer renders the surface hydrophobic. When the Si wafer is immersed in the DI H 2 O rinse tank, the hydrophobicity causes particles in the DI H 2 O to be preferentially deposited on the wafer surface. Hence, particle levels on wet etched wafers generally correlate well with particle levels in the rinse tank, but not the HF bath [ 27 ]. In Section 4.4 , various rinse tank confi gurations to minimize particle deposition are discussed.

The hydrophobic or hydrophilic nature of a Si surface can be quantifi ed by the contact angle of a drop of H 2 O on that surface. A surface with a con-tact angle of 0 ° is completely hydrophilic, while a contact angle of equal to or greater than 90 ° (H 2 O which is beading on the surface can have an angle greater than 90 ° ) defi nes a completely hydrophobic surface. The contact angle of H 2 O with an HF-etched surface is approximately 66 – 85 ° , while that of buffered HF on a hydrophobic surface is around 70 ° [ 31 , 32 ]. The Si surface wettability of buffered HF is not signifi cantly different from that of H 2 O. To improve the wettability of the etchant, Kikuyama et al. [ 31 ] recommend the use of hydrocarbon surfactants. Their studies have shown that the use of carefully selected surfactants can signifi cantly reduce the particle contamination in wet etch processing. The application of surfac-tants in chemical solutions, especially in pre-gate oxide cleans, should be approached very carefully. Surfactant molecules are potential sources of carbonaceous residues. Aggregates of these molecules, called micelles, are

Figure 4.2-3 Particle addition to a wafer after various steps in a wet cleaning process. The alkaline-rinse process is SC-1 followed by a rinse; the acid-rinse is SC-2 followed by a rinse (27). Used with permission from Solid State Technology.


in the submicron-size range and can represent an added source of particles. Also, many surfactants cause foaming, which can leave stains on the wafer surface and cause uneven etching.

The hydrophilic/hydrophobic nature of wafer surfaces after various chemical-cleaning steps is noted in Table 4.2-6 [ 33 ]. The SC-1 and SC-2 treatments leave the wafer extremely hydrophilic. Figure 4.2-3 shows that SC-2 adds particles to a wafer surface, while SC-1 removes a few parti-cles. Both SC-1 and the SC-1–SC-2 sequence leave the wafer hydrophilic, and the surface tensions of both chemical solutions are similar [ 34 ]; hence, the differences in particle removal behavior must be attributed to chemical interactions at the liquid – wafer interface. Kern [ 35 ] reported that SC-1, at ∼ 80 ° C, etches SiO 2 at a rate of about 0.5 Å /min, whereas SC-2 shows very little change in thickness. The etching in the alkaline SC-1 solution probably undercuts SiO 2 beneath particles, allowing them to be more eas-ily dislodged from the wafer. Also, Niida et al. [ 36 ] have shown that the zeta potential of common types of particles in alkaline solutions is signifi -cantly more negative than in acidic. However, in SC-2 solutions, the zeta potential of most particles is positive. The zeta potential of the Si surface is typically negative in most solutions (isoelectric points of Si and SiO 2 sur-face are 1.5 – 4.0). Hence, SiO 2 particles tend to be attracted to the Si wafer surface in SC-2, while they are repelled in SC-1 solutions [36 ].

4. 2.2.3 Particle removal and surface roughness

Mishima et al . [ 37 ] investigated the effect of different concentrations of NH 4 OH in SC-1 mixture in a batch immersion tank on particle removal.

Table 4.2-6 Effects of Cleaning Chemistry on Si Surface Contact Angle [33]. Measurements of contact angles are typically performed with a Goniometer. Wafers are assumed to be hydrophilic before the cleaning sequences are performed. Reprinted from Microcontamination Magazine.Copyright 1990, Tom Cheyney, Los Angeles, CA. Used with permission

Bare Si Wafer after Contact Angle Mean Hydrophobic orCleaning with Chemistry and Standard Deviation° Hydrophilic

DI H2O 16 ± 1.3 HydrophilicSC-1 1:1:5 + Rinse 10 ± 0.8 HydrophilicSC-2 1:1:5 + Rinse 9 ± 0.5 HydrophilicBOE 1:10 + Rinse 66 ± 2.1 Hydrophobic


They recommend that the SC-1 solution should have a lower NH 4 OH content (0.50 – 0.05 times that conventionally used) to improve the par-ticle removal capability by a factor of two, without any increase in sur-face roughness. Ohmi et al. [ 38 ] and Meuris et al. [ 39 ] have also studied the effect of NH 4 OH concentration on Si surface roughness and particle removal capability. Ohmi reccommends a 0.05:1:5 SC-1 as the optimum mixture based on particle removal and etch rate studies. The optimum of NH 4 OH concentration was correlated to the solution etch rate at which par-ticle removal effi ciency was highest. The roughness resulting from 0.05:1:5 at 0.2 nm Ra (average roughness) was half that at 1:1:5, as measured by AFM (atomic force microscopy). Increased surface roughness was found to cause a decrease of the gate dielectric breakdown charge ( Q BD ), as shown in Figure 4.2-4 [38 ]. Meuris et al. [39 ] also showed that increase in Si surface roughness from an SC-1 solution could directly cause a decrease in capacitor yield. They recommend a 0.25:1:5 mixture of SC-1 for good particle removal without signifi cant surface roughness. The differences in optimum of NH 4 OH concentration between Ohmi’s and Meuris’s studies have been reported by Meuris to be due to a difference in solution tem-peratures. Ohmi’s studies were conducted at approximately 80 ° C, while Meuris’s work was at 70 ° C.

Various concentrations and dilutions have been proposed for SC-1. In some cases, single-wafer processors use concentrations for particle removal that are different from those of batch immersion tanks. Also different engineers

Figure 4.2-4 Effects of Si surface roughness (Ra) on of gate dielectric breakdown charge (QBD) [38]. The thickness of the gate oxide was 9.8 nm and the voltage applied to the devices was 9.5 MV/cm. Courtesy of FSI International.


have found optimum concentrations for their specifi c processes. Other researchers have proposed cleaning sequences that avoid SC-1 entirely. One published method uses 1 wt % HF and 1 wt % HCl in a continuous fl ow batch immersion system [ 40 ]; other concentrations and formulations are also used. Alternative sequences will be discussed in Section 4.2.4.

4.2.2.4 Megasonic particle removal

As early as 1979, researchers at RCA reported using megasonic energy to remove particles from wafers [ 41 ]. Sonic cleaning of the Si wafers is an important part of the total surface conditioning process. The use of megasonic energy is every effective at removing particles, in combination with H 2 O alone or with SC-1. As Menon and Donovan [ 42 ] have pointed out, the force required to remove a particle from the wafer surface must equal or exceed the force of adhesion. They state that the force required to remove a particle is a function of particle size, particle and wafer surface composition, and the nature of the liquid medium [ 43 ]. For a silica par-ticle of 1 µ m diameter with a mass of 5 × 10 13 g that is adhered to a bareSi surface, the van der Waals force of adhesion in H 2 O is approximately4 × 10 4 dynes [ 44 ].

Megasonic cleaning is a subset of ultrasonic cleaning, where ultrasonic refers to sound waves at frequencies above the range of human hearing (greater than about 20 kHz). The megasonic range of frequency is the most commonly used for particle removal from semiconductor wafers, because lower frequency ultrasonic cleaning is known to lead to damage even to relatively large structures. Commercial megasonic wafer cleaning systems typically operate at a frequency of 700 kHz – 1 MHz.

Megasonic energy is transmitted through transducers, which are piezo-electric crystals. In batch immersion systems these are usually mounted at the bottom of the tank. When confi gured in this manner, the sonic waves travel through the liquid in a direction parallel to the wafer surface. Another example is the megasonic rod, used in some single-wafer systems, in which the piezoelectric crystal is mounted at the end of the rod and the energy transfer to the wafer perpendicular to the wafer surface [ 45 ].

A sonic wave is a pressure wave, inducing alternating periods of com-pression and rarefaction in a liquid. When the intrinsic “ tensile strength ” of the liquid is exceeded during the low pressure phase, the liquid pulls apart to form a cavity. Dissolved gas in the liquid diffuses into the cavity and, through a process known as rectifi ed diffusion, the cavity increases in size over a repeated cycles. This phenomenon, known as cavitation, leads to a host of interesting and useful effects. It is generally accepted that the


motion of cavities leads to particle removal via localized fl uid fl ows very close to the wafer surface (the boundary layer in megasonic cleaning being very thin relative to typical immersion systems) and formation of shock waves upon cavity collapse [ 46 ].

While megasonic cleaning has been used in the industry for many years, however, for recent technology generations problems with pattern damage have arisen. From approximately the 130 nm technology node, patterns (in particular polysilicon gate structures) have become small enough that they can be damaged in Megasonic cleaning. Controlling the uniformity of the energy distribution in the system is one of the keys to mitigating such damage.

Much work has been performed to minimize the damage to sensitive features on the wafer surface. Figure 4.2-5 shows an example of a dam-aged polySi line caused during the megasonic cleaning process, possibly due to cavitation. Both equipment modifi cations and process changes have been performed to achieve high particle removal effi ciency (PRE) with low physical damage to sensitive structures. Section 4.2.2.5 discusses methods for performing PRE testing. Megasonic cleaning is a very effective method for removing deep submicron-sized particles from Si wafers, particularly when used in conjunction with SC-1 solutions so that the physical mecha-nisms of megasonics are combined with the chemical mechanisms (surface undercutting and zeta potential repulsion) of SC-1. When SC-1 chemistry is used in lieu of H 2 O, along with megasonic energy, the particle removal effi ciency is substantially increased. In one study [ 47 ], SC-1 solutions were found to consistently produce high cleaning effi ciencies and relatively small variability between runs, while he lowest cleaning effi ciencies and largest variabilities were seen with DI H 2 O.

Christenson [ 48 ] and Vereecke [ 49 ] have reported on optimization of SC-1 megasonic processes for high particle removal effi ciency and

Figure 4.2-5 A damaged polySi line possibly due to cavitation caused by megasonic high energy [50]. Courtesy of FSI International.


low feature damage. Christenson has improved the confi guration of the mega sonic transducers in a batch immersion system to produce uniform particle removal effi ciency across the wafer, alleviating previous areas that had low PRE, and studied the addition of gases to the cleaning solution [ 50 ]. Vereecke [ 49 ] has also characterized the addition of various gases, such as O 2 and N 2 , into the SC-1 solution. Earlier work [ 51 ] has shown that dissolved gas, such as air, O 2 , H 2 , He, and Ar, in cleaning solutions has an effect on cleaning effi ciency. The addition of the O 2 and N 2 , dis-solved in SC-1 cleaning and H 2 O rinsing solutions indicates that the PRE increases [ 51 ].

The addition of megasonic energy to other cleaning solutions besides SC-1 and the H 2 O rinse has been proposed: for example megasonic energy was added to an HF solution [ 51 , 52 ] yielding high particle removal >80 % when H 2 or air was added to the solutions [51 ]. Syverson et al. [ 53 ] used SC-1 and SC-2 in megasonic tanks to remove particles from various types of wafers. They concluded that the application of megasonic energy in both solutions provided better results than spray processing. They found better cleaning effi ciencies when the wafers were moved slowly over the transducers at 150 W per transducer with a bath temperature of 70 ° C. In a related study, Gow et al. [ 54 ] used hot SC-1 solutions with and without megasonic energy to evaluate the cleanability of wafers exiting from dif-ferent processes. Figure 4.2-6 shows that particle removal effi ciency can

Figure 4.2-6 Particle removal effi ciency and a comparison to the damage of features at various megasonic frequencies. The wafer maps show increasing damage (lighter-colored die) and increasing particle removal effi ciency with increasing megasonic power [55]. Used with permission of Alexander Lippert.

MEG. POWER Setting [a.u.]

0%

10%

0 4 9 10 11 12 13 14

30%

60%

70%

> 100nm> 120nm> 160nm> 200nm

90%

100%

80%

50%

40%

20%Cle

anin

g E

ffici

ency

[%]


be quite good, >90 % when megasonic power is applied to the cleaning solution. However, damage to the sensitive lines may occur. Usually, high megasonic power leads to high PRE and the same time a high probablility of line damage [ 55 ]. Optimization of the megasonic process reduces dam-age: an example is given by Christenson [ 50 ].

Monitoring the emission of light from multiple bubbles as they col-lapse in the liquid is a method developed by Ferrell [ 56 ] for monitoring megasonic energy. The phenomenom of “ multibubble sonoluminescence ” (MBSL) is used to map the collapsed bubbles. This is especially useful for determining the uniformity of the process, and images of removed particles can be compared to the location of the collapsed bubbles to increase the effi ciency of megasonic cleaning.

In the long term, applicability of megasonic cleaning for future tech-nology nodes will depend on optimal process uniformity plus a deeper understanding of fundamental cavitation mechanisms to enable control of thresholds, bubble size distribution and bubble dynamics, and also the mechanisms of damage to patterns.

4.2.2.5 Particle removal monitoring

Particle removal effi ciency (PRE) is a measurement used for comparing cleaning processes with respect to a wafer with a large load of particles on the surface. The equation to calculate PRE is:

PRE = [ ( P p r e – P p o s t ) / P p r e ] × 1 0 0 % Eq. (4.2-2)

where P pre is the number of particles on the wafer prior to processing and P post is the number of particles on the wafer after processing. There is no industry standard for creating these particle monitors. Many different methods and particles, typically Si 3 N 4 , SiO 2 , or PSL are used. Chapter 8 discusses particle monitoring and methods to make monitor wafers with uniform particle distribution.

Typically, particles are spun on the wafer in a controlled manner or sprayed on the wafer with a nebulizer and then allowed to dry. Next, the wafers are analyzed for the number of particles on the wafer, P pre . The par-ticle level on the wafer should not exceed the maximum number of defects the inspection tool is able to recognize. Typically, the particles are about 8000 – 10,000 on a 300 mm wafer because higher pre-counts tend to mean the wafers are easier to clean (some particles may be agglomerated, loosely adhered, etc.) and this results in artifi cially high PRE. Chapter 8 discusses


the defect analysis tools used for the inspection process. The wafer is then processed using the cleaning and surface preparation method to be tested. Finally, the wafer is analyzed for the number of particles on the wafer after the process, P post , and PRE calculated. Figure 4.2-6 shows an example of particle removal effi ciency, also known as cleaning effi ciency.

4.2.3 Metal contamination removal

A useful approach to categorizing types of metal contamination, a criti-cal step in designing strategies for their removal, has been provided by Morinaga and Ohmi [ 57 ]. Chapter 2 discusses additional types of metallic contamination classifi cations. Type (I) is defi ned as electrochemical depo-sition, type (II) as hydroxide precipitation, and type (III) as fi lm inclusion. An example of the fi rst type would be metals of a higher electronegativity than Si (Cu is an often cited example) depositing via redox reactions onto bare Si in HF [ 57 ].

The second type of metal deposition can occur in SC-1 solutions. It should fi rst be pointed out, however, that SC-1 is capable of removing some contaminant metals. Aqueous ammonia will form complexes with Co + , Co 2+ , Cu 2+ , Fe 2+ , Ni, and Zn [5 ]. It has been reported that Ni and Zn contamination after APM are inversely proportional to the NH 4 OH con-centration [ 58 ]. Other metals, however, are known to be deposited from solution onto Si wafers. Metals in SC-1 can form metal hydroxides, which easily attach to silanol groups on chemically oxidized wafer surfaces; Fe, Al, Ni, and Zn form especially stable metal hydroxides [ 59 , 60 ]. Consequently, just 1ppb of Al in SC-1 solution can result in about 1.0 × 10 12 atoms/cm 2 deposited on an immersed wafer [ 61 ]. This is type (II) metal contamina-tion in the categorization of Morinaga and Ohmi. Type (III) can also occur in SC-1 when metals are embedded in the chemically grown oxide. Since these metals need to be controlled to <1.0 × 10 10 atoms/cm 2 , an additional cleaning step is needed to remove them.

The SC-2 solution, consisting of HCl (37 wt % ):H 2 O 2 (30 wt % ):DI H 2 O, is commonly employed just after SC-1 plus an intermediate rinse. A range of temperatures from near ambient to 70 ° C or more may be used. Hydro-chloric acid is effective because it increases the oxidation strength of the solution in addition to complexing transition metals such as Fe [5 ].

Hydrofl uoric acid is another logical reagent for metal removal since, in addition to its low pH, it etches oxide and can thus be effective for metals included in or under surface chemical oxides. IMEC researchers developed an alternative process to the RCA clean that uses dilute HF


after an oxidizing step to remove metal contamination very effectively [ 62 ]. However, care must be taken when using HF because some metals in the solution — most notoriously Cu — can readily deposit on the Si surface. IMEC extensively studied the behavior of metals in HF cleaning, including the effects of processing under illumination versus darkness [ 63 , 64 ]. They concluded that while electrochemical effects cause Cu to plate out onto Si when exposed to light, the addition of HCl to DHF is an effective counter-measure provided a suffi cient HCl concentration is used. At low concen-trations, added chloride ions actually increase Cu deposition by catalyzing the deposition reaction, while at high concentrations complexation of Cu ions by Cl - prevents deposition [ 62 ].

Adding H 2 O 2 to dilute HF has been proposed for Cu removal simultane-ously with oxide removal, although it also etches the Si surface slightly due to the combined presence of an etchant and oxidizer [ 57 , 65 , 66 ]. Finally, DI H 2 O/O 3 solutions have also been shown to be effective at removing certain metals such as Cu and Fe [ 67 ].

4.2.4 Cleaning process sequences

Although various modifi cations to temperatures and concentrations have been proposed, the classical SPM – DHF – SC-1 – SC-2 cleaning sequence, described in Section 4.1.1, remains the most commonly used sequence for pre-process cleaning steps prior to oxidation, annealing, and deposition. Alternatives have been used to some degree, the two most well known of these being developed independently by researchers at IMEC and at Tohoku University.

The IMEC cleaning sequence [ 62 ] was developed after extensive research to elucidate the mechanisms of the RCA clean, in an effort to provide a lower cost, less environmentally deleterious, and in some ways more effective cleaning sequence. The initial SPM step is replaced with H 2 SO 4 /O 3 or DI H 2 O/O 3 for organic contamination removal and chemi-cal oxide growth. Next, a DHF or DHF/HCl step is performed to remove metals and also particles by undercutting the chemical oxide, resulting in a hydrophobic surface. If a chemical oxide-passivated surface is preferred, an optional DI H 2 O/O 3 step can be included as a last step before drying, into which some HCl can be added to prevent metal deposition. IMEC researchers have reported excellent metal decontamination results, as well as reduced Si consumption, using this sequence [ 62 ].

A group under the leadership of Professor Tadahiro Ohmi at Tohoku Uni-versity developed another alternative cleaning sequence that is performed entirely at room temperature [ 65 ]. A DI H 2 O/O 3 solution (5 ppm) is fi rst


used to remove organic contamination as well as some metal contamination and creates a chemical oxide. Next an HF/H 2 O 2 /H 2 O solution, with an ionic surfactant and megasonic energy added, is introduced for removal of particles, metals, and the chemical oxide formed by the initial DI H 2 O/O 3 step. A DI H 2 O/O 3 rinse, also with megasonic energy, follows this chemi-cal step. The fi nal step is a 0.1 wt % DHF step and a DI H 2 O/megasonic rinse sequence [ 65 , 68 ].

SONY researchers proposed a sequence suitable for single-wafer processors, in which very short (only a few seconds) oxidizing and etching steps are alternated until the surface has been cleaned. The oxidizing is accomplished using DI H 2 O/O 3 and the etching is accomplished by 1 wt % DHF. Thus particles and metals can be removed in a short overall pro-cess time, without the need for megasonic energy, which can damage fi ne patterns [ 69 ].

4.3 Process Variables Affecting Cleaning

Wet cleaning and etching processes rely on chemical reactions that remove material and/or contaminants on the wafer surface. Such reactions are functions of time, temperature, and concentration. In considering the best process conditions there are many considerations to be balanced. These include tolerable amounts of removal of various materials on the wafer, surface morphology, cycle time and throughput, environmental effects, and cost. In general, once optimum process conditions have been established, it is desirable that they be maintained with maximum stability and control, so that every wafer is subjected to identical conditions.

4.3.1 Concentration and temperature effects

The original SC-1 clean was 1:1:5 (NH 4 OH:H 2 O 2 :H 2 O) at 70 – 80 ° C, con-ditions deemed suitable to the task at that time. With critical dimensions far larger than today’s, there was no concern about the amount of oxide etched by the solution, nor about Angstrom-level effects on surface mor-phology. And, indeed, for approximately 20 years there was no cause for such concern. Eventually it became clear, however, that concentrated SC-1 solutions at high temperature can cause microroughening of the Si surface (particularly, when used immediately after HF), and it was found that this could affect device performance [ 70 , 71 , 72 ]; Chapter 9 discusses Si surface morphology in detail. More dilute, lower temperature SC-1 solutions were


proposed, and various researchers showed that, especially with the introduc-tion of megasonic energy to enhance particle removal, such solutions could be at least as effective as the higher temperature, more concentrated solutions while mitigating the microroughening effect [ 70 , 73 , 74 ]. It was proposed that about 2.0 nm of substrate etching, in the presence of megasonic energy, was suffi cient to undercut and remove embedded particles, while the zeta potentials were not substantially altered by the relatively small change in pH moving from 1:1:5 SC-1 to considerably more dilute ratios [ 73 , 74 ]. In fact, more dilute solutions may be benefi cial since the “ thickness ” of the electric double layer, which is defi nes the distance of interaction between solid sur-faces in solution, is inversely proportional to the square root of the solution’s ionic strength [24 ]. Therefore, in more dilute solutions the repulsion at high pH acts over a longer distance in solution. Currently, SC-1 ratios about 10 times more dilute than the original RCA formulation are common.

The introduction of more dilute SC-1 solutions means the volume of H 2 O 2 and NH 4 OH used by semiconductor factories are signifi cantly reduced. Therefore, environmental and cost benefi ts also result. Subsequent in-depth study of the role of H 2 O 2 in SC-2 solutions revealed that concentrated solu-tions could be replaced by simple dilute solutions of HCl in H 2 O, [ 75 , 76 ], or at least by SC-2 solutions of signifi cantly lower concentration and temperature [ 74 ].

In high-temperature SC-2 solutions, the H 2 O 2 decomposes so quickly that the concentration of H 2 O 2 can decrease to near zero in as little as 30 minutes [ 75 ]. Conditions of about 1.2 × 10 3 M HCl at 50 ° C were rec-ommended by IMEC and Texas Instruments researchers [ 77 ]. Due to the volatility of the chemical components, SC-1 and SC-2 solutions are easily removed from wafer surfaces without leaving residues. However, as dis-cussed later, control of solution concentration becomes a challenge for the process engineer.

In terms of process control, the most critical aspect of SC-1 is that it will etch SiO 2 , and that it can consume Si at rates that depend on the rela-tive concentrations of NH 4 OH and H 2 O 2 . An alkaline solution will etch Si along the ⟨ 111⟩ crystal planes in the absence of a suffi cient amount of oxidizer, resulting in roughening of ⟨ 100⟩ surfaces [ 78 ]. The removal rate of Si is directly related to the concentration of OH – in the solution [ 79 ]. The reactions involved are [74 ]:

Si + 2 O H– + 2 OH– + H 2 O → SiO32– + 2H2 Eq. (4.3-3)

SiO 2 + 4 O H – → SiO44– 2 H 2 O ( s o l u b l e s i l i c a t e s ) Eq. (4.3-4)


As the ratio of NH 4 OH to H 2 O 2 increases, the OH – concentration will also increase. Care must be taken to avoid conditions in which excessive Si etching and roughening may occur [ 79 ]. It was found that the etch rate increases linearly with NH 4 OH concentration up to a point of saturation, after which it no longer increases as shown in Figure 4.3-7 . The maximum etch rate was inversely proportional to the H 2 O 2 concentration, suggesting that the H 2 O 2 created a passivating oxide [ 79 ].

4.3.2 Time and aging effects

For IC manufacturing, baths of concentrated chemicals are used and recirculated through particle fi lters for time periods, ranging from about 2 hours up to several days, depending on the chemistry and appli-cation. Various changes to the solutions can take place over this time, and these are of constant concern to the process engineer. Such changes include:

• “ Dragout ” of chemical solution, caused by the adhesion of the chemicals to the wafer surface with each batch of wafers processed, causing the bath volume to reduce over time, thus requiring replenishing of the chemicals.

• Different evaporation rates for different chemical constitu-ents causing relative concentrations to change over time. An example would be H 2 O evaporating faster than HF, causing a concentration increase over time.

Figure 4.3-7 Silicon etching rate as a function of the concentrations of NH4OH and H2O2 in and SC-1 solution [79]. Reprinted with permission from Japanese Journal of Applied Physics, Kobayashi, H., Ryuta, J., Shingyouji, T., and Shimanuki, Y., Vol. 32 Page L45 (1993).


0 µm

25 µm

50 µm

0 µm

25 µm

50 µm0 µm

44.96 nm

Figure 4.3-8 Atomic force microscopy plot of Si surfaces of a hydrophobic wafer after immersion in a 1:1:5 SC-1 solution that was contaminated with 3 ppb of Fe [78]. Reproduced by permission of ECS—The Electrochemical Society from Knotter, D. M., de Gendt, S., Mertens, P. W., and Heyns, M. M., J. Electrochem. Soc.

• Breakdown/decomposition of one or more chemical com-ponent, either naturally or by reaction with contaminants or etched fi lms. A classic example is SC-1, in which H 2 O 2 decomposes according to the following equation [ 80 ].

2H 2 O 2 ( a q ) → 2 H 2 O ( l ) + O2 ( g ) Eq. (4.3-5)

Metal contaminants in solution, especially Fe, have been found to catalyze the decomposition [ 81 ].

• Buildups of particulate, metallic, or organic contamination in the baths after many wafers have been processed.

• Unwanted precipitation, such as from surfactants or buffer-ing agents.

The case of SC-1 is of interest because of the relationship between bath conditions and Si surface etching and roughening, and subsequent effects on device performance as previously described. One model proposes that O 2 bubbles formed by H 2 O 2 decomposition stick to their surface and cause micromasking of the covered area, thus preventing etching of the under-lying fi lm by the solution, resulting in non-uniform etching and formation of small pillars [ 81 ]. Recently a more complex picture of the reaction mechanisms has been presented, including; metal (Fe) ion aggregates creating local H 2 O 2 depletion and galvanic corrosion due to noble metals deposited in the prior HF step [ 78 ], as shown in Figure 4.3-8 . In any case,


Figure 4.3-10 The decomposition rate of H2O2 in a 1:1:5 SC-1 bath as a function of Fe and Cu concentration (as well as their relative concentrations), indicating the higher dependence on Fe concentration, where R = 0 [83]. R is the ratio of the concentration of Fe to the total concentration of Fe and Cu. Used with permission of Ara Philiposian.

Figure 4.3-9 The decrease of NH4OH concentration under different temperature conditions in a SC-1 bath with an initial 1:1:5 ratio [82]. Reprinted with permission from Japanese Journal of Applied Physics, Takahashi, I., Kobayashi, H., Ryutha, J., Kishimoto, M., and Shingyouji, T., Vol. 32 Page L1183 (1993).

metal contaminants accelerate catalytically the decomposition of H 2 O 2 , as shown in Figures 4.3-9 and 4.3-10.

As a result of concentration variability over time, state-of-the art immer-sion systems often employ in-line chemical concentration monitoring sys-tems, and “ chemical spiking ” pumps to periodically refresh consumed chemical components of the bath. A further trend, consistent with the use


of increasingly dilute aqueous chemistries, is to use single-pass baths with-out recirculation, so that the bath will not be affected by chemical concen-tration and purity changes over time. Concentrated solutions such as BHF, H 3 PO 4 , SPM, and others, however, remain recirculated, due mainly to their high cost. A unique feature of hot phosphoric acid (H 3 PO 4 ) is that aging can actually be benefi cial because the buildup of etch products in solution improves the selectivity of Si 3 N 4 versus SiO 2 etching. However, depletion of the H 2 O in the 85 wt % H 3 PO 4 solution causes of decrease in the Si 3 N 4 removal rate.

4.3.3 Effects of sequence

The most common cleaning sequence for pre-thermal processing is outlined in Section 4.1.1 . The variation with the most profound effect is to process HF as the last step before rinsing and drying. Such “ HF last ” processing results in a hydrophobic or non-wetting, H-terminated Si surface [ 84 ] as opposed to the hydrophilic or readily-wetted chemical oxide (OH-terminated) surface associated with the standard cleaning sequence, without the HF-last process. Common HF last applications include:

• Surface preparation before epitaxial Si or SiGe growth. • Cleaning and surface preparation before polysilicon deposi-

tion (to enable Si – Si contact) for DRAM capacitors. • Cleaning and surface preparation before metal (e.g . , Co, Ni)

sputtering to form metal silicides. • Cleaning of etched contacts before contact liner deposition.

Such applications are very sensitive to small amounts of chemical or native oxide. Therefore, not only is HF last cleaning required, but also often the lag time between the cleaning step and the subsequent process must be limited in order to avoid native oxide regrowth.

An alternative and optional RCA sequence is reversing the SC-1 and DHF steps; the sequence of the last three steps is SC-1 – DHF – SC-2, resulting in an interesting effect. Although the process is not HF last, chemical oxide thickness as measured by an ellipsometer is closer to the value measured after HF last than to the amount grown by SC-1. Since HF-last should have no chemical oxide, the “ fi lm ” that is being measured is discussed in Chapter 9. The overall electri cal oxide thickness of integrated gate oxide stacks is also similar for HF last and HF + SC-2 last, whereas for SC-1 + SC-2 last it is on average 0.05 – 0.1 nm thicker [ 17 ].


4.3.4 Deionized water quality

Because H 2 O is used in every aqueous cleaning process, the impact of H 2 O quality on defect levels is considerable. Contaminants are removed from the H 2 O prior to use in the cleaning process. Bacteria growth in ultrapure DI H 2 O (UPW) must be avoided; ultraviolet (UV) irradiation, ozonation, and fi ltration are methods used to kill and remove the bacteria. The sequence of UV light use, ozonation, and fi ltration can also affect the fi nal particle count [ 85 , 86 ]. The UV light breaks bacteria into smaller fragments, which manifest themselves asparticles. One bacterium can generate several fragments. Shadman et al. [ 85 ] showed that the TOC (total organic carbon) level dropped more dramatically when the membrane fi lter was placed before the UV unit. The fi lter removes particles, larger than a certain size, while the remaining organic particles are oxidized and broken down in the UV unit. In the reverse sequence, where the H 2 O is exposed to the UV unit fi rst, the smaller fragments that are generated are more diffi cult to remove in the fi lter, thus resulting in a higher TOC level as shown in Figure 4.3-11 . In spite of some of these research observations, most semiconductor factories still favor the use of a fi nal fi lter before pump-ing H 2 O into the fab.

Particles are found in the DI H 2 O supply. New 300-mm IC manufactur-ing facilities are striving to achieve concentrations of <0.2 particles/mL for particles ≤ 0.05 µ m in DI H 2 O [ 87 ]. Studies have been performed to

Figure 4.3-11 The effect on TOC of sequencing UV with a charged membrane fi lter; 15.2L/min [85]. Copyright 1990 by IEST. Used by permission. Reprinted with permission from 1990 IES Proceedings, published by IEST. www.iest.org (847) 981-0100. From: Shadman, F., Governal, R., and Bonner, A., “Interactions between UV and Membrane Filters During Removal of Bacteria and TOC from DI Water,” Proceedings of Institute of Environmental Sciences, Annual Technical Meeting, Arlington Heights, IL: IEST, p. 221 (1990).


determine how particles in the DI H 2 O supply adhere to the wafers. Riley and Carbonell [25 ] show that the number of added particles does not nec-essarily increase with immersion time; however, the number of particles added to a hydrophilic wafer depends on the zeta potentials of the particles and wafers, and their ease of wetting in H 2 O. In all cases, the number of particles added to a hydrophilic Si wafer surface increased with particle concentration in H 2 O.

To achieve the goal of a low particle density in DI H 2 O, multiple pass fi ltration is performed using coarse and fi ne fi lters, with continuous or periodic ozonation and UV light to break down bacteria. The fi nal fi lter in the fi nishing loop is usually a charged membrane fi lter. Manufactur-ing facilities use large quantities of DI H 2 O, principally in wafer cleaning tools, varying from <40 to >200 L/minute.

Many particles in DI H 2 O are colloidal species that are usually negatively charged, especially colloidal silica and lipopolysaccharides [ 88 ]. The use of a positively charged modifi ed membrane fi lter aids in removing these negatively charged particles. Because the nature of particle capture is related to the attraction of colloidal particles of charge opposite to that of the mem-brane medium (often termed “ electrokinetic adsorption ” ), these fi lters are very effi cient at removing particles much smaller than the pore size of the membrane. Companies such as Cuno and Pall Corporation manufacture these charge-modifi ed fi lters.

Research at the University of Arizona has shown some interesting prop-erties of charge-modifi ed fi lters. Jan et al. [ 88 ] have extensively character-ized the electrokinetic properties of these fi lters and found discrepancies between the claims of suppliers and the actual performance. Jan et al. measured the zeta potential, surface charge density, and saturation capac-ity of two different charge modifi ed Nylon ® membrane fi lters. They found that suppliers were claiming particle fi ltration at pH values of H 2 O ranging from 3 to 10, while their results showed that these fi lters became nega-tively charged (and hence ineffective) at pH values below 7.6. The wider the pH range in which the zeta potential is positive, the more effi cient is the fi lter; nonetheless, these charged fi lters have been shown in fi eld use to be very effi cient in small particle removal from H 2 O.

4.4. Rinsing and Drying

Although a great deal of engineering goes into removal of particulate, metallic, and organic contaminants without deleterious effects on wafer materials and structures, the overall cleaning process is only as effective as


the last steps — rinsing and drying. If these steps are not well engineered, all gains made in the chemical cleaning process can be lost. Rinsing between chemical steps is relatively straightforward; quench and remove the bulk chemical. Most critical, however, are the fi nal rinsing and drying steps.

4.4.1 Evaluation of rinsing performance The purpose of rinsing is to remove chemicals and replace them with

DI H 2 O so that no chemical residues will remain on the wafer. Between chemical steps, this prevents unwanted reactions such as the formation of ammonium chloride (NH 4 Cl) that can occur in the absence of suffi cient rinsing between SC-1 and SC-2 steps. Typically, in the fi nal rinsing step before drying, an in-line resistivity measurement is used to ensure that chemical has been suffi ciently replaced by H 2 O.

Because of the large amounts of H 2 O used, as much as 2.0 × 10 7 gal or more per month for a fully operating wafer fab [ 89 ], rinsing is an environ-mental and cost issue as well as one of process performance. It is desirable to optimize the rinsing process so that the amount of H 2 O used is minimized, and the effectiveness of its use maximized. Since resistivity measurements are taken typically where the bulk rinse H 2 O is going to drain, they do not necessarily represent what is occurring at the wafer surface. Mass spectros-copy techniques are useful for detecting light elements on wafer surfaces after rinsing, such as F that might remain after HF processing [ 91 ].

The fi nal rinsing process poses different challenges depending on whether the wafers are hydrophobic (after HF) or hydrophilic (after oxi-dizing chemistries). In the former case, if it is desired that the Si surface remains H-terminated, often O 2 is removed from the rinse H 2 O to prevent reoxidation of the Si. Also, in this case the highly active Si – H surface can easily attract contaminant particles, so rinse cleanliness and fl ow pattern are important. Finally, hot H 2 O should never be used for rinsing Si after HF, since it will roughen the bare Si surface by accelerating the Si etch rate due to the higher temperature [ 90 ].

The use of O 3 /H 2 O also allows formation of a thin native oxide layer, a chemical oxide, which passivates the wafer surface, thus preventing subse-quent contaminant deposition [ 91 ]. If a passivated chemical oxide, SiO x , sur-face is preferred after HF cleaning, it is necessary to inject O 3 into the rinse H 2 O to readily form this clean chemical oxide. Several suppliers now offer an ozonized rinse as a part of their wafer cleaning equipment. In the case of the hydrophilic surface, which is most common since sequences typically end with SC-1 and SC-2, care must be taken to avoid adsorption of certain metal


contaminants from fi nal rinse H 2 O. At near neutral pH, certain periodic table column II alkaline earth metals, such as Ca and Mg, which are particularly detrimental to gate oxide integrity (GOI), can be easily deposited on oxidized Si [ 92, 93 ]. It has been proposed that a competitive adsorption mechanism leads to certain metal cations depositing when the concentration of H + cations is insuffi cient. Therefore, lowering the pH by addition of some HCl or HNO 3 to the H 2 O, for example, mitigates the metal adsorption [ 92 , 93 ].

At the end of a rinsing operation, a hydrophilic wafer exiting the rinse tank carries with it a thin fi lm of H 2 O of about 20 µ m in thickness. The bound-ary layer thickness during wafer pullout, on the other hand, is around 2500 µ m [ 94 ]. This implies that the carryover fi lm is entirely within the boundary layer. Transport of residual ions or particles is slower within the boundary layer than in the bulk rinsing medium. When the boundary layer is much larger than the carryover thickness, there will be ionic and particulate species that are not rinsed off the wafer surface even after a long rinsing period.

Routine correlation of particle counts in the DI H 2 O with overall H 2 O quality is useful in determining the cause of particle fl uctuations. Chapter 8 discusses methods for monitoring particles in H 2 O and in chemicals. For HF-etched wafers, variations in the TOC level in the rinse tank can cause major changes in the number of particles added.

4.4.2 Drying methods and processors

Major categories of drying methods are as follows:

1. Spin drying, both bath and single wafer 2. IPA vapor drying 3. IPA surface tension gradient drying 4. Slow pull N 2 drying 5. Vacuum-assisted drying

4. 4.2.1 Spin drying

The earliest means of drying wafers was by simply spinning them in a centrifuge, at rates of 800 – 1000 rpm or more. This is still practiced in some cases, for both batch and single-wafer confi gurations, although other methods have been introduced that provide better performance espe-cially for more critical applications (such as HF last). Disadvantages of spin-drying include particle generation due to the mechanical motion and


fl ow dynamics. Additionally, depending on the machine design a centrifugal rinse may result in the generation of micrometer- and sub-micrometer-size H 2 O droplets, which may not be effectively removed in the dry cycle. In batch spin systems a dry-only mode adds less particles and watermarks than a combined rinse-and-dry. As a general practice, it is recommended that the rinsing process be accomplished in the rinse tank, and not the spin dryer. An effi cient dryer in the dry-only mode can add less than 1 particle (<0.2 µ m) onto a 150-mm diameter wafer. Spin-drying in an environment purged by dry hot N 2 can mitigate other dryer-generated defects, such as watermarks after HF processing.

For batch spin – spray processors or single-wafer spin tools, the dry-ing is done in situ after the chemical processing step and rinsing. For wet benches, a separate module is used. The key challenge is to perform the process, which necessarily involves moving parts, without particle gen-eration. This is particularly diffi cult with large batches of large (300 mm) wafers. Additionally, in such a batch of spinning wafers the breaking of one wafer (due, for example, to a pre-existing stress crack) can contaminate the entire batch.

4.4.2.2 Isopropyl alcohol vapor drying

Another method of drying uses a cloud of isopropyl alcohol (IPA), which, due to its low surface tension, displaces water when it con-denses on the wafer surface. Additionally, the high vapor pressure of IPA enables it to readily evaporate, leaving dry wafers. Drawbacks of such dryers that may use large amounts of IPA include the necessity of special fi re safety measures, and concerns about organic residue that might remain after drying. Figure 4.4-12 shows a schematic of a typical batch IPA vapor dryer.

IPA vapor dryers were introduced to achieve watermark- and particle-free wafer drying. In IPA dryers, rinsed wafers are exposed to IPA vapors, either by direct displacement using condensed IPA (the vapor dryer) or by surface tension. These dryers have fewer moving parts and tend to have fewer particle problems than centrifugal spin dryers. However, these dry-ers are much slower than the spin dryers and use large amounts of a liquid with a low fl ash point; for IPA it is about 13 ° C for 80 – 100 wt % . Ohmiet al. [ 95 ] reported that the H 2 O content in the IPA, the IPA heating system, and the IPA vapor velocity are major variables affecting the performance of a vapor dryer.


4.4.2.3 Drying by surface tension gradient effects

An effective drying technique that uses smaller amounts of IPA relies on the so-called Marangoni effect. Specifi cally, if a gradient of surface tension exists in a liquid there will be a fl ow from the higher to the lower surface tension region. This explains why high alcohol content drinks such as brandy can be observed to seemingly crawl up the inside of a glass in opposition to gravity. In wafer drying, an IPA vapor is introduced into a chamber above a DI H 2 O bath in which the wafers are immersed. The IPA (low surface tension) diffuses into the H 2 O (high surface ten-sion) at the surface, so there is a gradient of surface tension between the surface (having a lower surface tension due to the IPA) and the bulk H 2 O below (having a higher surface tension). As the wafers are pulled slowly upward through the interface, H 2 O is pulled away from the surface by the Marangoni effect [ 96 , 97 ]. This method offers advantages that have led to its wide use. First, it uses less IPA volume than IPA vapor method,

Figure 4.4-12 Schematic of IPA vapor dryer.


which makes its cost lower and its safety requirements less stringent. Second, it can be carried out at much lower temperatures. Because H 2 O is physically removed, it is easier to avoid watermark defects. Addition-ally, this approach is claimed to remove particles from the wafer surface more effectively than is possible with IPA vapor dryers [ 98 ].

Surface tension drying referred to as “Marangoni drying,” was developed by researchers at Phillips Research Laboratories [99] and further explained in reference [95, 100]. As the wafers are removed from the rinse tank at speeds of 1 – 2 mm/second, the air/H 2 O/Si interface is exposed to the vapors of an H 2 O-soluble organic liquid, typically IPA. This IPA is absorbed into the H 2 O at the interface, and the IPA/H 2 O interface induces a surface tension gradient within the curvature of the interface, causing the H 2 O meniscus to contract. This effect allows the H 2 O to sheet off a smooth hydrophilic wafer surface (Figure 4.4-13 ) . The technique leaves a hydrophilic Si wafer surface drier than a spin drying operation, as measured by the amount of H 2 O evaporated from the surface after the completion of the drying operation. Other potential liq-uids that have low surface tension and form volatile vapors such as diacetone alcohol and 1-methoxy-2-propanol [ 101 ] have been found to be potentially suitable for Marangoni drying, but in practice these are not used.

4.4.2.4 Defects related to rinsing and drying

Watermarks

Historically, mixed hydrophilic and hydrophobic patterns after HF last processing have presented the greatest challenge for drying. A type of defect called watermarks, water spots, or drying stains has become well

Figure 4.4-13 Schematic of IPA surface tension gradient dryer. Courtesy of FSI International.


known in the industry [ 102 – 106 ]. Examples of watermarks are shown in Figure 4.4-14 . The mechanism of formation of this defect involves Si oxi-dation, dissolution of the formed oxide, and the dynamics of the drying. The oxidation occurs due to dissolved O 2 either in the H 2 O or diffusing into the H 2 O during rinsing. Subsequently the oxide is dissolved into the H 2 O according to the overall sequence [ 104 ]:

Si + O 2 → S i O2 Eq. (4.4-6)

SiO 2 + H2 O → Η2 S i O 3 Eq. (4.4-7)

H2 S i O 3 → H+ + HSiO3- Eq. (4.4-8)

As the wafer is dried, the dissolved residue can precipitate to form defects containing Si and O. One way this can happen is if evaporation of the H 2 O fi lm or H 2 O droplets occurs, since solid material will not evaporate. Therefore the H 2 O must be completely removed. Mixed hydrophobic and hydrophilic areas are particularly sensitive, most likely because while the H 2 O is normally pulled away from the hydrophobic areas instantly, the hydrophilic areas can trap it. So, with intricate patterns the H 2 O can be trapped in contact with bare Si, and the above reactions occur. Because such watermark defects tend to kill an entire chip when they occur, avoiding them is a critical concern for the process engineer. IPA based drying techniques have become favored over spin-drying for sensitive applications. In general, strategies for mitigating watermarks include:

Figure 4.4-14 Examples of watermarks on a dried wafer.


• Performing the HF step in the same chamber where rinsing and drying will occur, to avoid transfers through air between HF rinse and dry steps.

• Eliminating O 2 from the rinse H 2 O. • Eliminating O 2 from the ambient in the dryer (e.g., by N 2

purging). • Using IPA-based drying instead of spin-drying. • Avoiding deposition of H 2 O droplets (e.g . , splashing) on

dried portions of the wafer. • Avoiding evaporation of the H 2 O at the transfer steps or when

the wafer is idle.

Recently a different type of drying defect was identifi ed that has simi-larities to watermarks but is formed by a somewhat different mechanism. In cases where the HF step is performed in the same chamber with rinsing and drying, a watermark-like defect with a much higher density of silica/silicate residue can form if HF vapor is not adequately removed from the chamber prior to rinsing and drying. In conjunction with the oxidation and etching mechanism described above, the HF accelerates the etching portion, leading to a thicker residue containing F [ 107 ]. It was also found that heavily doped polySi is more sensitive than undoped Si for forming this type of defect [ 108 ].

4.5 Aqueous Cleaning Equipment

Commercially available aqueous-based cleaning, rinsing, and drying equipment used for the manufacturing of IC devices is discussed in this section. Many types of equipment exist to carry out these processes.

The choice of material for the construction for cleaning equipment is important: the material must stand up to the constant exposure of chemi-cals and H 2 O, and must not degas, shed particles, corrode, or decompose during the life of the tool. Components and subassemblies must also be able to withstand constant chemical exposure. Piping for DI H 2 O must be free of additives or contaminants that can elute into the fl uid and must be compatible with oxidizing chemicals such as H 2 O 2 , O 3 , and hot H 2 O [90 ]. Examples of material used for aqueous processing equipment and compo-nents are perfl uoroalkoxy (PFA), polytetrafl uoroethylene (PTFE), and oxy-1,4-phenylene-oxy-1,4-phenylene-carbonyl-1,4-phenylene, also known as polyetheretherketone (PEEK). Polyvinylchloride (PVC) has been shown to shed particles as is rarely used for aqueous tool components. PEEK is the material that is recommended for DI H 2 O transport systems because


of its smooth surface properties, lower leaching potential, and tempera-ture insensitivity; however, it is very expensive. Stainless steel and other metal components must be avoided; stainless steel has the potential to add metallic contaminants into the H 2 O stream.

4.5.1 Immersion wet benches

Batch wet-chemical cleaning systems are either immersion-based, or spin/spray-based. Immersion wet stations consist of one or more chemi-cal baths, rinse tanks, and a dryer. A wafer cassette is fi rst immersed in the chemical bath for a specifi ed length of time and then transported to the rinse tank. High-productivity 300 mm immersion tank systems are fully automated with robotic transfer of the cassette of wafers from the 300 mm FOUP (front opening unifi ed pod) to the carrier used to process the wafers through the immersion system. In some cases, the robot may hold the wafers throughout the entire process with a specially designed arm ( “ cassette-less ” ) or the robot may transfer the wafers to specially designed cassettes that minimize the touch points on the wafer surface, thus minimizing shielding of the wafer surface, the volume of chemical displaced by the cassette, and the amount of chemical carried over to the rinse tank. Materials used for the carrier must be compatible with all chemicals used in the wet bench. Commercially available automated immersion wet benches are sold by Dainippon Screen, Tokyo Electron Limited, Akrion, and other companies. An example of a commercially available system is shown in Figure 4.5-15 .

Immersion baths can reuse the chemical solutions for several batches of wafers. Using the same chemical for a long time leads to a build-up of contamination with time [ 109 ]. Recirculation with point-of-use fi ltration is essential to keep the particle level in the bath to an acceptable level. From a particle control viewpoint, the time allowed for recirculation, fi l-tration between wafer loads, and at the start of a fresh batch of chemicals is very important. If adequate time is not allowed for the particle level in the bath to decrease by fi ltration, gradual build-up of particles will rapidly cause the bath to be ineffective. Section 4.5.7.2 will discuss aspects of point-of-use fi ltration.

The chemical batch immersion process can be repeated for each chemi-cal, such as the complete RCA sequence in separate tanks with rinses being performed in separate tanks in the wet bench and drying performed in an another vessel in the wet bench. Immersion systems also have been designed to serially process the RCA sequence, including the intermediate rinses and


surface tension gradient (STG) drying in the same processing tank. Many commercial confi gurations are available, and most companies will custom design an immersion tank system to a specifi c cleaning sequence used for manufacturing.

Chemical solutions that use H 2 O 2 decompose rapidly; hence, they need to be replenished with fresh H 2 O 2 before a new batch of wafers is pro-cessed. Typical bath life for SC-1 or SC-2 mixtures operating at tempera-tures from 50 to 80 ° C is few hours before replenishment is needed [82 ]. Thus, chemical usage costs can be very high, and even higher for immersion wet tank systems that use fresh chemical with every bath [ 109 ].

Megasonic capability is available in most immersion batch systems and is typically used in combination with SC-1 cleaning. A single-wa-fer immersion-cleaning module using megasonic transducers has been introduced to the IC industry for FEOL critical cleaning processes [ 110 ]. This module uses multiple chemistries in the same immersion tank and has an integrated surface tension gradient dryer.

4.5.2 Centrifugal spin/spray batch system

In a spin/spray processor, a cassette of wafers is placed in a bowl arranged around a central pole and then rotated on a shaft at a certain speed while chemical solutions are sprayed on the wafers. After the chemical spray is

Figure 4.5-15 A commercially available batch immersion system manufactured by DNS. Used with permission from Dainippon Screen.


stopped, the wafers are rinsed with a DI H 2 O spray, and then spun dry in an N 2 environment. A commercially available spin/spray acid processor is depicted in Figure 4.5-16 ; FSI International, Semitool, and others make spin/spray processors. Figure 4.5-17 shows a schematic of the spin/spray system process chamber.

Spray processors typically use fresh chemicals for every batch, thus pro-viding pure chemicals for cleaning. Cassettes of wafers rotate past a spray post, dependent on the system and wafer size, which dispenses a fi ne mist of chemicals. Rinsing and drying are conducted in the same chamber. Industry use of batch spray processors has declined in recent years, mainly due to the diffi culty of achieving very low defect densities while spinning batches of large (300 mm) wafers. Particle generation can occur from nozzles, seals, etc., and watermarks can form due to inadequate drying of the wafer, as discussed in Section 4.4.2.4.

4.5.3 Brush scrubbing

Brush scrubbers are commonly used in many wafer and IC manufac-turing cleaning processes, such as Si wafer lapping and polishing and post-CMP cleaning. Particles are hydrodynamically dislodged from the surface with a rotating brush made of a sponge-like hydrophilic material (e.g., Nylon ® or poly-vinyl alcohol (PVA)), while H 2 O (with a surfac-tant such as Triton X-100 ® ), dilute SC-1, or a semi-aqueous solvent is sprayed on the wafer. The hydrophilic brush ensures that a cushioning fi lm of scrubbing solution always remains between the wafer and the

Figure 4.5-16 A commercially available spin/spray processing system manufactured by FSI. Courtesy of FSI International.


brush bristles. This is important because the contact of the bristles with the wafer surface could cause scratching and other damage. Brush scrub-bers can clean one side (single sided) or both sides (double sided) of a wafer surface.

Chemical mechanical polishing (CMP) is carried out at several points during the manufacture of a device wafer to provide a smooth, fl at surface for subsequent lithographic operations and the dual damascene Cu fi ll process or the W plug fi ll. Typically it involves the polishing of a thick layer by using slurry containing colloidal particles. After the polish, the particles from the slurry that have deposited on the wafer surface can be removed by brush scrubbing. Additionally, non-slurry particles are also removed; such as the particles generated from wear caused by the polishing action on the components of the CMP tool. As brushes wear with use, however, they tend to shower the wafer with brush fragments and particles collected from prior cleaning operations.

Figure 4.5-17 Schematic of a spin/spray processing system manufactured by FSI International. Courtesy of FSI International.


Brush scrubbers are particularly effective when large amounts of parti-cles are deposited on the wafer surface. Brush cleaning relies on the pores of the sponge to collect and hold the particles until they are intentionally removed. Unloading the brush of the slurry particles is important to avoid scratching of the surface due to agglomerated particle clusters. A poorly adjusted scrubber can do a signifi cant amount of damage. A major disad-vantage of these scrubbers is that they do not work well with patterned wafers. The brushes that are several millimeters in diameter ride over a micrometer feature on a wafer, missing debris lodged between features or causing pattern damage. A typical post-CMP cleaning system includes two brush boxes and a megasonic-cleaning module.

4.5.4 Single-wafer chemical processors

Single-wafer cleaning equipment was initially used at specialized processing steps such as backside and bevel cleaning. However, success-ful introduction of a single-wafer BEOL cleaning system by SEZ has proliferated the use of these tools. Single-wafer systems are now used for multiple applications; BEOL polymer and residue removal and back surface metallic removal after metal deposition processes are the most ubiquitous. However, systems designed for critical cleaning and FEOL photoresist stripping processes are available. Single-wafer processes have been promoted for their uniformity and process control due to the indi-vidual processing of each wafer. Most single-wafer processing modules have side-specifi c cleaning; the ability to isolate and clean only one side of the wafer or in some cases to process the two sides with different chemical solutions. Cross-contamination that can occur in batch immersion systems, such as particles migrating from the backside of a wafer to the front side of the adjacent wafer, or from edge onto front side, can be avoided by the use of single-wafer spin tools.

The materials used for single-wafer processing equipment are similar to those required for batch spin spray systems. Additionally, the spinning process, which thins the boundary layer, can be performed in combination with megasonic cleaning. Multiple chemical solutions can be run and the dryer can be integrated on the same module. Isopropyl alcohol dry-ing, including STG type [ 111 ], is available for watermark-free drying. To match throughputs of a batch spin spray or immersion system, multiple processing modules must be placed on one platform, resulting in a tool that may contain from 4 to 12 modules. All these modules must perform repeatably with respect to the other modules on the platform.


Commercially available automated single-wafer wet processors are sold by SEZ, Semitool, Akrion, and other companies. An example of a commercially available system is shown in Figure 4.5-18 .

4.5.5 Rinsing processors

Many types of rinsing and drying equipment exist for IC manufacturing. The rinsing equipment can be divided into three types:

1. Dump rinsing (wet benches) 2. Overfl ow rinsing (wet benches) 3. Spin/spray rinsing (batch spray tools, single-wafer tools,

and occasionally wet benches)

Typically the rinse process uses ambient temperature low-resistivity DI H 2 O of about 13 – 18 M Ω -cm. The wafers are rinsed until the outgoing H 2 O from the tank or the spin/spray station is at the same resistivity as the incoming H 2 O.

4.5.5.1 Dump rinsing

After steps using concentrated chemicals, a very commonly used rinse tank mode in an immersion wet bench is the quick dump with or

Figure 4.5-18 A commercially available single-wafer spin/spray processing system manufactured by the SEZ Group. Used with permission from SEZ.


without a top spray. Wafers are exposed to a spray of ambient tempera-ture DI H 2 O, which fi lls the rinse tank, or are initially immersed into an already-fi lled tank. When the tank is full, the H 2 O is dumped from a valve at the bottom. This cycle is repeated several times. The advan-tage of this confi guration is that it removes chemicals from the wafer surface very rapidly, periodically dumping the H 2 O, which contains the chemicals. Chemicals such as SPM and H 3 PO 4 , diffi cult to remove due to their high viscosity, are often rinsed off using quick dump tanks. This method is very good for rapidly removing the chemical off the wafer surface and is used in many commercial immersion wet processors. One drawback, however, is that these rinses consume a large amount of water. Additionally, spray nozzles tend to generate particles and grow bacteria. Also, quick dump rinse (QDR) tanks generally produce turbulent convective currents in the H 2 O, which increase particle mobility to the wafer surface. Hence, the QDR is a poor choice from a particle control point of view, but a very good choice for rapidly removing chemicals. Figure 4.5-19 shows results from a QDR using numerous rinse cycles after SPM processing to minimize the amount of S residue left on the wafer surface [47 ].

Figure 4.5-19 Results from a QDR using numerous rinse cycles after SPM processing. Conductivity decrease after each rinse cycle to a steady-state value after approximately the fi fth rinse cycle [47]. Reprinted from Chiarello, R.P., Parker, R., Helms, C.R., Chen, W., Tang, S., and Cook, L.J., “Optimization of Post Sulfuric Acid/Hydrogen Peroxide Dump Rinsing Process,” Material Research Society Symposium Proceedings, Science and Technology for Semiconductor Surface Preparations, Vol. 477, Pittsburg, PA, (1997) page 533. Used with permission.


4.5.5.2 Overfl ow rinsing

Overfl ow rinsing is a common method of performing both the initial rinse after chemical processing and the fi nal rinse before drying in an immersion-wet bench. Wafers are exposed to a steady fl ow of H 2 O rising from the bot-tom of the rinse tank to the top and then overfl owing, which accomplishes the rinse. The term, “cascade rinsing” is also used. There are no sprays used. However, the viscous chemicals are not effectively removed from the wafer surface in a cold cascade overfl ow rinse. Therefore overfl ow rinsing is most com monly used after more diluted chemical steps such as SC-1, SC-2, and DHF. This method tends to add fewer particles to the wafer than the QDR.

4.5.5.3 Spin/spray rinsing

Spin/spray rinsing is performed in the centrifugal spin/spray chemical processor immediately after chemical processing step without moving the wafers to another station or tank. Immediately after the chemical process-ing is complete, DI H 2 O is sprayed on the wafer to remove the chemicals. The wafers continue to spin during the spray rinsing process, effectively removing the chemical. Since a spin dryer contains moving parts, spray nozzles, and various kinds of gaskets and seals that can be sources of par-ticles, these must be replaced periodically.

Historically, spin fi nal rinsing and drying was often performed in immer-sion wet benches. In recent years, however, this has become rare due to poor defect performance (particles and watermarks). In particular, con-ducting a centrifugal rinse in the same module as the dryer results in the generation of micrometer- and sub-micrometer-size H 2 O droplets, which may not be effectively removed in the dry cycle. A dry-only mode is by far a lower particle adder than a rinse-and-dry mode. If a spin dryer is used, it is recommended that the rinsing process be accomplished in the rinse tank, and not the spin dryer.

Particle control in the rinse tank becomes especially critical for wet etch processes using HF chemistry. Hydrophobic wafers exiting the HF bath and entering the rinse tank are very susceptible to particle deposition. Menon et al. compared various rinse tank confi gurations for the effec-tiveness of cleaning etched hydrophobic wafers [42 ], as shown in Figure 4.5-20 . Quick dump rinse tanks performed poorly with respect to particle addition during processing, while rinse tanks with megasonic transducers performed well. Major sources of particulate contamination during wet-chemical cleaning are often in the rinse tank and spin dryer, and not in the chemical bath. Careful selection of rinse tank and dryer confi gura-tion is therefore critical.


4.5.6 Advantages and disadvantages of cleaning equipment

One of the limitations of cleaning by immersion is the required liquid volume, and therefore the cost of chemicals, which increases signifi cantly with the wafer diameter. Single-wafer tools that dispense chemicals through a nozzle on a rotating wafer surface consume much less chemicals and offer the additional fl exibility of different front and back surface treatments. Addition-ally, the chemical fl ow can be better controlled through a dispensing nozzle.

Single-wafer processors have minimal touch points on the wafer surface that are shielded from chemical exposure as compared to batch process-ing tools. Multiple touch points and closely spaced wafers and the fi xtures used to hold the wafers can have detrimental impact on the uniformity of processing across the wafer and a batch of wafers. With optimization, both single-wafer systems and batch systems can have very good uniformity. Care must be taken to avoid contamination between batch immersion tanks; transfer of contaminants from one wafer to another in the same batch, which can occur in wet bench tanks, is avoided in single-wafer systems. Complete rinsing of the chemical between batch tank processing is essential. The chemicals are usually used multiple times for immersion batch processing, and usually only once with spin spray processors (though re-circulating, multiple use systems are available). Using a chemical only one time avoids accumulation of contaminants in the chemical.

Figure 4.5-20 Effects of rinse tank confi guration on particle contamination on etched wafers (particle sizes 0.2–0.5 µm; initial particle count <1.2/cm2) [42]. Reprinted from Microcontamination Magazine. Copyright 1989, Tom Cheyney, Los Angeles, CA. Used with permission.


The use of spin processing in single-wafer tools enables high fl ow veloc-ity close to the wafer, which allows faster diffusion of the impurities away from the surface of the wafer [ 112 ]. This has proven to be particularly effective for polymer removal processes.

4.5.7 Auxiliary equipment

4.5.7.1 Chemical distribution system

Chemical distribution systems consist of pumps, chemical storage tanks, and piping that are required to automatically dispense chemicals to the process equipment. These systems improve safety and reliability, eliminate the need to bring chemical containers and bottles into the cleanroom, incorporate multiple pre-fi ltering stations to reduce particles, and reduce the variability associated with manual operation [ 113 ]. The chemical compatibility and cleanliness of storage drum and piping mate-rials, the fi ltration scheme, and the particle generation characteristics of pumps and valves are important aspects in providing a low contamination levels at the point-of-use.

Integrated circuit production for 90-nm node technologies require chem-icals with particle levels of less than ~200 particles/mL of size greater than 0.2 µ m. While chemical suppliers are working towards such levels of particulate contaminants in incoming chemicals, the purity at the point-of-use depends entirely on the fi ltration scheme in the chemical distribution system and at the re-circulating process tank. Many manufacturers includ-ing BOC, Celerity, Kinetics, and many regional companies sell chemical distribution systems, also called chemical management systems. Figure 4.5-21 depicts a schematic diagram of a typical bulk chemical distribu-tion system [33 ], where the actual systems are compact and are remotely located from the process equipment. The chemical drums, storage tanks, pumps, and fi lter banks are usually located in an area isolated from the main cleanroom. Chemicals are pumped from the source drum into storage tanks, often called “ day ” tanks, which may or may not have a N 2 blanket above the liquid surface. From the storage tanks, the chemical is continu-ously re-circulated through a bank of fi lters up to the point of connection to the process tools. Fluid fl ow within the distribution system is accom-plished either with a pump or pressurized N 2 gas. On demand, the chemi-cal solution is drawn from the central recirculation loop to fi ll a process tank. When the process tools do not need fresh chemicals, the chemicals are being continuously circulated through the fi lters and the storage tank. Some facilities prefer to have a local recirculation loop that keeps chemi-


cals moving through the storage tank and the fi lter bank. Automatic sys-tems for spiking of chemical to replenish the bath while processing are commercially available. Depletion of the H 2 O 2 , especially in SPM baths, but also in SC-1 and SC-2 baths can be remedied by continuous replenish-ment of chemicals to prevent the cleaning ability from diminishing.

Filters capable of effi ciently removing particles of sizes less than 0.1 µ m are commercially available, however, there are compatibility issues that must be carefully examined before selecting a fi lter for a specifi c process. Fluorocarbon resins such as PFA (polyfl uoralkoxy), PVDF, and PTFE are generally compatible with most inorganic acids and alkalis [ 114 ], according to a compatibility chart of fi lter materials with commonly used chemicals [ 115 ]. Often, the membrane of a fi lter is compatible with the chemical being fi ltered, but the cartridge material, fi lter housing, or the O-ring is not. This can result in change in material composition, leading to gas permeation, polymer degradation, particle shedding, and overall loss of chemical quality. Gotlinsky warns that the material compatibility issues sometimes leads to the selection of Tefl on ® as the material of choice for all fi lters, while lower cost alternatives may be available [ 116 ]. Hence, a sys-tematic program for selection, maintenance and replacement of fi lters is essential to successfully control particles in a wet-chemical process tank.

For H 2 SO 4 , H 2 O 2 , NH 4 OH, and HCl, 6 – 10 minutes of operation in a recycle mode is suffi cient to bring the counts well below those observed in bottled chemicals. The particle concentrations at 0.3 µ m are typically 2 – 5 times that at 0.5 µ m. Gruver et al. [ 117 ] reports the performance of another chemical distribution system for all key chemicals, the fi nal particle count

Figure 4.5-21 Schematic diagram of a typical bulk chemical distribution system [33]. Reprinted from Microcontamination Magazine. Copyright 1990, Tom Cheyney, Los Angeles, CA. Used with permission.


at the point-of-use should be below 0.50 particles/mL. On an average, the chemical distribution system with its fi lters can provide a 100 – 500-fold decrease in particle levels. This reduction does not include any point-of-use fi ltration. Rosenfeld et al. [ 118 ] published results of another distribu-tion system. Their results indicate a 35 – 300-fold decrease in particle levels from the drum to the point-of-use, depending on the chemical composition and type of fi lters being used.

When designing a chemical distribution system, it is worthwhile to include sample ports at various points in the system to extract chemicals that can be analyzed for particles. Sample ports are recommended after the drum, the pumping unit, the storage tank, and at the point of connection to the process equipment. Also, building in some redundancy in pumping capability is useful as usage demands change, or if one pump is in repair.

4. 5.7.2 Point-of-use fi ltration

State-of-the-art fabs generally prefer to do all their DI H 2 O fi ltration at a central purifi cation facility, and not at the point-of-use. Point-of-use H 2 O fi lters are breeding grounds for bacteria because of the low volumetric fl ow rate of H 2 O through each fi lter. Also, since most fi lters are not com-patible with O 3 , they cannot be used with O 3 /H 2 O.

Wafer cleaning processes that are conducted in an immersion tank or spray processor accommodate point-of-use recirculation fi lters. Recircula-tion tanks, with continuous fi ltration using advanced polymeric material, are available for processes that are conducted at operating conditions rang-ing from room temperature to as high as 180 ° C. Nisso Engineering and Process Technologies Inc. are two of the companies that offer recirculation systems for SPM baths that are maintained at 120 – 130 ° C, and for 85 % H 3 PO 4 maintained at 180 ° C. Process Technologies also offers a system for heating solvents and semi-aqueous solvents.

As with fi lters for chemical distribution systems, it is important to select a point-of-use fi lter that is compatible with the chemical being fi ltered. Compatibility charts are available from most fi lter manufactur-ers. Unlike DI H 2 O fi lters, bacterial growth has not been a problem with chemical fi lters. Before a fi lter is installed, it is a good idea to consider the following:

1. Is the fi lter chemically compatible? 2. Does the fi lter need pre-wetting before it can be exposed to

the chemical?


3. What are the ionic components are extractable from the fi lter, and will they detrimentally impact the wafers?

4. Will the fi lter handle the viscosity of the chemical without clogging and creating a high-pressure drop, which may ruin the pumps?

5. How often does the fi lter have to be replaced?

Once a point-of-use fi lter is installed, it will shed particles for a short period of time. Also, particle levels in a chemical do not decrease instanta-neously after a recirculation pump has started to run the chemicals through the fi lter. Figure 4.5-22 illustrates the effects of various fl ow rates on the removal of particles from re-circulating acid etch immersion tanks [ 116 ]. As the recirculation fl ow rate increased, the particle removal effi ciency also increased. This fi gure illustrates that the particle level can drop from 100 to 0.40 particles/mL in 4 minutes at a recirculation rate of 53 L/minute. For viscous materials, including some buffered HF solutions [119 ], it may take more than 1hr for the particle level to attain its lowest steady state value. When chemicals are supplied manually in bottles to such a re-circulating tank, it is necessary to provide adequate time for particle levels to stabilize.

Methods for controlling particles in chemicals by fi ltration and chemical recirculation have greatly improved year after year. Particle levels in incom-ing liquids and at the point-of-use show that a 500-fold decrease in particle levels can be achieved through optimization of chemical delivery systems.

4.6 Current and Future Challenges

In recent years the pace of change in semiconductor manufacturing technology has accelerated dramatically. The historical model in which continued lithographic scaling defi ned the industry’s remarkable produc-tivity growth has given way to a new era in which increasingly radical changes in materials and device structures are required in order to maintain the pace. Jettisoning materials that have serviced the industry for decades in favor of as yet little characterized new materials is now seen not merely as a source of research topics but a necessity for production of new device generations. The International Technology Roadmap for Semiconductors (ITRS) [ 120 ] is a useful guide to these changes.

Wafer cleaning has always needed to advance to meet the requirements of scaling. Demand for fewer particles, metals, and organic contaminants has historically driven requirements for cleaner chemicals, water, and gases, plus stricter attention to equipment design and materials, as well as decreased human proximity to the wafers in the IC manufacturing areas. However, while those demands still persist, the more pressing challenges


are resulting from new materials and device structures. Going forward, the wafer cleaning processes need to be more effective in removing contami-nants to lower levels and these processes also must be more selective with-out any harmful effects to the structures and the fi nal device performance. Accordingly, wafer cleaning issues can no longer be viewed in isolation, but need to be considered as part of the overall process integration.

4.6.1 Front end of line

4. 6.1.1 Logic technology

In general, the most urgent requirements in the logic technology road-map depend on the type of product. For high-end microprocessors, transistor speed (i.e., drive current) is of utmost importance. For low-power devices

Figure 4.5-22 Particle removal versus recirculation time in an acid batch immersion tank [116]. Used with permission from Microelectronics Manufacturing and Testing.


used in mobile phones and other portable electronic products, minimizing leakage current is imperative. In general, the requirements for greater speed and lower leakage must be pursued simultaneously. The latter requirement leads to the need for a higher dielectric constant (high- k ) material to replace SiO 2 or SiON as the gate dielectric, since further scaling of the materials leads to intolerable leakage by direct tunneling of electrons [ 121 ]. While evaluations to date have encompassed a wide assortment of dielectrics, current leading candidates for implementation are HF-based materials, primarily HfSiO, HfSiON, and HfO 2 [ 122 ]. Based on leakage requirements, low-power devices are expected to see the earliest implementation of such materials, although integration and carrier mobility issues have already delayed their use relative to past roadmap predictions [ 120 ].

A further complication originates from the polySi gate electrode material, which faces serious limitations due to carrier depletion; thus increasing the effective electrical thickness of the dielectric and the boron penetration from p+ electrodes, requiring a match of the electrode work function with the high- k dielectric. Therefore, new metal gate materials are being investigated.

Challenges for aqueous cleaning processes related to high- k and metal gate stacks include the following:

• Control of the chemical oxide thickness formed by the aque-ous surface preparation step prior to dielectric formation, since the electrical thickness targets for the gate dielectric have become small enough to make the chemical oxides formed by traditional RCA cleans a signifi cant contributor.

• Removal of the remaining high- k dielectric fi lms after etch-ing the gate stack. For SiO 2 gates a simple DHF step could be used. Some of the proposed high- k dielectrics, however, are diffi cult to etch with suffi cient selectivity to SiO 2 (so as to avoid excessive consumption of the isolation regions). HFO 2 represents a particularly diffi cult case [ 121 , 122 ].

• Removal of high- k dielectric fi lms from the back surface of the wafers after deposition, since the remaining material on the back surface can cross-contaminate other FEOL process systems with metal contamination.

• Particle and residue removing chemistries that are compat-ible with the chosen metal gate material(s).

Solving these problems will likely require implementation of new chemi-cal mixtures.

The most urgent challenge currently facing aqueous post-process clean-ing steps in FEOL logic is cleaning with minimal Si/SiO 2 consumption


and without damage to gate patterns. After ion implantation with a photo-resist mask, a sequence of plasma strip + SPM + SC-1 is typically used to remove the photoresist. This combination leads to

1. Consumption of Si due to the combination of oxidation and etching

2. Potential damage to narrow (<1 nm) polySi gate lines from the megasonic energy used for particle removal.

Silicon consumption, historically, was not a problem, but the number of implantation steps after gate formation has increased as the doping profi les have become shallower; therefore, more Si is consumed while less con-sumption is desirable. Of course, SC-1 can be processed at reduced con-centration, temperature, and/or time to minimize the consumption, but this can compromise particle removal effi ciency, which is affected by reducing or eliminating the use of megasonic processing due to pattern damage. Optimization and the development of non-damaging cleaning with megas-onic energy or jet spray is being carried out by many research groups.

4.6.1.2 Memory technology

DRAM technology currently uses either stack capacitors or trench capacitors, both of which are increasingly high in aspect ratio and pres-ent challenges for cleaning and surface preparation. Stack capacitors in the presence of liquids can collapse due to the surface tension forces, thus making rinsing and drying diffi cult. Trench capacitors are becom-ing more diffi cult to penetrate with liquids for effective etching, contami-nant removal, rinsing, and drying, as the feature size is reduced. When Si is exposed inside deep trenches, it can be particularly vulnerable to watermark formation.

Flash memory technology has seen rapid growth in recent years, and now represents a signifi cant portion of overall fab capacity. Scaling of critical dimensions in fl ash technology has become more aggressive than even DRAM, requiring very strict defect densities. Therefore, fl ash factories will rely more and more on state-of-the-art cleaning technology.

4.6.2 Back end of line

The logic back end of line is no less challenging. Logic chips have many more levels of metal than memory devices, so that the defect den-sity requirements for any particular level become stricter. Wiring dimen-


sions are shrinking horizontally at the same time (in 65-nm technology the minimum linewidth for the fi rst metal level is only about 90 nm). Additionally, as in the front end, new materials are presenting challenges.

4.6.2.1 Copper dual damascene interconnects

Copper dual damascene wiring, with lower resistivity than Al, is now fully mainstream and will remain the interconnect metal for foresee-able technology nodes. One method for controlling the cleaning pro-cess with the Cu dual damascene devices is to move from wet benches to spray tools or single-wafer cleaning systems. Single-wafer cleaning has been gaining acceptance in the back end of the line process espe-cially for 300 mm wafers at nodes less than 130 nm. Batch processing in wet benches with the traditional and semi-aqueous F chemistries can be diffi cult because of the possible attack of the metal during post-metal cleaning. Rinsing effi ciency in batch immersion processing is limited by diffusion, such that the residence time of F at the wafer surface is diffi cult to control in comparison with faster rinsing single-wafer spin processes. Thus, corrosion can be more diffi cult to avoid in batch immersion systems.

The challenge for any new chemical formulation for <130-nm technol-ogy is to be able to affectively clean structures in a very short period and to be quickly quenched when the cleaning process is complete. Many IC cleaning recipes for single-wafer spin spray tools call for a maximum of 2 minutes cleaning cycles, including the H 2 O rinse and drying steps. This is one of the reasons that aggressive formulations have been developed for the single-wafer technology, to enable fast process times and high throughputs with excellent cleaning results.

4. 6.2.2 Low- k interconnect dielectrics

Lowering of the dielectric constant ( k ) value, used in IC manufacturing to reduce the capacitance between Cu lines, is projected to lead to introduc-tion of porosity in the fi lms to achieve dielectric constants at values of 2.5 or less. Low- k dielectric fi lms, such as carbon-doped oxide (CDO), behave in fundamentally different ways with respect to cleaning than the traditional SiO x -based dielectrics. One example is that the as-deposited CDO fi lms are hydrophobic instead of hydrophilic, as would be a deposited SiO x fi lm. Another difference of CDO fi lms, especially porous fi lms containing CH 3 - groups and SiO x fi lms, is the dry stripping processes developed to remove


C-based resists. This may also affect the dielectrics by the depletion of C, especially near the exposed surface [ 123 ]. The SiO x fi lm, depleted of C, is then easily attacked by F-based chemistries, which cause an increase in the lateral dimension of the line or via. Furthermore, the C depletion changes the surface character of the low- k fi lm surface from hydrophobic to hydrophilic, such that moisture is absorbed into the fi lm near the surface (H 2 O k ≈ 80). As a result, the k value can increase signifi cantly. This is an integra-tion issue in which the etching, stripping, and cleaning sequence must be optimized so that resist and etch residues can be removed with no remaining residue and with minimal effect on k value and critical dimensions. Chapter 6 discusses the plasma processing steps and their effect on the k value.

4.6.3 Manufacturing concerns

4.6.3.1 Cost

The manufacture of semiconductor chips is expensive. Any company undertaking IC manufacturing must fi rst rigorously measure, and then constantly seek to minimize, its manufacturing costs. Thus, the engineer fi nds himself or herself spending a lot of time and effort on cost issues in addition to the technical challenges of process performance and yield.

It has become common to predict and track costs in detail on a unit process level. The Cost of Ownership (CoO) model, fi rst developed for the industry by SEMATECH, is a useful tool when comparisons of dif-ferent process options are needed, since the sources of cost and the trade-offs between various options can be complex. The most common decision required is choosing between one cleaning tool over another. The cost per wafer pass through a tool is a function of fi xed cost (such as purchase price of the tool), variable cost (such as consumables, chemicals, and labor), yield loss, throughput (wafers/hour) capability, and the percent of time the tool is actually processing wafers. Thus a trade-off might be, for example, between one tool with higher throughput and another with lower consum-ables (e.g., chemicals, water, and gases) cost plus a lower price. Cost mod-eling provides a quantitative comparison [ 124 ].

4.6.3.2 Environment, safety, and health

In any industrial environment strict attention must be paid to issues of Environment, Safety, and Health (ESH). Semiconductor manufacturing systems employ hazardous chemicals, high levels of electrical energy, and automation that is capable of causing serious injury.


In the area of wet cleaning, chemical and H 2 O consumption are the ESH areas that have historically received the most attention. Efforts have been made to reduce concentrations and volumes of chemicals used, which has the combined benefi t of reducing risk of exposure to personnel and effects of disposal. Of course, cost benefi ts can simultaneously be realized. The industry sets ESH goals and guidelines that are outlined in the Interna-tional Technology Roadmap for Semiconductors [ 120 ]. To date, H 2 O use reduction through rinse optimization and energy use reduction through exhaust optimization have been among the focal points.

4. 7 Summary

For many years there have been predictions of aqueous cleaning being replaced by gas phase or other dry cleaning methods. In reality the number of wet processing steps has continued to increase and in particular aqueous processes are even more common since very dilute H 2 O-based chemistries present both ESH and cost benefi ts. Also, it is generally true in semicon-ductor manufacturing that existing methods will be extended as long as possible since so much has been invested in them. As we have shown, aqueous cleaning offers unique advantages for removing a wide range of particulate, metallic, and organic contaminants in a robust manner that can still be selective to critical materials on the wafer.

Cleaning processes were once regarded as relatively simple in compari-son with other areas of manufacturing. And while lithography, for example, understandably continues to garner more attention, cleaning is recognized more and more as a critical process category that needs to be well char-acterized and engineered in order for a technology to succeed. In the last 10 – 15 years, researchers in industry, universities, and labs have worked to elucidate the mechanisms of aqueous and other cleaning processes, pro-ducing a tremendous number of publications and improved understanding. Furthermore, attention is given to cleaning at earlier stages in the tech-nology development cycle, especially in light of the new materials being introduced on wafers. Cleaning is being viewed more in an integration context as opposed to a set of isolated processes, especially with regard to removing contaminants selective to new materials and structures on the wafer. This trend can be expected to continue.

Finally, environmental, health, and safety issues will remain of great concern. These also need to be addressed as early as possible in the devel-opment cycle, though in the past this has not always occurred. It has been frequently demonstrated, contrary to some perceptions that addressing


ESH necessitates compromises with cost and/or process results, the pro-cesses engineered from the beginning with ESH in mind can also provide the best performance at the lowest cost.

Acknowledgments

Excepts from the fi rst edition are used and are credited to Venu B. Menon, Robert P. Donovan, Don C. Burkman, Donald Deal, Donald C. Grant, and Charlie A. Peterson .

References

1. Kern, W., and Puotinen, D. A., RCA Review, 31(6):187 (1970). 2. Kern, W., RCA Review, 31(6):207 (1970). 3. Kern, W., First International Symposium on Cleaning Technology in

Semiconductor Device Manufacturing, 90-9:3 (Ruzyllo, J., and Novak, R. E., eds.), The Electrochemical Society, Pennington, NJ, (1990).

4. Orvek, K. J., and Huffman C., Nucl. Instr. and Methods in Phys. Res., B7/8:501 (1985).

5. Kern, F. W., and Gale, G. W., Handbook of Semiconductor Manufacturing Technology (Nishi, Y., and Doering, R. eds.), p. 87, Marcel Dekker, NY, USA (2000).

6. Leon, E., U.S. Patent 3,338,756 (August 29, 1967). 7. Jacob, A., U.S. Patent 3,930,913 (January 6, 1976). 8. Small, R., Lee, S., Finson, E., and Maloney, D., MICRO, 20(4):33 (2002). 9. Kirk, S., and Small, R., Solid State Phenomena, 76–77:307 (2001). 10. Garza, C. M., Byers, J. D., Flanagin, L., and Hanratty, M., Handbook of

Semiconductor Manufacturing Technology (Nishi, Y., and Doering, R., eds.), p. 499, Marcel Dekker, NY, (2000).

11. Clews, P. J., Nelson, G. C., Matlock, C. A., Resnick, P. J., Adkins, C. L. J., and Korbe, N. C., Fourth International Symposium on Cleaning Technology in Semiconductor Device Manufacturing (Novak, R. E., and Ruzyllo, J., eds.), 95-20:66, The Electrochemical Society, Pennington, NJ, (1995).

12. Hall, R. M., Rosato, J. J., Lindquist, P. G., Jarvis, T., Parry, T., Kelly, J. D., and Walters, R. N., Semiconductor Pure Water and Chemicals Conference (SPWCC), p. 101, Santa Clara, CA, (1995).

13. Syverson, W., Fleming, M., and Schubring, P., Fourth International Sym-posium on Cleaning Technology in Semiconductor Device Manufacturing (Novak, R. E., and Ruzyllo, J., eds.), 95-20:60, Electrochemical Society, Pennington, NJ, (1995).

14. Morita, M., Ultra Clean Processing of Silicon Wafers (Hattori, T., ed.),p. 543, Springer-Verlag, Berlin (1995).

15. Grundner, M., and Jacob, H., Applied Physics A, Solids and Surfaces, 39:73, (1986).


16. Iler, R. K., The Chemistry of Silica, p. 10, John Wiley & Sons, NY, (1986). 17. Guan, J., Gale, G., Bersuker, G., Jeon, Y., Nguyen, B., Barnett, J., Jackson,

M., Burkman, D., Peavey, P., Yokomizo, K., Ueno, K., Yamasaka, M., Imai, M., Kitahara, S., and Shindo, N., Sixth International Symposium on Cleaning Technology in Semiconductor Device Manufacturing (Hattori, T., Novak, R. E., and Ruzyllo, J., eds.), 99-36:77, The Electrochemical Society, Pennington, NJ, (1999).

18. Okorn-Schmidt, H., IBM J. Res. Dev., 43(3):351 (1999). 19. Mazzei, L. A., Meyer, R. M., and Bollyky, L. J., Proceedings, International

Ozone Association, Pan American Group Annual Conference, (1995). 20. Matthews, R., U.S. Patent 5,776,296 (July 7, 1998). 21. De Gendt, S., Wauters, J., and Heyns, M., Solid State Technology, 41:57 (1998). 22. De Gendt, S., Snee, P., Cornelissen, I., Lux, R., Vos, R., Mertens, P. W.,

Knotter, D. M., Meuris, M. M., and Heyns, M., Solid State Phenomena,65-6:165 (1999).

23. Abe, H., Iwamoto, H., Toshima, T., Iino, T., Gale, G. W., IEEE Trans. Semi. Manuf., 16(3):401 (2003).

24. Hiemenz, P. C., Rajagopalan, R., Principles of Colloids and Surface Chemistry, Marcel Dekker, NY, (1997).

25. Riley, D. J., and Carbonell, R. G., J. Colloid and Interface Science, 158:259 (1993).

26. Vos, R., Lux, M., Xu, K., Fyen, W., Kenens, C., Conard, T., Mertens, P., Heyns, M., Hatcher, Z., and Hoffman, M., J. Electrochem. Soc., 148(12)G683 (2001).

27. Menon, V. B., Michaels, L. D., Clayton, A. C., and Donovan, R. P., Solid State Technology, 32(10):S29 (1989).

28. Riley, D., and Carbonell, R., Proceedings of The Institute of Environmental Sciences, Annual Technical Meeting, p. 224, Mount Prospect, IL, (1990).

29. Milner, T. A., and Brown, T. M., Proceedings of Microcontamination 86 Conference and Exposition, p. 146, San Jose, CA, (1986).

30. Dillenbeck, K., Particle Control for Semiconductor Manufacturing (Dono-van, R. P. ed.), p. 405, Marcel Dekker, NY, (1990).

31. Kikuyama, H., Miki, N., Takano, J., and Ohmi, T., Microcontamination, 7(4):25 (1989).

32. Menon, V. B., Michaels, L. D., Clayton, A. C., and Donovan, R. P., Proceed-ings of the Institute of Environmental Sciences, Annual Technical Meeting, p. 320, Mount Prospect, IL, (1989).

33. Menon, V., and Donovan, R. P., Microcontamination, 8(11):29 (1990). 34. Handbook of Chemistry and Physics, 86th edition, F23-F29, CRC Press,

Boca Raton, FL, (2005–2006). 35. Kern, W., Semiconductor International, 7(4):94 (1984). 36. Niida, T., Chemical Engineering Institute of Japan, p. 14, Kansai Branch,

Osaka, Japan (1989). 37. Mishima, H., Yasui, T., Mizuniwa, T., Abe, M., and Ohmi, T., IEEE Trans-

actions on Semiconductor Manufacturing, 2(3):69 (1989). 38. Ohmi, T., Ultra Clean Wafer Processing Presentation to SEMATECH,

Austin, TX, (October 11, 1991). 39. Meuris, M., Heyns, M., and Philipossian, A., Extended Abstracts, The Elec-


trochemical Society Fall Meeting, 91-2:775, The Electrochemical Society, Pennington, NJ, (1991).

40. Tardif, F., Lardin, T., Paillet, C., Joly, J. P., Fleury, A., Patruno, P., Levy, D., and Baria, K., Fourth International Symposium on Cleaning Technology in Semiconductor Device Manufacturing (Novak, R. E., and Ruzyllo, J., eds.), 95-20:49, The Electrochemical Society, Pennington, NJ, (1995).

41. Schwartzman, S., Mayer, A., and Kern, W., RCA Review, 46:81 (1985). 42. Menon, V. B., and Donovan, R. P., Extended Abstracts, The Electrochemical

Society Fall Meeting, 89-2:89, The Electrochemical Society, Pennington, NJ, (1989).

43. Menon, V. B., Clayton, A. C., and Donovan, R. P., Microcontamination, 7(6):31 (1989).

44. Ranade, M. B., Aerosol Science and Technology, 7:161 (1987). 45. Wu, Y., Frankin, C., Bran, M., and Fraser, B., Sixth International Symposium

on Cleaning Technology in Semiconductor Device Manufacturing (Hattori, T., Novak, R. E., and Ruzyllo, J., eds.), 99-36:360, The Electrochemical Society, Pennington, NJ, (1999).

46. Brennen, C. E., Cavitation and Bubble Dynamics, Oxford University Press, Oxford, UK (1995).

47. Chiarello, R. P., Parker, R., Helms, C. R., Chen, W, Tang, S., and Cook, L. J., Symposium Proceedings, Science and Technology for Semiconductor Surface Preparations (Higashi, G., Hirose, M., Raghavan, S., and Verhaverbeke, S., eds.), 477:533 Materials Research Society, Pittsburgh, PA, (1997).

48. Christenson, K., Sematech Wafer Cleaning and Surface Preparation Confer-ence, Section 12, Austin, TX, (2005)

49. Vereecke, G., Holsteyns, F., Arnauts, S., Becks, A., Jaenen, P., Kenis, K., Lismont, M., Lux, M., Vos, R., Snow, J., and Mertens, P. W., Solid State Phenomena, 103-104:141 (2005).

50. Christenson, K., Sematech Surface Preparation and Cleaning Conference, Section 03, Austin, TX, (2004)

51. Kanetaka, H., Kujime, T., Yazaki, H., Kezuka, T., and Ohmi, T., Solid State Phenomena, 65-66:43 (1999).

52. Kujime, T., Nishiyama, Y., and Ohmi, T., Semiconductor Pure Water and Chemical Conference, UPW and Chemical Proceeding (SPWCC), p. 245, Santa Clara, CA, (1996).

53. Syverson, W. A., Fleming M. J., and Schubring, P. J., Extended Abstracts, The Electrochemical Society Fall Meeting, 91-2:751, The Electrochemical Society, Pennington, NJ, (1991).

54. Gow, C. J., Smith, R. E., Syverson, W. A., Kunesh, R. F., Buker, E. D., Albaugh, K. B., and Whittingham, L. S., Extended Abstracts, The Electrochemical Society Fall Meeting, 91-2:820 The Electrochemical Society, Pennington, NJ, (1991).

55. Lippert, A., Engessar, P., Ferrell, G., Klitzke, J., Köffl er, M., Kumnig, F., Leberzammer, J., Obweger, R., Pfeuffer, A., Sax, H., and Okorn-Schmidt, H., Solid State Phenomena, 103–104:155 (2005).

56. Ferrell, G. W., and Crum, L.A., J. Acoust. Soc. Am., 112(3 Pt 1):1196 (2002).

57. Morinaga, H., and Ohmi, T., Fourth International Symposium on Cleaning


Technology in Semiconductor Device Manufacturing (Novak, R. E. and Ruzyllo, J., eds.) 95-20:257, The Electrochemical Society, Pennington, NJ, (1995).

58. Mertens, P. W., Loewenstein, L. M., Vos, R., De Gendt, S., Bearda, T., and Heyns, M. M., Silicon Materials Science and Technology (Huff, H. R., Tsuya, H., and Gosele, U., eds.), 98-1:592, The Electrochemical Society, Pennington, NJ, (1998).

59. Mori, Y., Uemura, K., Shimanoe, K., and Sakon, T., J. Electrochem. Soc., 142:3104 (1995).

60. Gale, G. W., Rath, D. L., Cooper, E. I., Estes, S., Okorn-Schmidt, H. F., Brigante, J., Jagannathan, R., Settembre, G., and Adams, E., J. Electrochem. Soc., 148(9):G513 (2001).

61. Morita, E., Wafer Cleaning Procedures and Problems of Semiconductor Manufacturer (Kikuchi, M., Hattori, T., Hirayama, M., Yamamoto, S., and Yoshimi, T., eds.), p. 61, Science Forum, Tokyo (1995).

62. Heyns, M. M., Bearda, T., Cornelissen, I., De Gendt, S., Degraeve, R., Groeseneken, G., Kenens, C., Knotter, D. M., Loewenstein, L. M., Mertens, P. W., Mertens, S., Meuris, M., Nigam, T., Schaekers, M., Teerlinck, I., Vandervorst, W., Vos, R., Wolke, K., IBM J. Res. Dev., 43(3):339 (1999).

63. Teerlinck, I., Schmidt, H. F., Rotondaro, A. L. P., Hurd, T. Q., Mouche, L., Mertens, P. W., Meuris, M., Heyns, M. M., Vanhaeren, D., and Vandervorst, W., Fourth International Symposium on Cleaning Technology in Semiconductor Device Manufacturing (Novak, R. E., and Ruzyllo, J., eds.), 95-20:284, The Electrochemical Society, Pennington, NJ, (1995).

64. Teerlinck, I., Mertens, P. W., Vos, R., Meuris, M., and Heyns, M. M., Third International Symposium on Ultra Clean Processing of Silicon Surfaces (Heyns, M., Meuris, M., and Mertens, P., eds.), Acco, Leuven, Belgium p. 21 (1994).

65. Ohmi, T., Proceedings, Fourth International Symposium on Cleaning Technology in Semiconductor Device Manufacturing (Novak, R. E., and Ruzyllo, J., eds.) 95-20:1, The Electrochemical Society, Pennington, NJ, (1995).

66. Choi, B., and Jeon, H., J. Korean Phys. Soc., 33(5):579 (1998). 67. Pipia, F., Bellandi, E., Crivelli, B., and Alessandri, M., Solid State

Phenomena, 65-66:109 (1999). 68. Ohmi, T., J. Electrochem. Soc., 143(9):2957 (1996). 69. Osaka, T., Okamoto, A., Kuniyasu, H., and Hattori, T., Seventh International

Symposium on Cleaning Technology in Semiconductor Device Manufacturing (Ruzyllo, J., Hattori, T., Opila, R. L., and Novak, R. E., eds.), 2001-26:3, The Electrochemical Society, Pennington, NJ, (2001).

70. Ohmi, T., Miyashita, M., and Imaoka, T., Proceedings, Microcontamination ’91, San Jose, CA, October 16–18, p. 491 (1991).

71. Meuris, M., Heyns, M., Verhaverbeke, S., Mertens, P., and Philipossian, A., Proceedings, Microcontamination ’91, San Jose, CA, October 16–18, p. 658 (1991).

72. Ohmi, T., Miyashita, M., Itano, M., Imaoka, T., and Kawanabe, I., IEEE Trans. Electron Devices, 39:537 (1992).

73. Cohen, S. L., Syverson, W., Basiliere, S., Fleming, M., Furman, B., Gow, C., Pope, K., Tsai, R., and Liehr, M., Second International Symposium on


Ultra Clean Processing of Silicon Surfaces, (Heyns, M., Meuris, M., and Mertens, P., eds.), Acco, Leuven, Belgium, p. 35 (1994).

74. Ouimet, G., Rath, D. L., Cohen, S. L., Fisch, E., and Gale, G. W., Semiconductor Fabtech, 5th Edition, Henley Media Group, p. 305 (1996).

75. Hurd, T. Q., Mertens, P. W., Schmidt, H. F., Ditter, D., Hall, L. M., Meuris, M., and Heyns, M. M., Proceedings, Institute of Environmental Sciences 40th Annual Technical Meeting, p. 218, Mount Prospect, IL, (1994).

76. O’Brien, S., Hurd, T. Q., and Tipton, C., Proceedings, Institute of Environmental Sciences 41st Annual Technical Meeting, p. 435, Mount Pros-pect, IL, (1995).

77. Hurd, T. Q., Mertens, P. W., Hall, L. H., and Heyns, M. M., Second International Symposium on Ultra Clean Processing of Silicon Surfaces, (Heyns, M., Meuris, M., and Mertens, P., eds.), Acco, Leuven, Belgium, p. 41 (1994).

78. Knotter, D. M., de Gendt, S., Mertens, P. W., and Heyns, M. M., J. Electrochem. Soc., 147(2):736 (2000).

79. Kobayashi, H., Ryuta, J., Shingyouji, T., and Shimanuki, Y., Jpn. J. Appl. Phys., 32:L45 (1993).

80. Mertens, P. W., Meuris, M., Schmidt, H. F., Verhaverbeke, S., Heyns, M. M., Carr, P., Graf, D., Schnegg, A., Kubota, M., Dillenbeck, K., and deBlank, R., Crystalline Defects and Contamination: Their Impact and Control in Device Manufacturing (Kolbesen, B. O., Stallhofer, P., Claeys, C., andTardif, F., eds.), 93–15:87 ESSDERC 93, Grenoble, France, The Electrochemical Society, Pennington, NJ, (1993).

81. Schmidt, H. F., Meuris, M., Mertens, P. W., Rotondaro, A. L. P., Heyns,M. M., Hurd, T. Q., and Hatcher, Z., Jpn. J. Appl. Phys., 34:727 (1995).

82. Takahashi, I., Kobayashi, H., Ryuta, J., Kishimoto, M., and Shingyouji, T., Jpn. J. Appl. Phys., 32:L1183 (1993).

83. Philipossian, A., and Wilkinson, R., Second International Symposium on Ultra Clean Processing of Silicon Surfaces, (Heyns, M., Meuris, M., and Mertens, P., eds.), Acco, Leuven, Belgium, p. 99 (1994).

84. Kasi, S., Liehr, M., Appl. Phys. Lett., 57(20):2095 (1990). 85. Shadman, F., Governal, R., and Bonner, A., Proceedings of Institute of Envi-

ronmental Sciences, Annual Technical Meeting, p. 221, Mount Prospect, IL, (1990).

86. Governal, R., Bonner, A., and Shadman, F., Proceedings of the Institute of Environmental Sciences, Annual Technical Meeting, p. 791, Mount Pros-pect, IL, (1991).

87. Terrell, E., Semiconductor Pure Water and Chemicals Conference (SPWCC) UPW Track, p. 91, Santa Clara, CA, (2005).

88. Jan, D., Ali, I., and Raghavan, S., Proceedings of the Institute of Environ-mental Sciences, Annual Technical Meeting, p. 849, Mount Prospect, IL, (1991).

89. Chiarello, R., Parker, R., and Tritapoe, M., MICRO, 18(6):111 (June, 2000). 90. Rosamilia, J. M., Boone, T., Sapjeta, J., Raghavachari, K., Higashi, G. S., and

Liu, Q., Symposium on Science and Technology of Semiconductor Surface Preparation, MRS Spring Meeting, San Francisco (March 31–April 4, 1997).

91. Krussell, W. C., and Golland, D. I., First International Symposium on Cleaning Technology in Semiconductor Device Manufacturing, 90-9:23 (Ruzyllo,


J., and Novak, R. E., eds.), The Electrochemical Society, Pennington, NJ, (1990).

92. Mertens, P. W., Bearda, T., Houssa, M., Loewenstein, L. M., Cornelissen, I., DeGendt, S., Kenis, K., Teerlinck, I., Vos, R., Meuris, M., and Heyns,M. M., Microelectronic Engineering, 48:199 (1999).

93. Loewenstein, L. M., Charpin, F., and Mertens, P. W., J. Electrochem. Soc., 146(2):719 (1999).

94. Tonti, A., Extended Abstracts, The Electrochemical Society Fall Meet-ing, 91-2;758, The Electrochemical Society, Pennington, NJ, (1991).

95. Ohmi, T., Mishima, H., Mizuniwa, T., and Abe, M., Microcontamination, 7(5):25(1989).

96. Marra, J., and Huethorst, J. A. M., Langmuir, Vol. 7:2748 (1991). 97. Mayerhofer, D., J. Appl. Phys., 49:1993 (1978). 98. Bichebois, P., Workshop on Defect and Fault-Tolerance in VLSI Systems,

p. 124, IEEE (1996). 99. Marra, J., Extended Abstracts, Third Symposium on Particles in Gases and

Liquids: Detection, Characterization and Control, p. 52, San Jose, CA, (1991).

100. Leenaars, A. F. M., Huethorst, J. A. M., and Van Oekel, J. J., Langmuir, 6(11):1701 (1990).

101. Singer, P. H., Semiconductor International, 15(1):24 (1992).102. Matsuzaki, H., Ookouchi, I., Kurokawa, K. E., and Takahashi, S., J. Chem.

Engr. Japan, 21(5):490 (1988).103. Mackinnon, S., Proceedings, Microcontamination ’94, p. 174 (1994).104. Watanabe, M., Hamano, M., and Harazono, M., Mat. Sci. Eng., B4:401

(1989).105. Park, J., and Pas, M., J. Electrochem. Soc., 142(6):2028 (1995).106. Gale, G. W., Syverson, W. A., and Brigante, J. A., Fifth International

Symposium on Cleaning Technology in Semiconductor Device Manufacturing (Novak, R. E., and Ruzyllo, J., eds.), 97-35:31, The Electrochemical Society, Pennington, NJ, (1997).

107. Namba, H., Orii, T., Ohno, H., and Gale, G. W., Solid State Phenomena, 103-104:83 (2005).

108. Gale, G. W., Ohno, H., Namba, H., Orii, T., Takagi, Y., and Yamasaka, M., Fourth International Conference on Semiconductor Technology (Yang, M., ed.), 2005-08:449, The Electrochemical Society, Pennington, NJ, (2005).

109. Dillenbeck, K., Particle Control for Semiconductor Manufacturing (Dono-van, R. P. ed.), 203, Marcel Dekker, NY, (1990).

110. Rosato, J. J., and Yalamanchili M. R., Solid State Technology, 48(10):50 (October, 2005).

111. Leenaars, A. F. M., Huethorsr, J. A. M., and Marra, J., U.S. Patent 5,271,774 (December, 21, 1993).

112. Haigermoser, C., Henry, S., Rho, E., Song, J., and Kim, H., Cleaning Technology in Semiconductor Device Manufacturing IX, 208th ECS Meeting, Los Angeles, CA, The Electrochemical Society, Pennington, NJ, p. 16 (2005).

113. Hashimoto, S., Kaya, M., and Ohmi, T., Microcontamination, 7(6):25 (1989).


114. Krygier, V., Microcontamination, 4(12):20 (1986).115. Skidmore, K., Semiconductor International, 11(11):66 (1988).116. Gotlinsky, B., Microelectronics Manufacturing and Testing, 10(13):1

(1987).117. Gruver, R., Silverman, R., and Kehley, J., Proceedings of the Institute of En-

vironmental Sciences, Annual Technical Meeting, p. 312, Mount Prospect, IL, (1990).

118. Rosenfeld, E., DeSelms, B., and Menon, V. B., Proceedings of the Micro-contamination 90 Conference and Exposition, Tutorial No. 107:225, San Jose, CA, (1990).

119. Menon, V. B., Michaels, L. D., Clayton, A. C., and Donovan, R. P., Solid State Technology, 32(10):S29 (1989).

120. The International Technology Roadmap for Semiconductors, ITRS, Semiconductor Industry Association, Austin, TX (2006).

121. Buchanan, D. A., IBM J. Res. Dev., 43(3):245 (1999).122. Bersuker, G., Zeitzoff, P., Brown, G., and Huff, H. R., Materials Today, p. 2

6 (January, 2004).123. Chang, T. C., Mor, Y. S., Liu, P. T., Tsai, T. M., Chen, C. W., Chu, C. J., Pan,

F. M., Lur, W., and Sze, S. M., J. Electrochem. Soc., 149 (10):F145 (2002).124. Dance, D. L., Burghard, R. W., and Markle, R. J., Microcontamination,

64:21 (May, 1992).

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