Clean Room & Wafer Cleaning

ESS4810 LectureFall 2010

Clean Room

• A specially constructed enclosed area that is environmentally controlled with respect to airborne particulates, temperature, air pressure, humidity, vibration, and lighting

Clean Room Classification- U.S. Federal Standard 209b

• Class 1: the particle count does not exceed 1 particle per cubic foot with particles of a size of > 0.5 μm

• Class 100: the particle count does not exceed 100 particles per cubic foot with particles of a size of > 0.5 μm

Wafer Cleaning Methods

• RCA1 and RCA2• Thermal treatment• Plasma or glow discharge techniques• Ultrasonic agitation• Polishing with abrasive compounds• Supercritical cleaning

RCA Cleaning Procedure

• RCA1: Add 1 part of NH3 (25% aqueous solution) to 5 parts of DI water; heat to boiling and add one part of H2O2. Immerse the wafer for ten minutes. This procedure removes organic dirt (resist).

• RCA2: Add 1 part of HCl to 6 parts of DI water; heat to boiling and add 1 part H2O2. Immerse the wafer for ten minutes. This procedure removes metal ions.

Piranha Clean

• Add 1 part of H2O2 to 10 parts of H2SO4; heat to 120ºC. Immerse the wafer for ten minutes. This procedure removes organic residues and complex heavy metal ions.

RCA Cleaning Procedure

Supercritical Cleaning

Thermal Oxidation

ESS4810 LectureFall 2010

Thermal Oxidation

• The formation of the oxide of silicon (SiO2) on a silicon surface is termed oxidation

• Although there are several ways to produce SiO2 directly on the Si surface, it is most often accomplished by thermal oxidation, in which the silicon is exposed to an oxidizing ambient (O2, H2O) at elevated temperatures

Wet and Dry Oxidation

• Wet– H2O as oxidant

• Dry– O2 as oxidant

Properties

• Excellent electrical insulator– Resistivity > 1x1020 ohm-cm– Energy gap ~ 9 eV

• High breakdown electric field > 10 MV/cm• Stable and reproducible Si/SiO2 interface• Conformal oxide growth on exposed Si

surface

Properties

• Good diffusion mask for common dopantsDSiO2 RSi

Si

SiO2SiO2

Si

Si

or

Oxidation Furnace

Thickness

• Oxidize 1 μm of Si will generate 2.17 μm of SiO2

Kinetics of SiO2 Growth

Deal-Grove Model

Growth Rate Derivation

• Steady state condition:– F1=F2=F3 (2 equations)

• 2 unknowns Co and Ci– CS and Co are related by Henry’s Law– CG is a controlled process variable

Derivation

• Henry’s law

• Result

Derivation

• Define

• F1

Derivation

• F2=F3

• F1=F2

Derivation

• Convert F into growth rate

Derivation

• Condition

• Solution

Xox

Deal-Grove Model

Growth rate slows down with increase thickness

Parameters B and B/A

Parameters B and B/A

Parabolic constant B Linear constant B/A

Oxidation Chartbased on Xi=0

Thickness Estimation

• 4000Å oxide– 1000ºC, 1 hour– 1100ºC, 24 minutes– CVD oxide– …

Xox

Xi = 4000Å, wet oxidation, 1100ºC, 33 minutes

Thickness Estimation

• Method 1– Find B and B/A from charts– Solve

Xox

Xi = 4000Å, wet oxidation, 1100ºC, 33 minutes

Thickness Estimation

• Method 2– Use oxidation chart

Xox

Xi = 4000Å, wet oxidation, 1100ºC, 33 minutes

24 + 33 = 57

Effect of Xi on Wafer Topography

Less oxide grown

More oxide grown

High Pressure Oxidation

CA PG

• When PG increases, both B and B/A will increase. Therefore oxidation rate increases.

• Either time or temperature can be reduced if the pressure is increased.

CA PGCA PGCA PGCA PG

Doping Concentration Effect

• Highly doped Si has more vacancies

• Higher growth rate

Orientation Dependence

• Difference more obvious for thin oxides• Most IC’s made with (100) Si

Orientation Dependence

• Density of Si atoms < 7 x 1014/cm2

• Density of Si atoms ~ 8 x 1014/cm2, more bonds are available for reaction

Ks(111) > Ks(100)

Oxidation with Cl-containing Gas

• Introduction of halogen species during oxidation– reduction in metallic contamination– improved SiO2/Si interface properties

Effect of HCl on Growth Rate

Dependence of B/A and B on Processing Parameters

Thickness Characterization

• Compare the color of the wafer with the reference color chart

• Ellipsometer• Surface Profiler

Process Overview

ESS4810 LectureFall 2010

Process Flow

Si

Lab 1:1. Wafer cleaning2. Thermal Oxidation

Wet Oxide

SiSi

Lab 2-1: 1. Lithography (PR AZ 5214, mask #1for bulk etching window)

Si

PR AZ 5214 (positive)

SiSiSi

Si

Lab 2-2: 1. Break wafer into A & B2. B: BOE wet etching

A: RIE dry etching3. PR strip, wafer cleaning

Part BDry etch Wet etch

Si

-2: 1.

3.

Part A Dry etch

Process FlowLab 3: 1. A: E-beam evaporation

Cr/Ni 0.05/0.15 μm2. B: TMAH bulk etchingSi

Cr/Ni

1.

2.Si

Cr/Ni

Si

Cr/Ni

Si

Lab 4-1: 1.

SiSiSi

-1: 1. Lithography

Ni, by wet etching (mask #2)

Lab 4-2:1.

2.Si

AZ4620Ni

-LithographyAZ4620 (mask #3)Electro-Plating, NiSiSiSi

Ni

Lab 5: 1. PR strip2. Oxide (sacrificial layer) etching

surface micromachining

Wafer LayoutBulk micromachiningSurface micromachining

Part A Part B

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