good after noon to all
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GOOD AFTER NOON TO ALL
WE ARE HERE TO PRESENT YOU APRESENTATION ON
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What is crosstalk ?
How it occurs ?
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An unwanted coupling from a
neighboring signal wire to a network
node introduces Interference. Theinjected noise depends upon the
transient value of the other signals
routed in the neighborhood
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The digital integrated circuit designing is rapidly approaching apoint where conventional device signal models are no longer
effective in predicting the behavior of ICs. The maintenance of
signal integrity possesses a challenge in designs implemented in
deep sub-micron technology that operates at speeds approaching
10GHz and above. Smaller devices are more condensed in
geometry and smaller signal swings are used to achieve high-
speed performance. This high-speed approach results in higher
noise-coupling rate and lower noise margin as the side effects.
Consequently, signal integrity and interconnectmodeling becomes more critical and a limiting factor for avoiding
crosstalk
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Crosstalk may occur over
many paths like
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Inductive Crosstalk and Capacitive
crosstalk :This type of Crosstalk comes into
existance when the interconnects
are routed close to each
other,signals on the line crosstalk to
each other via near fieldelectromagnetic coupling
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Substrate Crosstalk:
The common substrate serves as a channelfor signal coupling when Interconnects are
placed far a apart,such a noise source is
called Substrate Crosstalk.They play asignificant negative role in mixed signal ICs
where low resistive silicon substrate can be
modeled as resistive and capacitive networkand noise can spread globally through the
network.
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Power/Ground CrossTalk:
Signals may effect one
another via a shared power
supply and ground leading toPower Supply and Ground
Crosstalk
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Return Signal Crosstalk:
When a pair of signals share a returnpath having a finite impedance, a
transition on one signal induces a
voltage across the shared returnimpedance that appears as a noise
on the other signal thereby giving
scope to return signal crosstalk
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Crosstalk effects:
Crosstalk primarily causes noise on non-
switching wires as
A capacitor does not like to change its
voltage instantaneously.
A wire has high capacitance to its
neighbor and when the neighbor
switches from 1-> 0 or 0->1, the wiretends to switch too called capacitive
coupling or crosstalk
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Types of Crosstalk
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Crosstalk can be a difficult phenomenon tograsp, particularly since there are two types of
crosstalk, forward and backward, which behave
quite differently. Though, the magnitude of
forward crosstalk increases as the length of the
coupled region increases, its pulse width
remains nearly constant and independent of the
length of the coupled region.
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However in case of backward crosstalk,
there is nearly constant magnitude
independent of the length of the
coupled region (as long as the coupled
region is "long enough"). But its pulse
width is twice as long as the coupled
region. Crosstalk can be a serious
problem in some designs as it hassome very subtle effects that are hard
to recognize. As a result:
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Parasitic coupling capacitanceand inductance between
interconnect introduces crosstalk
between signals
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Level of crosstalk depends on
signal frequency, layout geometryand material characteristics
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Crosstalk sensitivity varies - some
nodes (pre-charge control
function) may be very sensitive,others (static gate nodes)
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Minimize crosstalk by re-designing layout to minimize
coupling C & L (e.g. by increasingspacing between critical signals)
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Backward Crosstalk:
In case of backward crosstalk, the backward crosstalk
pulse is (almost) constant amplitude in magnitude buttwice as wide as the propagation time represented by
the coupled region. This backward crosstalk pulse
width is trouble understanding. The width is not a
function of coupling strength. Width is purely afunction of the length of the coupled region. Hence
the backward crosstalk pulse width is purely a
function of the length of the coupled region. Backward
crosstalk grows fairly quickly to a constant magnitudepulse whose pulse width is twice as wide as the
propagation time down the coupled region.
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Forward Crosstalk:
As the aggressor signal moves forward one more increment,
the first two victim elements get kicked further along and
bump into the third element. This continues as the aggressor
keeps kicking the forward crosstalk elements along. By the
time the aggressor signal reaches the end of its trace, the
forward crosstalk elements are all bunched together at the farend of the victim trace. The forward crosstalk signal never
travels in the reverse direction, it doesn't care whether there is
a reflecting barrier or not. The quantity of the forward
elements represents the magnitude of the forward crosstalk
signal. The forward crosstalk signal will continue to increase inmagnitude the longer is the coupled region. Although there is a
theoretical limit to how high the forward crosstalk signal can
grow, it is never likely to reach that limit on circuit boards (the
coupled region can't be long enough).
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For simplicity the forward crosstalk signal can be
assumed to grow larger and larger as the
coupled region increases. All the elements
representing the signal are clustered on top of
each other. This represents the width of the
forward crosstalk pulse. In theory, the width of the forward crosstalk pulse is no wider than the
rise time of the aggressor signal that creates it.
The pulse starts to build as the aggressor signal
starts to rise, and it finishes building when the
aggressor signal has reached its maximum value.
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Forward versus Backward Crosstalk
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RULES TO AVOID CROSSTALK
1. Greater separation between traces
is better.
2. Lower frequency harmonics and
slower rise times are better.3. Keep the sensitive traces in
stripline environments.
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WHAT IS INTERCONNECTS ?
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In past, on-chip interconnect wires were not
considered to be a major issue and had only beenconsidered in special cases or when performing high-
precision analysis. However, with the introduction of
deep-submicron semiconductor technologies, there
have been rapid changes. While the gate delay used todominate the net delay, the on-chip interconnects
delay now account for up to 60% of the total delay in a
deep submicron design. The on-chip interconnect
delay needs to be accurately quantified; as any error inthe on-chip interconnect delay can translate into a
large portion of error in the total delay
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Another phenomenon that occurs in a deep submicron
design is that in order to maintain proper resistance
(and therefore voltage drop) in each conducting wire,the conductors height is not reduced, if at all, as fast as
the width. Due to the different aspect ratio, the
coupling capacitance between adjacent wires, which
was ignored in past is now significant. The frequency-dependent resistance and inductance (i.e., the skin
effect) of each conductor can be readily obtained by
subdividing the cross section of each conductor into
many segments, replacing each segment by a resistorand inductor in series, and then
reducing the aggregate resistors and inductors through
a circuit formulation
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Classification of VLSI Interconnects ?
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At the lowest level are the polysilicon
lines characterized as RC lines.
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M etal interconnects on chip
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Chip to chip interconnects
on a module.
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WHEN?????????
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TIME FOR
QUESTIONS??
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WHY??????
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