g. bertuccio “challenges in the design of front-end electronics for semiconductor radiation...

G. Bertuccio “Challenges in the Design of Front-End Electronics for Semiconductor Radiation Detectors ” 14th International Workshop on Room Temperature Semiconductor X-Ray and Gamma-Ray detectors, October 18-21 , Rome.

14th International Workshop on Room Temperature Semiconductor Detectors and Associated Electronics“, 19-22 October 2004, Rome, Italy.

Challenges in the Design of Challenges in the Design of Front-End ElectronicsFront-End Electronics

for Semiconductor Radiation Detectorsfor Semiconductor Radiation Detectors

Department of Electronics Engineering and Information Science

Milano - Italy

Giuseppe Bertuccio

Politecnico di Milano and INFN


The Front-End Electronics is made for a detector

Introduction

The design challenges start from the detector

Silicon Carbide Detectors

…a step forward for Front-end Electronic Design

(useful also for other detectors…)

A stimulating case…


Leakage Current DensityState of the art detectors

Si / GaAs1 nA/cm2



1000 SiC1 pA/cm2

Si / GaAs1 nA/cm2



Si / GaAs1 nA/cm2

SiC1 pA/cm2

1000


SiC pixel detector: from 27 °C to 100°C

43 e- r.m.s. @ 100 °C

17 e- r.m.s. @ 27 °C

Front-End limited


SiC Pixel Detectors

SiC Pad detectors : JSiC = 1 – 10 pA/cm2

Current of a pixel ?

VBIAS=0V; I = 0 ± 0.1 fA

IREV = 1.6 fA - 16 fA !IREV = 1.6 fA - 16 fA !Area = 400 x 400 m2

4x4 Prototype

SiC pixel

400 x 400 m2


Pixel Leakage Current

SiC Pad detectors : JSiC = 1 – 10 pA/cm2

Current of a pixel ?

VBIAS=200V; I = 3.16 ± 0.3 fA

VBIAS=0V; I = 0 ± 0.1 fA

IREV = 2 fA - 16 fA !IREV = 2 fA - 16 fA !Area = 400 x 400 m2

4x4 Prototype

SiC pixel

400 x 400 m2


June 2004 : Reverse Current Map

Leakage Current @ 27 °C

I = 274 fA : 1 pixel

I = 98 fA : 1 pixel

I = 36 fA : 1 pixel

I < 10 fA : 12 pixels

Leakage Current @ 27 °C

I = 274 fA : 1 pixel

I = 98 fA : 1 pixel

I = 36 fA : 1 pixel

I < 10 fA : 12 pixels

Leakage Current E.N.C. @ 27 °C @ 10s

I = 274 fA : 1 pixel = 5.8 e-

I = 98 fA : 1 pixel = 3.5 e-

I = 36 fA : 1 pixel = 2 e-

I < 10 fA :12 pixels < 1 e- r.m.s.

Leakage Current E.N.C. @ 27 °C @ 10s

I = 274 fA : 1 pixel = 5.8 e-

I = 98 fA : 1 pixel = 3.5 e-

I = 36 fA : 1 pixel = 2 e-

I < 10 fA :12 pixels < 1 e- r.m.s.

SiC pixel

A Room Temperature

Sub-electron noise

Semiconductor Detector

SiC pixel

A Room Temperature

Sub-electron noise

Semiconductor Detector

I < 10fA : 12 pixels10 fA

I < 10fA : 12 pixels < 1 e- r.m.s.


Is it realistic to think to a sub-electron noise room temperature Front-End Electronics ?

Is it possible sub-e-noise in standard CMOS Technology ?

If not, what is the ultimate noise limit ? 1, 2 , 5… electrons r.m.s. ?

What does set the noise limit in CMOS ? 1/f or others ?

What is the power level required to achieve the ultimate noise ?

Is this power compatible with a thousand channels pixel detectoror it is reasonable only for few channels detectors ?

Some questions…


Design toward sub-electron noise FE…


22/1

22wpfwsTransistorInput ENCENCENCENC 22

/122

wpfwsTransistorInput ENCENCENCENC

122

TransistorInputtot ENCENC 122

TransistorInputtot ENCENC

E. Gatti, V. Radeka, P.F. Manfredi, M. Sampietro, V. Re,

A. Pullia, P. O’Connor, G. De Geronimo, G. Bertuccio …

Front End Noise


outline

• The classical theory and its limits

• 1/f noise : models and experiments

• Optimisation of ENC1/f

• Ultimate limit of ENC1/f

1 / f Noise


ENC 1/f: the classical theory

fLWC

KS

ox

FV

1'

fLWC

KS

ox

FV

1'

LWC

LWCCKAENC

ox

oxILFf '

2'

22

/1

LWC

LWCCKAENC

ox

oxILFf '

2'

22

/1

Assumptions

- Sv is independent by I

- Sv scales with (WL)-1

Are these assumptions always true ?Are these assumptions always true ?

')(

ox

ILopt C

CWL '

)(ox

ILopt C

CWL

ILFET CC ILFET CC Capacitive

Matching

Capacitive

Matching

LWC

LWCC

ox

oxIL'

2' LWC

LWCC

ox

oxIL'

2'


SV: Experimental data

PMOS 30/2 ( AMS 0.35 m )

10 A

1/f

30 A

100 A

300 A

HznVSV 50

SV/SV ~ 100 % !

fLWC

KS

ox

FV

1'

fLWC

KS

ox

FV

1'

!?


Models of 1/f noise

Hooge model :

McWhorter modelN

Unified - correlated modelN -

vNI vNI N : carriers numbers

v : carrier velocity

Hooge model :

McWhorter modelN

Unified - correlated modelN -


: Hooge model

- Empirical model

- Proposed by Hooge in 1969 to explain 1/f noise in

homogeneous semiconductors (resistors)

fI

Ndf

idS H

I

122

fI

Ndf

idS H

I

122

1/f origin: fluctuations due to phonon scattering


: McWhorter model

- Based on a model proposed by McWhorter in 1957

- Fluctuation of number of free carriers

ftzyEffENS

T

TTTTN

21

1)(4

ftzyEffENS

T

TTTTN

21

1)(4

SiSiO2

q-

NSi

SiO2

1/f origin in MOSFET

N due to charge trapping / detrapping in SiO2


SI vs. model

Ohmic

DST V

L

W

f

NkTq

3

2

DST V

L

W

f

NkTq

3

2

IVLf

q

VVVL

W

f

Cq

DSH

TGSDSoxH

2

3

'

1

IVLf

q

VVVL

W

f

Cq

DSH

TGSDSoxH

2

3

'

1

Saturation

ILfC

NkTq

VVL

W

f

NkTq

ox

T

TGST

2'

2

2

3

2

1

2

ILfC

NkTq

VVL

W

f

NkTq

ox

T

TGST

2'

2

2

3

2

1

2

23

3'

3

3

'2

12

2

ILWfC

q

VVL

W

f

Cq

ox

H

TGSoxH

23

3'

3

3

'2

12

2

ILWfC

q

VVL

W

f

Cq

ox

H

TGSoxH

Subthreshold

2

'''

4 1I

WLfCCCkT

Nq

itdox

T

2'''

4 1I

WLfCCCkT

Nq

itdox

T

I

L

W

f

CkT oxH

3

'2 IL

W

f

CkT oxH

3

'2

IL

W

321

ILW


What the experiments say…


p –MOSFET 10/10 (Lmin= 90 nm)

Subthreshold SI I 2

Valenza et al.

IEE 2004

vs. modelsSubthreshold

2

'''

4

)(

1I

WLfCCCkT

NqS

itdox

TSTI

2

'''

4

)(

1I

WLfCCCkT

NqS

itdox

TSTI

IL

W

f

CkTS oxH

STI

3

'

)(

2 IL

W

f

CkTS oxH

STI

3

'

)(

2

I 2I

N model (McWhorter)N model (McWhorter)


vs. modelsSaturation

2

3

2

)( 2 TGST

SATI VVL

W

f

NkTqS

2

3

2

)( 2 TGST

SATI VVL

W

f

NkTqS

33

'2

)( 2 TGSoxH

SATI VVL

W

f

CqS

33

'2

)( 2 TGSoxH

SATI VVL

W

f

CqS

3TGS VV 2

TGS VV

Saturation SI (VGS - VT)3

(Hooge) model (Hooge) model

p –MOSFET 10/10 (Lmin= 90 nm)

Valenza et al.

IEE 2004


vs. : experimental

PMOS NMOS

ST Microelectronics 0.13 m CMOS

Marin et al. - IEE 2004

I

N - McWhorter model

ILfC

NkTqS

ox

TSATI

2'

2

)(

1

I

LfC

NkTqS

ox

TSATI

2'

2

)(

1

I

23I

Hooge model

23

3')(

12I

LWfC

qS

ox

HSATI

23

3')(

12I

LWfC

qS

ox

HSATI

23I

saturation


bias region Hooge – McWhorter

SUBTHRESHOLD -- PMOS & NMOS

OHMIC PMOS NMOS

SATURATION PMOS NMOS

vs. model

PMOS : deeper channel → bulk effect →

NMOS: interface channel → trapping effects → N

PMOS : deeper channel → bulk effect →

NMOS: interface channel → trapping effects → N


Implication for Front-end designs…


vs. ENC optimisationSaturation

ILfC

NkTqS

ox

TSATI

2'

2

)(

1

I

LfC

NkTqS

ox

TSATI

2'

2

)(

1

23

3')(

12I

LWfC

qS

ox

HSATI

23

3')(

12I

LWfC

qS

ox

HSATI

SI

LWfC

NTkqS

ox

TSATV

1

2 2'

2

)(

LWfC

NTkqS

ox

TSATV

1

2 2'

2

)( ILWfC

qS

ox

HSATI

33')(

1

2 I

LWfC

qS

ox

HSATI

33')(

1

2

IL

WCg oxm

'2 IL

WCg oxm

'2

SV

SV

I

I

SV

I


Design for N-1/f MOSFET’s…


ENC1/f : model: Saturation

fLWC

NTkqS

ox

TSATV

11

2 2'

2

)(

fLWC

NTkqS

ox

TSATV

11

2 2'

2

)(

LWC

LWCC

C

NTkAENC

ox

GIL

ox

TNf '

2'

'22

2)(/1

LWC

LWCC

C

NTkAENC

ox

GIL

ox

TNf '

2'

'22

2)(/1

• independent by I

• same for equal area WL

• minimum for CG = CIL

• independent by I

• same for equal area WL

• minimum for CG = CIL


pFCENC

JK

ILf

F

14

104

/1

25

pFCENC

JK

ILf

F

4.4

104

/1

26

Ultimate limit of ENC1/f

ILF

Nf Cq

KAENC 2

)(/1

2min

ILF

Nf Cq

KAENC 2

)(/1

2min

1

50 fF

3 e-

0.5 pF


Design for - 1/f MOSFET’s…


ILWC

LLWCC

q

AENC

ox

GILHNf

3'

2'2

)(/12

I

LWC

LLWCC

q

AENC

ox

GILHNf

3'

2'2

)(/12

model: ENC1/f

2'0min 2 thox Vn

L

WCII

2'

0min 2 thox VnL

WCII

G

GILNf C

CCENC

2

)(/1

G

GILNf C

CCENC

2

)(/1

minimum for CG = CILminimum for CG = CIL

3

2

)(/1

G

GILNf

C

CCENC

3

2

)(/1

G

GILNf

C

CCENC

minimum for CG = 3 CILminimum for CG = 3 CIL

minimum current (within saturation) minimum current (within saturation)

II II

constant current constant current

In contrastwith series white noise

minimisationI


ILWC

LLWCC

q

AENC

ox

GILHf

3'

2'22

)(/12

ILWC

LLWCC

q

AENC

ox

GILHf

3'

2'22

)(/12

IW

LLWCCA

Cq

kTENC GIL

ox

SATws

1

2

42'

1

'

2)(

IW

LLWCCA

Cq

kTENC GIL

ox

SATws

1

2

42'

1

'

2)(

ENC optimisation

1/f

White

I

I

1

ENC2

I

1/fws

Iopt

CG1/fws

COPT1/3CIL 3CIL

CG = 3 CILCG = 3 CIL

CG = CIL/3CG = CIL/3


ENC optimisation

101

102

103

10-6

10-4

10-22

4

6

8

10

12

Current [A] Gate width W [m]

EN

C [

elec

tron

s r.

m.s

. ]

CIL =0.3 pF

= 10 s

PMOS AMS 0.35 m

H=4.6 10-5

CIL =0.3 pF

= 10 s

PMOS AMS 0.35 m

H=4.6 10-5

Iopt = 14 A

Wopt = 183 m

ENCmin = 2.8 e- r.m.s.

Iopt = 14 A

Wopt = 183 m


14 A183


Summary - Conclusions• RT detectors with sub-electron noise (SiC)

• Ultimate limit of CMOS Front End

• 1/f noise models revised McWhorter model limits

Hooge & unified models

Bias dependent 1/f noise

Bias Current / Geometry MOSFET optimisation

• ENC1/f : 1 - 3 e- r.m.s. at RT for CIL 50-500fF

• ENCtot = 3 e- r.m.s. (CIL = 0.3pF ) experimental data based


Acknowlegments

Andena Marco

Caccia Stefano

Maiocchi Diego

Mallardi Enzo

Masci Sergio

Olivieri Gianluigi

Thanks to:


Foxox

FV Kt

fLWC

KS

1' Fox

ox

FV Kt

fLWC

KS

1'


Sub-electron noise Front End :is it interesting ?

Intrinsic detector noise

SiGaAsCdTeSiC

6

4

1 keV30 60 eV

1


Parallel noise:MOSFET Gate leakage

1 nA

90 nm Technology

tox = 1.5 nmPMOS 0.3/10

IG

100 nA

ID

Valenza et al. IEE 2004


ID= 20 A ID = 5 mA

AMS CMOS 0.35 m

PMOS 300/0.4

AMS CMOS 0.35 mtox = 7.6 nm


101

102

103

10-6

10-4

10-2

0

2

4

6

8

10

12

1/f ENC component


EN

C [

elec

tron

s r.

m.s

. ]

CIL =0.3 pF

= 10 s

PMOS AMS 0.35 m

H=4.6 10-5

CIL =0.3 pF

= 10 s

PMOS AMS 0.35 m

H=4.6 10-5

Iopt = 1 A

Wopt = 570 m


Iopt = 1 A

Wopt = 570 m


1 A

570


101

102

103

10-6

10-4

10-2

1

2

3

4

White series


EN

C [

elec

tron

s r.

m.s

. ]

CIL =0.3 pF

= 10 s

PMOS AMS 0.35 m

H=4.6 10-5

CIL =0.3 pF

= 10 s

PMOS AMS 0.35 m

H=4.6 10-5

Iopt = 10 mA

Wopt = 60 m


Iopt = 10 mA

Wopt = 60 m


10 mA

60


Unified model : correlated - Proposed by Mikoshiba in 1982, developed in 1987-91

- Trapping (N) & mobility () fluctuations correlation

SiSiO2

SiSiO2

-±

ttt

NNN

N

NI

I

11

ttt

NNN

N

NI

I

11


L

sctI dxxN

NLW

I

f

kTS

0

2

2

2

)(

1

L

sctI dxxN

NLW

I

f

kTS

0

2

2

2

)(

1

Magnitude N & sc determines N or dominance

scxN

)(

1

Implemented in SPICE BSIM3

2*

2

2

2

2200*

*0

'2

2

2ln

NN

CNBNA

LWf

IkTL

NNC

NNBNN

NNA

CLfa

IqkTS

L

LLd

LLLox

effdI

2*

2

2

2

2200*

*0

'2

2

2ln

NN

CNBNA

LWf

IkTL

NNC

NNBNN

NNA

CLfa

IqkTS

L

LLd

LLLox

effdI

Unified model : correlated


120 eVFWHM

55Fe

10.9 e- r.m.s.

NIM A361 (1995)

Floating gate amplifier - multiple non destructive readingsT = - 110 °CProcessing time 160 s = ( 16 readings ) x 10 s

Floating gate amplifier - multiple non destructive readingsT = - 110 °CProcessing time 160 s = ( 16 readings ) x 10 s


SiC propertiesWide Bandgap

EG=3.2 eV

High saturation velocity

vS = 200 m/ns

High Critical Field

EC = 2 MV/cmHigh thermal conductivity

SiC Si


PMOS

4

33

20)10(minAI

pFCsENC IL

ws

4

33

20)10(minAI

pFCsENC IL

ws

3.5 e -

6.5 e -

1pF

AMS PMOS:

Lmin= 0.35m ; =126 cm2/Vs ; A1=1

AMS PMOS:

Lmin= 0.35m ; =126 cm2/Vs ; A1=1

1


W/L = 2000/0.5 ( STM 0.18 m process)

ID: 0.25 - 0.5 - 1 mA

PMOS

ID: 0.25 - 0.5 - 1 mA

NMOS

ENC 1/f : experimental

from Manghisoni et al., IEEE TNS 2002

HznV13

g. bertuccio “challenges in the design of front-end electronics for semiconductor radiation...

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