Exam1 Review

Dr. Bernard Chen Ph.D.University of Central Arkansas

Spring 2010

Computer Science at a Crossroads

“Power wall” Triple hurdles of maximum power dissipation

of air-cooled chips

“ILP wall” Little instruction-level parallelism left ot exploit

efficiently

“Memory wall” Almost unchanged memory latency

Computer Science at a Crossroads Old Conventional Wisdom :

Uniprocessor performance 2X / 1.5 yrs

New Conventional Wisdom : Power Wall + ILP Wall + Memory Wall = Brick Wall

Uniprocessor performance now 2X / 5(?) yrs

Computer Science at a Crossroads

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Defining Computer Architecture

The task of computer designer:Determine what attributes are important for a new computer, then design a computer to maximize performance while staying within cost, power, and availability constrains

Defining Computer Architecture In the past, the term computer architecture

often referred only to instruction set design Other aspects of computer design were called

implementation, often assuming that implementation is uninteresting or less challenging

Of course, it is wrong for today’s trend Architect’s job much more than instruction set

design; technical hurdles today more challenging than those in instruction set design

Instruction Set Architecture (ISA)

The instruction set architecture serves as the boundary between the software and hardware.

We will have a complete introduction to this part. (Some examples in the next two slides)

Instruction code format Instruction code format with two

parts : Op. Code + Address Op. Code : specify 16 possible operations(4

bits) Address : specify the address of an

operand(12 bits) If an operation in an instruction code does

not need an operand from memory, the rest of the bits in the instruction(address field) can be used for other purpose

Op. Code Address

15 12 11 0

instruction

data

15 12 11 0

Not an instruction

Cost of an Integrated Circuit Cost of die =

Cost of wafer / (Dies per wafer * Die yield)

Learning how to predict the number of good chips per wafer requires first learning how many dies fit on a wafer

Cost of an Integrated Circuit

Cost of an Integrated Circuit

Basic Identities of Boolean Algebra(Existence of 1 and 0 element)

(1) x + 0 = x(2) x · 0 = 0(3) x + 1 = 1(4) x · 1 = 1(5) x + x = x(6) x · x = x(7) x + x’ = x(8) x · x’ = 0

(9) x + y = y + x(10) xy = yx(11) x + ( y + z ) = ( x + y ) +

z(12) x (yz) = (xy) z(13) x ( y + z ) = xy + xz(14) x + yz = ( x + y )( x + z)(15) ( x + y )’ = x’ y’(16) ( xy )’ = x’ + y’(17) (x’)’ = x

DeMorgan's exampleShow that: (a(b + z(x + a')))' =a' + b' (z' + x')

(a(b + z(x + a')))' = a' + (b + z(x + a'))' = a' + b' (z(x + a'))' = a' + b' (z' + (x + a')') = a' + b' (z' + x'(a')') = a' + b' (z' + x'a)=a‘+b' z' + b'x'a=(a‘+ b'x'a) + b' z' =(a‘+ b'x‘)(a +a‘) + b' z' = a‘+ b'x‘+ b' z‘ = a' + b' (z' + x')

More Examples

(a(b + c) + a'b)'=b'(a' + c')ab + a'c + bc = ab + a'c (a + b)(a' + c)(b + c) = (a + b)(a' +

c)

Outline

Decoder Encoder MUX

2-to-4 Decoder

Decoder Expansion

How about 4-16 decoder

Use how many 3-8 decoder? Use how many 2-4 decoder?

Encoders

Perform the inverse operation of a decoder 2n (or less) input lines and n

output lines

Encoders

Accepts multiple values and encodes them Works when more than one input is active

Consists of: Inputs (2n) Outputs

when more than one output is active, sets output to correspond to highest input

V (indicates whether any of the inputs are active)

Selectors / Enable (active high or active low)

Priority Encoder

4 to 1 line multiplexer

S1 S0 F

0 0 I0

0 1 I1

1 0 I2

1 1 I3

4 to 1 line multiplexer

2n MUX to 1

n for this MUX is 2

This means 2 selection lines s0 and s1

Outline

Data Representation Compliments

Conversion Between Number Bases

Decimal(base 10)

Octal(base 8)

Binary(base 2)

Hexadecimal

(base16)° We normally convert to base 10

because we are naturally used to the decimal number system.

° We can also convert to other number systems

Example Convert 101011110110011 to a.       octal numberb.      hexadecimal number a.       Each 3 bits are converted to octal :

(101) (011) (110) (110) (011)

5 3 6 6 3 101011110110011 = (53663)8

b.      Each 4 bits are converted to hexadecimal:(0101) (0111) (1011) (0011)

5 7 B 3

101011110110011 = (57B3)16

Conversion from binary to hexadecimal is similar except that the bits divided into groups of four.

Subtraction using addition

• Conventional addition (using carry) is easily • implemented in digital computers. • However; subtraction by borrowing is difficult

and inefficient for digital computers. • Much more efficient to implement subtraction

using ADDITION OF the COMPLEMENTS of numbers.

Complements of numbers

(r-1 )’s Complement

•Given a number N in base r having n digits, •the (r- 1)’s complement of N is defined as

(rn - 1) - N

•For decimal numbers the base or r = 10 and r- 1= 9,

•so the 9’s complement of N is (10n-1)-N

•99999……. - N

Digit n

Digit n-1

Next digit

Next digit

First digit

9 9 9 9 9

-

l’s complement

For binary numbers, r = 2 and r — 1 = 1,

r-1’s complement is the l’s complement.

The l’s complement of N is (2^n- 1) - N.

Digit n

Digit n-1

Next digit

Next digit

First digit

1 1 1 1 1

Bit n-1 Bit n-2 ……. Bit 1 Bit 0

-

r’s Complement

•Given a number N in base r having n digits, •the r’s complement of N is defined as

rn - N.

•For decimal numbers the base or r = 10,

•so the 10’s complement of N is 10n-N.

•100000……. - N

Digit n

Digit n-1

Next digit

Next digit

First digit

0 0 0 0 0

-1

10’s complement Examples

Find the 10’s complement of 546700 and 12389

The 10’s complement of 546700 is 1000000 - 546700= 453300

and the 10’s complement of 12389 is

100000 - 12389 = 87611.

Notice that it is the same as 9’s complement + 1.

5 4 6 7 0- 0

0 0 0 0 0 0

4 5 3 3 0 0

1 2 3 8- 9

1 0 0 0 0 0

8 7 6 1 1

1

For binary numbers, r = 2,

r’s complement is the 2’s complement.

The 2’s complement of N is 2n - N.

2’s complement

Digit n

Digit n-1

Next digit

Next digit

First digit

0 0 0 0 0

-1

Subtraction of Unsigned Numbers using r’s complement

(1) if M N, ignore the carry without taking complement of sum.

(2) if M < N, take the r’s complement of sum and place negative sign in front of sum. The answer is negative.

Subtract by Summation

Subtraction with complement is done with binary numbers in a similar way.

Using two binary numbers X=1010100 and Y=1000011

We perform X-Y and Y-X

X-Y

X= 1010100 2’s com. of Y= 0111101 Sum= 10010001 Answer= 0010001

Y-X

Y= 1000011 2’s com. of X= 0101100 Sum= 1101111

There’s no end carry: answer is negative --- 0010001 (2’s complement of 1101111)

How To Represent Signed Numbers Plus and minus signs used for decimal

numbers: 25 (or +25), -16, etc.

For computers, it is desirable to represent everything as bits..

Three types of signed binary number representations:

1. signed magnitude, 2. 1’s complement, and 3. 2’s complement

1. signed magnitude• In each case: left-most bit

indicates sign: positive (0) or negative (1).

Consider 1. signed magnitude:

000011002 = 1210

Sign bit Magnitude

100011002 = -1210

Sign bit Magnitude

2. One’s Complement Representation

The one’s complement of a binary number involves inverting all bits.

• To find negative of 1’s complement To find negative of 1’s complement number take the 1’s complement of number take the 1’s complement of whole number including the sign bit.whole number including the sign bit.

000011002 = 1210

Sign bit Magnitude

111100112 = -1210

Sign bit 1’complement

3. Two’s Complement Representation

• The two’s complement of a binary number involves inverting all bits and adding 1.

To find the negative of a signed number take the 2’s the 2’s complement of the positive number including the sign bit.

000011002 = 1210

Sign bit Magnitude

111101002 = -1210

Sign bit 2’s complement

The rule for addition is add the two numbers, including their sign bits, and discard any carry out of the sign (leftmost) bit position. Numerical examples for addition are shown below.Example:

+ 6 00000110 - 6 11111010+13 00001101 +13 00001101+19 00010011 +7 00000111

+6 00000110 -6 11111010-13 11110011 -13 11110011-7 11111001 -19 11101101

In each of the four cases, the operation performed is always addition, including the sign bits.Only one rule for addition, no separate treatment of subtraction. Negative numbers are always represented in 2’s complement.

Sign addition in 2’s complement

Overflow Overflow example:

+70 0 1000110 -70 1 0111010 +80 0 1010000 -80 1 0110000 = +150 1 0010110 =-150 0 1101010

An overflow may occur if the two numbers added are both either positive or negative.

BINARY ADDER-SUBTRACTOR

Example Extend the previous logic circuit to accommodate XNOR,

NAND, NOR, and the complement of the second input.

S2

S1

S0

Output Operation

0 0 0 X Y AND

0 0 1 X Y OR

0 1 0 X Y XOR

0 1 1 A Complement A

1 0 0 (X Y) NAND

1 0 1 (X Y) NOR

1 1 0 (X Y) XNOR

1 1 1 B Complement B

Shift Microoperations

Symbolic designation Description

R ← shl R Shift-left register R R ← shr R Shift-right register R R ← cil R Circular shift-left register R R ← cir R Circular shift-right register R R ← ashl R Arithmetic shift-left R R ← ashr R Arithmetic shift-right R

TABLE 4-7. Shift Microoperations

Logical Shift Example

1. Logical shift: Transfers 0 through the serial input.R1 shl R1 Logical shift-leftR2 shr R2 Logical shift-right

(Example) Logical shift-left10100011 01000110

(Example) Logical shift-right10100011 01010001

Circular Shift Example

22

11

RcirR

RcilR

Circular shift-left

Circular shift-right

(Example) Circular shift-left

10100011 is shifted to 01000111

(Example) Circular shift-right

10100011 is shifted to 11010001

Arithmetic Shift Right Arithmetic Shift Right :

Example 1

0100 (4) 0010 (2)

Example 2

1010 (-6) 1101 (-3)

Arithmetic Shift Left Arithmetic Shift Left :

Example 10010 (2) 0100 (4)

Example 2 1110 (-2) 1100 (-4)

Arithmetic Shift Left : Example 3

0100 (4) 1000 (overflow)

Example 4 1010 (-6) 0100 (overflow)