energy efficient dynamic adaptive self configurable network processor

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Energy Efficient Dynamic Adaptive Self-Configurable Network Processor A. SATHEESH Research Scholar Department of Computer Science and Engineering Research Supervisor Dr.D.Kumar Professor & Dean (Research) Department of Electronics and Communication Engineering 29.10.2013 1 A.SATHEESH, Research Scholar, Periyar Maniammai University

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Page 1: Energy efficient dynamic adaptive self configurable network processor

PERIYAR MANIAMMAI UNIVERSITY

Energy Efficient Dynamic Adaptive

Self-Configurable Network Processor

A. SATHEESH

Research Scholar

Department of Computer Science and Engineering

Research Supervisor

Dr.D.Kumar

Professor & Dean (Research)

Department of Electronics and Communication

Engineering

29.10.2013

1 A.SATHEESH, Research Scholar, Periyar Maniammai University

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PERIYAR MANIAMMAI UNIVERSITY

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If you are able, give only what is

needed-this is a principle of those

who respect the value of wealth

“¬üÈ¢ý «ÇÅÈ¢óÐ ®¸ «Ð¦À¡Õû À¡üÈ¢ ÅÆíÌ ¦¿È¢”

¾¢ÕìÌÈû, 477

Thirukkural, 477

2 A.SATHEESH, Research Scholar, Periyar Maniammai University

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PERIYAR MANIAMMAI UNIVERSITY

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Overview

Introduction

Problem and Solution

Design and Method

Implementation

Result Analysis

Conclusion and Future Work

3 A.SATHEESH, Research Scholar, Periyar Maniammai University

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Introduction

4 A.SATHEESH, Research Scholar, Periyar Maniammai University

2% of energy consumed in the world by computers.

Performance penalties are very severe

Poor resource allocation – non-uniform Traffic

IXP2400 NP consumes – 9-12W (400MHz)

- 13-16W (600MHz)

Our proposed method - saved 25-28% of power

consumption.

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Introduction

5 A.SATHEESH, Research Scholar, Periyar Maniammai University

Heavy Traffic Low Traffic Moderate Traffic

Source: CAIDA (The Cooperative Association for Internet Data Analysis)

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Functional Unit

6 A.SATHEESH, Research Scholar, Periyar Maniammai University

Media

Switch

Fabric

Scratchpad

memory

SRAM

Controller

A

DRAM

Controller

PCI

Controller

SRAM

Controller

B

ME

0x1

ME

0x2

Hash

Unit

CAP

ME

0x0

ME

0x3

ME

0x4

ME

0x5

ME

0x7

ME

0x6

Intel

XScale

Core

Peripheral

Intel

XScale

Core

Perf

orm

ance M

onitor

ME

Clu

ste

r 2

ME

Clu

ste

r 1

Input

Output

Control

128

SRAM

XFER IN

128 GPR

A BANK

128 GPR

B BANK

128

DRAM

XFER IN

16

entries

CAM

A

B

ALU

128 SRAM

XFER

128 SRAM

XFER IN

Local

Memory

640

Words

Control

Store

4K

instruction

Command

FIFO

Shifter

Functional Unit of IXP2400 NP

Architecture of IXP2400 NP

Microengine

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Overview

Introduction

Problem and Solution

Design and Method

Result Analysis

Implementation

Conclusion and Future Work

7 A.SATHEESH, Research Scholar, Periyar Maniammai University

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Problem and Solution

Problem:

Network Processor (NP) Consumes more power.

Solution:

Microengines(ME) are consumed more than 80%

of Power

MEs are Switched off/on based upon traffic

fluctuation

8 A.SATHEESH, Research Scholar, Periyar Maniammai University

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Overview

Introduction

Problem and Solution

Design and Method

Implementation

Result Analysis

Conclusion and Future Work

9 A.SATHEESH, Research Scholar, Periyar Maniammai University

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Self-Configuration

ME 1

ME 2

ME 3

Low

Traffic

Moderate

Traffic

Heavy

Traffic

ME 8

ME 7

ME 6

ME 5

ME 4

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M/M/c Queue Model

Packets arrived in Poisson distribution

Arrival rate (λ) =

Poisson distribution

The formula for identifying the traffic intensity, ρ was

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M/M/c Queue Model

The formula for calculating average number of packets

in the system (Ls) was

The average number of packets in the intermediate

queue (Lq) was

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M/M/c Queue Model

The average packet service time (WS) was

Packets waiting in queue (Wq) was,

ME utilization,

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Power Model

TABLE I. POWER MODEL TOOLS FOR

VARIOUS UNITS OF MEs

Name of the Unit Tool for Power

Modeling

GPR, XFER, local

CSR, local memory,

control store

Cacti

ALU, Shifter,

Command FIFO,

CAM

Wattch

Context arbiter Orion

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Power Model

Total Power = Dynamic Power

X

Number of voltage switches

+

power consumption per voltage switch.

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Overview

Introduction

Problem and Solution

Design and Method

Implementation

Result Analysis

Conclusion and Future Work 16 A.SATHEESH, Research Scholar, Periyar Maniammai University

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Implementation

Intel IXP 2400 Network Processor.

Simulator: IXA SDK 3.5 Developer Workbench

Simulator.

Programming Language: Xscalecore

programming in C.

OS: Windows 2000,Red Hat Linux 7.3,

MontaVista Linux

Radisys, Inc. ENP-2611

NePSim2.0 //Power estimation Tool

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NP without Dynamic Reconfiguration

18 A.SATHEESH, Research Scholar, Periyar Maniammai University

0

100

200

300

400

500

600

0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

Time(Sec)

Workload Queue Length

Wo

rk

loa

d

(No

. of

Pac

ket

s)

Work

load

(N

o.

of

Pack

ets)

0

50

100

150

200

250

300

0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

Time(Sec)

Workload Queue Length

Work

load

(N

o.

of

Pack

ets)

0

100

200

300

400

500

600

0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

Time(Sec)

Workload Queue Length

Wo

rk lo

ad (

No

. of

Pac

kets

)

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NP with Dynamic Reconfiguration

19 A.SATHEESH, Research Scholar, Periyar Maniammai University

0

100

200

300

400

500

600

0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

Time(Sec)

Workload Queue Length

Dynamic

Deployment

Work

load

(N

o.

of

Pack

ets)

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Power Consumption

20 A.SATHEESH, Research Scholar, Periyar Maniammai University

Benchmark Applications

ipfwdr nat md4

Pow

er

(Watt)

0

2

4

6

8

10

12

Low Traffic

Moderate Traffic

Heavy Traffic

Power consumption by different benchmarks

in non-uniform traffic mixture (Core

frequency is 600MHz)

Power consumption by different benchmarks in

non-uniform traffic mixture (Core frequency is

400MHz)

Benchmark Applications

ipfwdr nat md4

Po

we

r (W

att

)

0

2

4

6

8

10

12

14

16

Low Traffic

Moderate Traffic

Heavy Traffic

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Power Consumption of MEs

21 A.SATHEESH, Research Scholar, Periyar Maniammai University

Power Consumption of MEs

Micro-engines in IXP2400 NP

ME0 ME1 ME2 ME3 ME4 ME5 ME6 ME7

% o

f P

ow

er

Con

sum

ption

0

20

40

60

80

100

Low Traffic

Moderate Traffic

Heavy Traffic

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Throughput Vs Sojourn Time

22 A.SATHEESH, Research Scholar, Periyar Maniammai University

No. of Packets

200 400 600 800 1000

Tim

e (

Second

s)

0.0

0.2

0.4

0.6

0.8

1.0

Throughput

Sojourn Time

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Overview

Introduction

Problem and Solution

Design and Method

Result Analysis

Conclusion and Future Work

23 A.SATHEESH, Research Scholar, Periyar Maniammai University

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Conclusion & Future Work

25-28% of energy saved

power efficiency of the Intel IXP2400

increases as the number of MEs

increases while it decreases as the

frequency increases.

Future Work: Finding a general

power model for all types of NPs.

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Thank You

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SHaC - (short for scratch pad, hash unit, and control & status

registers)

MSF - media switching fabric

GPR - General Purpose Registers

XFER - Transfer Registers

CAM - content-addressable memory

local CSR - Control and Status Register

MD4 - Message-Digest Algorithm

ipfwdr – Internet Protocol Forwarding

nat - network address translation