July 24, 2004 ANL Electronics Workshop, Schedule 1

ElectronicsGRETINA Project

Schedule, Engineering Effort, Instrumentation

Sergio Zimmermann

July 24, 2004 ANL Electronics Workshop, Schedule 2

Outline

• Block diagram• Scope• Schedule• Engineering effort• Instrumentation

July 24, 2004 ANL Electronics Workshop, Schedule 3

Electronics

Aux. Det. Trigger

Digital SignalProcessors

30 Crystals

Data Storage

2.2 MB/s

Aux. Det. Data

66 MB/s

75 dual Processors

Workstations, Servers

6.9 MB/s

2.3 MB/s + Aux. Data

Network Switch

Processing Farm

Readout Computer

Crystal

Pre - amplifier

Local Trigger and Timing Module

Global Trigger and Timing Module

July 24, 2004 ANL Electronics Workshop, Schedule 4

Electronics Project Scope

• Pre-amplifiers• Digitizer modules• Trigger system• Clock system• Test stands• High voltage power supplies• Low voltage power supplies• Cables• Grounding and shielding• Crates• Racks (with cooling)• System installation

July 24, 2004 ANL Electronics Workshop, Schedule 5

Project Schedule (Fiscal Years)WBS Task Name

1 GRETINA1.1 Mechanical1.1.2 Design1.1.3 Production1.2 Detector Module1.2.1 Purchasing1.2.2 Test/Characterize Module 11.2.3 Test/Characterize Rest of Modul1.3 Electronics 1.3.2 Prototype 1.3.3 Production1.4 Computing Systems1.4.2 Prototype1.4.3 Production1.5 System Assembly1.5.1 Prototype 1.5.2 Production1.6 Project Management1.7 Environment and Safety1.12 Level 1 Milestones: Critical Decision CD1 CD2/3A CD2/3B CD4

Complete test proc. and apparatus Complete test/charac. module

Award module contract Exercise option last module

Complete design/draw. support structureComplete mechanical subsystem

Complete test DSP module Start production DSP module

Award computer farm contract

Ready for prototype assembly Ready for final assembly

CD0

3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 32004 2005 2006 2007 2008 2009 2010 2011

Note: Proposal for GRETINA submitted in June 2003.

July 24, 2004 ANL Electronics Workshop, Schedule 6

Schedule for Electronics (Fiscal Years)ID WBS Task Name

304 1.3 Electronics 305 1.3.1 Requirement document306 1.3.2 Prototype 307 1.3.2.1 System Architecture308 1.3.2.2 Pre-amplifier325 1.3.2.3 Digital signal processing module339 1.3.2.4 Cables346 1.3.2.5 Crates352 1.3.2.6 Power supplies (low and high voltage)360 1.3.2.7 Trigger and Timing361 1.3.2.7.1 Write requirements documents of local and g362 1.3.2.7.2 Local trigger and timing371 1.3.2.7.3 Global trigger and timing378 1.3.2.7.4 Test Stand383 1.3.3 Production384 1.3.3.1 Preamplifier393 1.3.3.2 Digital signal processing module402 1.3.3.3 Cables410 1.3.3.4 Crates415 1.3.3.5 Power supplies (low and high voltage)423 1.3.3.6 Racks429 1.3.3.7 Trigger and Timing430 1.3.3.7.1 Upgrade requirements documents of local a431 1.3.3.7.2 Local trigger and timing440 1.3.3.7.3 Global trigger and timing

H1 H2 H1 H2 H1 H2 H1 H2 H1 H2 H1 H2 H12004 2005 2006 2007 2008 2009 2010

July 24, 2004 ANL Electronics Workshop, Schedule 7

Schedule for Electronics (Fiscal Years)

ID WBS Task Name

1 1 GRETINA2 1.1 Level 1: CD-13 1.1 Mechanical

170 1.2 Detector Module304 1.3 Electronics 305 1.3.1 Requirement document306 1.3.2 Prototype 383 1.3.3 Production446 1.4 Computing Systems606 1.5 System Assembly607 1.5.1 Level 2: Prototype Subsystems Complete608 1.5.1 Prototype 620 1.5.1 Level 1: CD-2B/CD-3B621 1.5.1 Level 2: Production Subsystems Complete622 1.5.2 Production658 1.5.2 Level 1: CD-4: Approve Start of Operations659 1.6 Project Management698 1.7 Environment and Safety

H1 H2 H1 H2 H1 H2 H1 H2 H1 H2 H1 H2 H12004 2005 2006 2007 2008 2009 2010

July 24, 2004 ANL Electronics Workshop, Schedule 8

Schedule for Electronics (Fiscal Years)

ID WBS Task Name

304 1.3 Electronics 305 1.3.1 Requirement document306 1.3.2 Prototype 307 1.3.2.1 System Architecture308 1.3.2.2 Pre-amplifier325 1.3.2.3 Digital signal processing module326 1.3.2.3.1 Write requirements and specification docum327 1.3.2.3.2 Review328 1.3.2.3.3 Design and layout329 1.3.2.3.4 Review330 1.3.2.3.5 Procure and assembly331 1.3.2.3.6 Material procured332 1.3.2.3.7 Test333 1.3.2.3.8 Continue support334 1.3.2.3.9 Test Stand335 1.3.2.3.9.1 Write requirements and specification do336 1.3.2.3.9.2 Design 337 1.3.2.3.9.3 Procure and assembly338 1.3.2.3.9.4 Material procured339 1.3.2.4 Cables346 1.3.2.5 Crates352 1.3.2.6 Power supplies (low and high voltage)360 1.3.2.7 Trigger and Timing383 1.3.3 Production

Qtr 1 Qtr 2 Qtr 3 Qtr 4 Qtr 1 Qtr 2 Qtr 3 Qtr 4 Qtr 1 Qtr 22006 2007 2008

July 24, 2004 ANL Electronics Workshop, Schedule 9

MIE MilestonesLevel Milestone Description Completion

Date 1 CD-0: Approve Mission Need Aug 2003

(A) 1 CD-1: Approve Preliminary Baseline Range FY04 – Q21 CD-2A Approve Performance Baseline Range /CD-3A

Approve Start of Construction for Long Lead-time Items

FY05 – Q3

1 CD-2B/CD-3B MIE FY07 – Q41 CD-4: Approve Start of Operations FY10 – Q32 Complete Detector Test Procedures and Apparatus FY05 – Q12 Award Detector Module Contract FY05 – Q42 Complete Design and Drawings of Mechanical

Support Structure FY06 – Q1

2 Complete Test/Characterization of Detector Module 1 FY06 – Q32 Complete Test Digital Signal Processing Prototype

Module FY07 – Q1

2 Electronics and Computing Subsystem Ready for Prototype Assembly FY07 – Q3

2 Award Computer Farm Contract FY08 – Q12 Start Production of Digital Signal Processing Modules FY08 – Q22 Complete Mechanical Subsystem Production FY08 – Q32 Exercise Option to Purchase Last Detector Module FY09 – Q12 Production Electronics and Computing Subsystem

Ready for Final Assembly FY09 – Q3

July 24, 2004 ANL Electronics Workshop, Schedule 10

Enginnering Effort

• Requirement document– 0.04 FTE

• Prototype– 3 FTE

• Production– 1.4 FTE

• Installation– 0.4 FTE

July 24, 2004 ANL Electronics Workshop, Schedule 11

Names @ LBNL

– Sergio Zimmermann, design– Chinh Vu, design– Harold Yaver, design– Don Landis, consulting– Franco Manfredi, consulting (redirected)– Augusto Machievelli, specs, testing (redirected)– Mario Cromaz, specs, testing (partially redirected)– Fred Bieser, consulting (redirected)– Bryan Holmes, layout– Helen Chen, assembly and testing– Jimmie Johnson, procurement

July 24, 2004 ANL Electronics Workshop, Schedule 12

Names @ ANL

– John Weizeorick, design– Todd Hayden, layout– Rich Voogd, assembly – Mike T. Anthony, testing

July 24, 2004 ANL Electronics Workshop, Schedule 13

Instrumentation

– Logic state analyzer: 16900 series• 500 Msamples/sec• B4655A FPGA Dynamic Probe

July 24, 2004 ANL Electronics Workshop, Schedule 14

Instrumentation

– Oscilloscope @ LBNL• 4 GHz• Jitter and timing measurements software

– Oscilloscope @ ANL• LeCroy Wavepro 960 2

GHz Oscilloscope• Single 16 GS/s 4 Mpts• Quad 4 GS/s 1 Mpts• With the Jitter Timing and

Analysis Package

July 24, 2004 ANL Electronics Workshop, Schedule 15

Conclusion

• We have a preliminary baseline schedule and cost that was reviewed and approved by DOE

• We are organizing a group of physicists and engineers to take the task of designing the electronics for GRETINA.

• We are procuring the proper instrumentation to take this task.

• And we are supporting on the GRETINA R&D effort.

• We need to focus on the primary electronics requirement document.