electronics for you projects and ideas 2000 (malestrom)

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2000Electronics For

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I D E A S

P R O J E C T S&&EFYMore than 90 fully tested

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January

2000

C O N S T R U C T I O N

ARUP KUMAR SEN

TABLE IOrientation Test socket Test socket Test socket Base-Id Base-Id Collector-Id forNo. terminal 3 terminal 2 terminal 1 for npn for pnp pnp and npn1 C B E 02 05 042 C E B 01 06 043 E C B 01 06 024 E B C 02 05 015 B E C 04 03 016 B C E 04 03 02B=Base C=Collector E=Emitter Note: All bits of higher nibble are set to zero.

TABLE IIQ2 (MSB) Q1 Q0 (LSB)0 0 10 1 01 0 0

TABLE III. SET 1Q2 Q1 Q00 0 10 1 01 0 0

TABLE IV. SET 2Q2 Q1 Q01 1 0

T ransistor lead identification is cru-cial in designing and servicing. A cir-cuit designer or a serviceman must befully conversant with the types of tran-sistors used in a circuit. Erroneous leadidentification may lead to malfunctions,and, in extreme cases, even destructionof the circuit being designed or serviced.

Though transistor manufacturers en-capsulate their products in different pack-age outlines for identification, it is im-possible to memorise the outlines of in-numerable transistors manufactured bythe industry. Although a number ofmanuals are published, which provide pindetails, they may not always be acces-sible. Besides, it is not always easy tofind out the details of a desired transis-tor by going through the voluminousmanuals. But, a handy gadget, called tran-sistor lead identifier, makes the job easy.All one has to do is place the transistorin the gadgets socket to instantly get thedesired information on its display, irre-spective of the type and package-outlineof the device under test.

A manually controlled version of thepresent project had been published in June84 issue of EFY. The present model is to-tally microprocessor controlled, and henceall manually controlled steps are replacedby software commands. A special circuit,shown in Fig. 1, which acts as an interfaceto an 8085-based microprocessor kit, hasbeen developed for the purpose.

BasecointioprE) poAs

current enters only through the base. But,in case of a pnp device, current flowsthrough the collector as well as the emit-ter leads.

During testing, when leads of thetransistor under test are connected toterminals 1, 2, and 3 of the test socket(see Fig.1), each of the leads (collector,base, and emitter) comes in series withone of the current directions indicatingLEDs (D2, D4, and D6) as shown in Fig. 1.Whenever the current flows toward a par-ticular junction through a particular lead,the LED connected (in proper direction) tothat lead glows up. So, in case of an npn-device, only the LED connected to the baselead glows. However, in case of a pnp-device, the other two LEDs are lit. Now, if

a glowing LED corresponds to binary 1, anLED that is off would correspond to binary0. Thus, depending upon the orientationof the transistor leads in the test socket,we would get one of the six hexadecimalnumbers (taking LED connected to termi-nal 1 as LSB), if we consider all higherbits of the byte to be zero. The hexadeci-mal numbers thus generated for an npn

generated with Table I, a microprocessorcan easily indicate the type (npn or pnp)and the base of the device under test,with respect to the test socket terminalsmarked as 1, 2, and 3. The logic num-bers, comprising logic 1 (+5V) and logic 0(0V), applied to generate the base-Id, arethree bit numbers100, 010, and 001. Thesenumbers are applied sequentially to theleads through the testing socket.

Collector identification. When thebase-emitter junction of a transistor is for-ward-biased and its base-collector junctionis reverse-biased, conventional currentflows in the collector-emitter/emitter-col-lector path (referred to as C-E path in sub-sequent text), the magnitude of which de-pends upon the magnitude of the base cur-rent and the beta (current amplificationfactor in common-emitter configuration) ofthe transistor. Now, if the transistor is bi-ased as above, but with the collector andemitter leads interchanged, a current ofmuch reduced strength would still flow inthe C-E path. So, by comparing these twocurrents, the collector lead can be easilyidentified. In practice, we can apply properbinary numbers (as in case of the base iden-tification step mentioned earlier) to the de-vice under test to bias the junctions se-quentially, in both of the aforesaid condi-

RUPANJANA

se and type identification. When amiconductor junction is forward-biased,nventional current flows from the sourceto the p-layer and comes out of the junc-n through the n-layer. By applyingoper logic voltages, the base-emitter (B-or base-collector (B-C) junction of a bi-

and pnp transistor for all possible orien-tations (six) are shown under columns 5and 6 of Table I. Column 5 reflects theBCD weight of B (base) position while col-umn 6 represents 7s complement of thecolumn 5 number.

We may call this 8-bit hexadecimal

1 0 10 1 1

lar transistor may be forward-biased. a result, if the device is of npn type,

number base identification number or, inshort, base-Id. Comparing the base-Id,

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r tions. As a result, the LEDs con-nected to the collector and emit-ter leads start flickering alter-nately with different bright-ness. By inserting a resistor inseries with the base, the LEDglowing with lower brightnesscan be extinguished.

In the case of an NPN de-vice (under normal biasingcondition), conventional cur-rent flows from source to thecollector layer. Hence, the LEDconnected to the collector onlywould flicker brighter, if aproper resistor is inserted inseries with the base. On theother hand, in case of a pnpdevice (under normal biasingcondition), current flows fromsource to the emitter layer. So,only the LED connected to theemitter lead would glowbrighter. As the type of deviceis already known by the base-Id logic, the collector lead canbe easily identified. Thus, fora particular base-Id, positionof the collector would be indi-cated by one of the two num-bers (we may call it collector-Id) as shown in column 7 ofTable I.

Error processing. Dur-ing collector identification fora pnp- or an npn-device, if thejunction voltage drop is low(viz, for germanium transis-tors), one of the two currentsin the C-E path (explainedabove) cannot be reduced ad-equately and hence, the datamay contain two logic-1s. Onthe other hand, if the devicebeta is too low (viz, for powertransistors), no appreciablecurrent flows in the C-E path,and so the data may not con-tain any logic-1. In both thecases, lead configuration can-not be established. The rem-edy is to adjust the value ofthe resistor in series with thebase. There are three resistors(10k, 47k, and 100k) to choosefrom. These resistors are con-nected in series with the test-ing terminals 1, 2, and 3 re-spectively. The user has to ro-tate the transistor, orienting

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Fig. 2: Effective biasing of PNP transistors using set 1 binary numbers

Fig. 3: Effective biasing of NPN transistors using set 2 binary numbers

the base in different terminals (1, 2, or 3)on the socket, until the desired results areobtained. To alert the user about this ac-tion, a message Adjust LED blinks on thedisplay (refer error processing routine inthe software program).

The binary number generator. In thissection, IC1 (an NE555 timer) is used as aclock pulse generator, oscillating at about45 Hz. The output of IC1 is applied to clockpin 14 of IC2 (4017-decade counter). As aresult, the counter advances sequentiallyfrom decimal 0 to 3, raising outputs Q0, Q1,and Q2 to logic-1 level. On reaching thenext count, pin 7 (output Q3) goes high andit resets the counter. So, the three outputs(Q0, Q1, and Q2) jointly produce three binarynumbers, continuously, in a sequentialmanner (see Table II).

Q0 through Q2 outputs of IC2 are con-

nected to in-puts of IC3(7486, quad 2-input EX-ORgate). Gatesof IC3 are sowired thatthey functionas controlledEX-OR gates.The outputso f IC3 arecontrolled bythe logic levelat pin 12.Thus, we ob-tain two setsof outputs(marked Q0,Q1, and Q2)from IC3 asgiven inTables III(for pin 12 atlogic 1) andIV (for pin 12at logic 0) re-spectively.

One ofthese twosets would bechosen forthe output bythe software,by control-ling the logi-cal state of

pin 12. Set-1 is used to identify the baseand type (npn or pnp) of the transistorunder test, whereas set-2 is exclusivelyused for identification of the collector lead,if the device is of npn type.

The interface. The three data out-put lines, carrying the stated binary num-bers (coming from pins 3, 6, and 8 of IC3),are connected separately to three bi-di-rectional analogue switches SW1, SW2, andSW3 inside IC5 (CD4066). The other sides ofthe switches are connected to the termi-nals of the test socket through some othercomponents shown in Fig. 1. The controlline of IC3 (pin 12) is connected to theanalogue switch SW4 via pin 3 of IC5. Theother side of SW4 (pin 4) is grounded. Ifswitch SW4 is closed by the software,set-1 binary numbers are applied to thedevice under test, and when it is open,set-2 binary numbers are applied.

To clearly understand the function-ing of the circuit, let us assume that the

transistor under test is inserted with itscollector in slot-3, the base in slot-2, andthe emitter in slot-1 of the testing socket.

Initially, during identification of thebase and type of the device, all the ana-logue switches, except SW4, are closed bythe software, applying set-1 binary num-bers to the device. Now, if the device is ofpnp type, each time the binary number100 is generated at the output of IC3, theBC junction is forward-biased, and hence,a conventional current flows through thejunction as follows:

Q2 (logic 1)SW3R9internal LED ofIC4slot3collector leadCB junction base lead slot-2D3 pin 10 ofIC5SW2Q1 (logic 0).

Similarly, when the binary number 001is generated, another current would flowthrough the BE junction and the internalLED of IC7. The number 010 has no effect,as in this case both the BC and BE junc-tions become reversed biased.

From the above discussion it is ap-parent that in the present situation, asthe internal LEDS of IC4 and that of IC7 areforward-biased, they would go on produc-ing pulsating optical signals, which wouldbe converted into electrical voltages bythe respective internal photo-transistors.The amplified pulsating DC voltages areavailable across their emitter resistors R7and R17 respectively. The emitter follow-ers configured around transistors T1 andT3 raise the power level of the opto-couplers output, while capacitors C3 andC5 minimise the ripple levels in the out-puts of emitter followers.

During initialisation, 8155 is configuredwith port A as an input and ports B and Cas output by sending control word 0E(H)to its control register.

Taking output of transistor T1 asMSB(D2), and that of T3 as LSB(D0), the datathat is formed during the base identifica-tion, is 101 (binary). The microprocessorunder the software control, receives thisdata through port A of 8155 PPI (port num-ber 81). Since all the bits of the highernibble are masked by the software, thedata become 0000 0101=05(H). This data isstored at location 216A in memory andtermed in the software as base-Id.

Now, if the device is of npn type, theonly binary number that would be effec-tive is 010. Under the influence of thisnumber both BC and BE junctions wouldbe forward-biased simultaneously, andhence conventional current would flow inthe following two paths:

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Fig. 4: Schematic circuit of special display system

(i)Fig. 5: Flowcharts for the main program and various subroutines

(ii) (iii)

1. Q1 (logic 1)SW2R14internalLED (IC6)slot-2base leadBC junctioncollector leadslot-3D1SW3Q2(logic 0)

2. Q1 (logic 1)SW2R14internalLED (IC6)slot-2base leadBE junctionemitter leadslot 1D5SW1Q0(logic 0)

Thus, only the internal LED of IC6would start flickering, and the data thatwould be formed at the emitters of thetransistors is also 010. Accordingly, thebase-Id that would be developed in thiscase is 0000 0010=2(H).

Since, under the same orientation ofthe transistor in the socket, the base-Idsare different for a pnp and an npn device,the software can decode the type of thedevice.

In a similar way we can justify theproduction of the other base-Ids, whentheir collector, base, and emitter are in-serted in the testing socket differently.

Once the base-Id is determined, thesoftware sends the same number for apnp-device (here=05(H)) through port C(port number 83), with the bit formatshown in Table V.

As a result, the control input of SW2(pin 12 of IC5) gets logic 0. So the switch

opens to insert resistor R5 in series withthe base circuit. This action is neces-sary to identify the emitter (and hencethe collector) lead as described earlierunder Principle sub-heading.

On the contrary, since an npn-de-

LT543

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Fig. 5 (v)

Fig. 5 (iv)

vice uses the set-2 binary numbers foridentification of the collector (hence theemitter), the same number (base-Id) ob-tained during base identification cannotbe sent through port C, if the device un-der test is of npn type. The base-Id foundmust be EX-ORed first with OF (H). Sincethe base-Id found here is 02 (H), the datato be sent through port C in this casewould be as shown in Table VI.

Note that PC3 becomes logic-1, whichwould close switch SW4 to get the set-2binary numbers.

Once resistor R5 is inserted in the basecircuit, and set-1 binary numbers are ap-plied to the device (pnp type), it would bebiased sequentially in three distinct ways,of which only two would be effective. Thesame are shown in Fig. 2.

In case of binary number 100, the cur-rent through the internal LED of IC4 woulddistinctly be very low compared to thecurrent flowing during number 001,through the internal LED of IC7. If R5 is ofsufficiently high value, the former cur-rent may be reduced to such an extentthat the related LED would be off. Hence,the data that would be formed at the emit-

ters of transistors T1-T3would be 001. It would bemodified by the software to0000 0001=01(H). This istermed in the software asemitter-Id and is stored atmemory location 216B.

On the other hand, ifthe device is of npn type,set-2 binary numbers areto be applied to it, and thetransistor would be biasedas shown in Fig. 3. Here,only the internal LED of IC4would flicker. So, the dataat the output would be100=04(H). This is termed inthe software as collector-Id,and is stored in memory lo-cation 216C. (In case of pnp-device, the collector-Id is determinedmathematically by subtracting the Base-Id from the emitter-Id.)

So the result could be summarised as:pnp type:Base-Id = 05(H), Collector-Id = 01(H).npn type:Base-Id = 02(H), Collector-Id = 01(H).

DISPLAY ROUTINE USING ALTERNATIVE CIRCUIT OF FIG. 4TABLE V

PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC00 0 0 0 0 1 0 1

TABLE VIPC7 PC6 PC5 PC4 PC3 PC2 PC1 PC00 0 0 0 1 1 0 1

With this result, the software wouldpoint to configuration CBE in the datatable, and print the same on the display.By a similar analysis, lead configurationfor any other orientation of the device inthe test socket would be displayed by thesoftware, after finding the related base-and collector-Id.

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PARTS LISTSemiconductors:IC1 - NE555, timerIC3 - CD4017, decade counter-de-

coderIC3 - 7486, quad EX-OR gatesIC4,IC6,IC7 - MCT2E, optocouplerIC5 - CD4066, quad bilateral switchIC8 - LM7805, 3-terminal +5V

regulatorT1,T2,T3 - BC147, npn transistorD1,D3,D5 - 1N34, point contact diodeD2,D4,D6 - LED, 5mmD7,D8 - 1N4002, rectifier diodeResistors (All watt +/- 5% metal/carbon filmunless stated otherwise)R1,R9,R10,R14,R15,R19,R20 - 1 kilo-ohmR2 - 33 kilo-ohmR5 - 47 kilo-ohmR4,R11,R16,R21 - 10 kilo-ohmR3,R6,R7,R12,R17 - 100 kilo-ohmR8,R13,R18 - 680 ohmCapacitors:C1 - 0.5F polysterC2 - 0.1F polysterC3-C5 - 220F/12V electrolyticC6 - 0.22F polysterC7 - 1000F/12V electrolyticMiscellaneous:X1 - 230V/9V-0-9V, 250mA power

transformer

Fig. 6: Actual-size, single-sided PCB layout for the circuit in Fig. 1

Fig. 7: Component layout for the PCB

The Display. The display proceduredescribed in this article is based on IC8279 (programmable keyboard/display in-terface) which is used in the microproces-sor kit. The unique feature of the 8279-based display system is that, it can runon its own. You just have to dump thedata to be displayed on its internal RAM,and your duty is over. 8279 extracts thisdata from its RAM and goes on displayingthe same without taking any help or con-suming the time of the microprocessor inthe kit.

Unfortunately, not all the micropro-cessor kits present in the market are fit-ted with this IC. Instead, some of themuse a soft-scan method for display pur-pose. Hence, the stated procedure cannotbe run in those kits. Of course, if themonitor program of the kit is to be used,which may have an in-built display rou-tine to display the content of four spe-cific memory locationsall at a time, thesame may be used in place of the present

display procedure.Note: Display subroutine at address

20FC used at EFY, making use of the moni-tor program of the Vinytics 8085 kit, dur-ing program testing, is listed towards theend of the software program given by theauthor. To make use of the authors dis-play subroutine, please change the codeagainst CALL DISPLAY instruction (codeCDFC 20) everywhere in the program tocode CD 40 21 for 8279 based display orcode CD 07 21 for alternate display referredin the next paragraph.

Alternatively, one can construct a spe-cial display system using four octal D-type latches (74373) and four seven-seg-ment LED displays (LT543). Only one latchand one display has been shown in theschematic circuit of Fig. 4 along with itsinterface lines from 8155 or 8255 of thekit. To drive this display, a special soft-scan method explained in the followingpara has to be used.

The soft scan display procedure.

The procedure extracts the first data tobe displayed from memory. The startmemory address of the data to be dis-played is to be supplied by the callingprogram. This data (8-bit) is output fromport B of 8155/8255 PPI (after proper codingfor driving the seven-segment displays),used in the kit. Data lines are connectedin parallel to all the octal latches. Butonly one of the four latches is enabled(via a specific data bit of port C of 8155/8255) to receive the data and transfer thesame to its output to drive the correspond-ing seven-segment LED display. To enablea particular latch, a logic 1 is sent througha particular bit of port C (bit 4 here, forthe first data) by the software. Subse-quently, logic 0 is sent through that bitto latch the data transferred. The pro-gram then jumps to seek the second datafrom memory, and sends the samethrough port B as before. However, in thiscase logic 1 is sent through bit 3 of portC, to latch the data to the second seven-segment LED display, and so on.

Register B of 8085 is used as a counter,and is initially stored with the binarynumber 00001000 (08H). Each time a data islatched, the logic 1 is shifted right by oneplace. So, after the fourth data is latched,the reg. B content would be 0000 0001. Shift-

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2087 E607 ANI 07H Checks only first three bits2089 EAA021 JPE ERR If 2 bits are at logic-1 jumps to 21A0208C 326C21 STA 216CH Store the No. (Collector-Id)into mem.208F C39220 JMP P4 Jumps to select lead configuration

;Lead configuration selection program2092 216A21 P4: LXI H,216AH Extracts Base-Id from memory location2095 7E MOV A,M 216A to the accumulator2096 FE05 CPI 05H If the number is 05,2098 CABA20 JZ P4A jumps to subroutine 4A209B FE06 CPI 06H If the number is 06,209D CAD020 JZ P4B jumps to the subroutine 4B20A0 FE03 CPI 03H If the number is 03,20A2 CAE620 JZ P4C jumps to the subroutine 4C20A5 FE02 CPI 02H If the number is 02,20A7 CABA20 JZ P4A jumps to the subroutine 4A20AA FE01 CPI 01H If the number is 06,20AC CAD020 JZ P4B jumps to the subroutine 4B20AF FE04 CPI 04H If the number is 04,20B1 CAE620 JZ P4C jumps to the subroutine 4C20B4 CDFC20 M: CALL DISPLAY Jumps to display the lead configuration

selected in P4A or P4B or P4C20B7 C30020 JMP MAIN Jumps back to start

;Lead configuration selection (Base Id.=05 or 02)20BA 216C21 P4A: LXI H,216CH Extracts Collector-Id from memory

location20BD 7E MOV A,M 216C to the accumulator20BE FE01 CPI 01H If it is = 01, jumps to 20CA20C0 CACA20 JZ E If it is = 04, points to lead

configuration EbC20C3 217521 LXI H,2175H in data table20C6 C3B420 JMP M Jumps to display the lead

configuration pointed20C9 00 NOP NOP20CA 217121 E: LXI H,2171H Points to lead config.CbE and jumps20CD C3B420 JMP M display the configuration

;Lead configuration selection (Base Id.= 06 or 01)20D0 216C21 P4B: LXI H,216CH Extracts Collector-Id from memory

location20D3 7E MOV A,M 216C to the accumulator20D4 FE02 CPI 02H If it is STE02, jumps to 20E020D6 CAE020 JZ B I If it is =04, points to lead20D9 217D21 LXI H,217DH configuration bEC in data table20DC C3B420 JMP M Jumps to display the lead

configuration pointed20DF 00 NOP No oPeration20E0 217921 B: LXI H,2179H Points to lead configuration bCE20E3 C3B420 JMP M and jumps display the configuration

;Lead configuration selection (Base Id.=03 or 04)20E6 216C21 P4C: LXI H,216CH Extracts Collector-Id from memory

location20E9 7E MOV A,M 216C to the accumulator20EA FE01 CPI 01H If it is =01, jumps to 20F620EC CAF620 JZ C If it is =02, points to lead20EF 218121 LXI H,2181H configuration ECb in data table20F2 C3B420 JMP M Jumps to display the lead20F5 00 NOP configuration pointed; no operation20F6 218521 C: LXI H,2185H Points to lead configuration CEb20F9 C3B420 JMP M and jumps to display the configuration

;Display routine using 8279 of the kit (if present)2140 0E04 MVI C,03 Sets the counter to count 4 characters2142 3E90 MVI A,90 Sets cont.8279 to auto-incr. mode2144 320160 STA 6001 Address of 8279 cont. reg.=60012147 7E MOV A,M Moves 1st data character from mem.

Loc. pointed to by calling instruction.2148 2F CMA Inverts data (refer note below)2149 320060 STA,6000 Stores data in 8279 data reg.

(addr=6000)214C 0D DCR C Decrements counter214D CA5421 JZ 2154 Returns to calling program if count=02150 23 INX H Increments memory pointer2151 C34721 JMP2147 Jumps to get next character from

memory2154 C9 RET Returns to the calling program

Note: In the microprocessor kit used, data is inverted before feeding the 7-seg display.

;Alternative Display Subroutine to be used with interface circuit of Fig. 42107 0608 MVI B,08H Store 0000 1000 in reg.B2109 3E00 MVI A,00H Out 00H through Port C to latch data

in all

Memory Map And Software listing in 8085 Assembly LanguageRAM Locations used for program :2000H - 21BBHStack pointer initialised :2FFFHMonitor Program :0000H - 0FFFHDisplay Data Table :2160H - 219AHControl/Status Register of 8155 :80HPort A (Input) of 8155 :81HPort B (Output) of 8155 :82HPort C (Output) of 8155 :83H

Address Op Code Label Mnemonic Comments;Initialisation, base and type identification2000 31FF2F MAIN: LXI SP,2FFFH Initialisation of the ports. A as the2003 3E0E MVI A,0EH input and C as the output port.2005 D380 OUT 80H Sends 07 through port C to make SW1,2007 3E07 MVI A,07H SW2, SW3 ON and SW4 OFF.2009 D383 OUT 83H Time delay should be allowed before200B CD3320 CALL DELAY measuring the logic voltages across200E CD3320 CALL DELAY capacitors C1, C2, and C3, so that2011 CD3320 CALL DELAY they charge to the peak values.2014 AF XRA A Clears the accumulator2015 DB81 IN 81H Input data from interface through.portA 2017E607 ANI 07H Test only first 3 bits, masking others2019 326A21 STA 216AH Stores the number in memory.201C CA2A20 JZ P If the number is zero jumps to 202A201F EA3D20 JPE P2 If the number has even no. of 1s,

jumps to 203D (refer note 2)2022 E26820 JPO P3 If the number has odd no. of 1s, jump

to 2068 (refer note 1)2025 00 NOP No operation2026 00 NOP No operation2027 00 NOP No operation2028 00 NOP No operation2029 00 NOP No operation202A 218921 P: LXI H,2189H Points to message PUSH in data

table202D CDFC20 CALL DISPLAY Displays the message2030 C30020 JMP MAIN Jumps to start.

;Delay sub-routine2033 11FFFF DELAY: LXI D,FFFFH Loads DE with FFFF2036 1B DCX D Decrements DE2037 7A MOV A,D Moves result into Acc.2038 B3 ORA E OR E with Acc.2039 C23620 JNZ 2036 If not zero, jumps to 2036203C C9 RET Returns to calling program

;Collector identification program for PNP transistors203D 216A21 P2: LXI H,216AH Points of Base-Id in data table2040 7E MOV A,M Extracts the number to the

accumulator2041 D383 OUT 83H Send the number to the interface2043 216021 LXI H,2160H Points to message PnP in data table2046 CDFC20 CALL DISPLAY Displays the message2049 CD3320 CALL DELAY Waits for few moments204C CD3320 CALL DELAY Waits for few moments204F CD3320 CALL DELAY Waits for few moments2052 AF XRA A Clears the accumulator2053 DB81 IN 81H Seeks data from the interface2055 E607 ANI 07H Masks all bits except bits 0,1 and 22057 EAA021 JPE ERR If the data contains even no. of 1s

jumps to error processing routine205A 326B21 STA 216BH Stores the data (Emitter-Id) in memory205D 47 MOV B,A Moves the Emitter-Id. to B register205E 3A6A21 LDA 216AH Extracts Base-Id from memory2061 90 SUB B Subtracts Emitter-Id from Base-Id2062 326C21 STA 216CH Stores the result(Collector-Id)in mem. 2065 C39220 JMP P4 Jumps to select lead configuration

;Collector identification program for NPN transistors2068 216A21 P3: LXI H,216AH Points to Base-Id in data table206B 7E MOV A,M Extract the number to the accumulator206C FE07 CPI 07H Refer note 1206E CAB621 JZ ER Jumps to error processing routine2071 EE0F XRI 0FH Refer note 22073 D383 OUT 83H Send the number to the interface2075 216421 LXI H,2164H Points to the message nPn2078 CDFC20 CALL DISPLAY Displays the same207B CD3320 CALL DELAY Waits for few moments207E CD3320 CALL DELAY Waits for few moments2081 CD3320 CALL DELAY Waits for few moments2084 AF XRA A Clears the accumulator2085 DB81 IN 81H Seeks data from the interface

Address Op Code Label Mnemonic Comments

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210B D383 OUT 83H 74373s. (no data would move to O/Ps)210D 7E MOV A,M Moves the 1st char. Of the data

pointed, to the accumulator (mem.address given by

210E D382 OUT 82H calling program)2110 78 MOV A,B By moving out reg.B data throgh port

C2111 D383 OUT 83H a specific latch is enabled.2113 1F RAR Logic 1 of counter data moves right 1

bit2114 FE00 CPI 00H Checks to see logic 1 moves out from

acc.2116 CA2121 JZ 2121H (All 4 data digits latched)to return to

the calling program.2119 47 MOV B,A Else stores back new counter data to B

reg.211A CD3320 CALL DELAY211D 23 INX H Memory pointer incremented by 1211E C30921 JMP 2109H Jumps to the next character from the

table2121 C9 RET Returns to the calling program

;Error Sub-routine21A0 219121 ERR: LXI H,2191H Points to the message Adj. in memory21A3 CDFC20 CALL DISPLAY Calls the display routine to display the

same21A6 CD3320 CALL DELAY Waits21A9 CD3320 CALL DELAY Waits21AC 219621 LXI H,2196H Points to the message LEAd in

memory21AF CDFC20 BAD: CALL DISPLAY Calls the display routine to display21B2 C30020 JMP MAIN Jumps back to start21B5 00 NOP No operation21B6 218D21 ER: LXI H,218DH Points to message bAd in the data

table21B9 C3AF21 JMP BAD Jumps to display the message

Data table:Addr. Data Display Addr. Data Display Addr. Data Display2160 37 P 2179 C7 b 2189 37 P2161 45 n 217A 93 C 218A E3 U2162 37 P 217B 97 E 218B D6 S2163 00 217C 00 218C 67 H

2164 45 n 217D C7 b 218D C7 b2165 37 P 217E 97 E 218E 77 A2166 45 n 217F 93 C 218F E5 d2167 00 2180 00 2190 00216A Base-id (store) 2181 97 E 2191 7 a216B Emitter-id (store) 2182 93 C 2192 E5 d216C Collector-id (store) 2183 C7 b 2193 E1 J2171 93 C 2184 00 2194 002172 C7 b 2185 93 C 2196 83 L2173 97 E 2186 97 E 2197 97 E2174 00 2187 C7 b 2198 77 A2175 97 E 2188 00 2199 E5 D2176 C7 b 219A 002177 93 C2178 00

Address of routines/labels:MAIN 2000 P 202A DELAY 2033 D 2036P2 203D P3 2068 P4 2092 M 20B4P4A 20BA E 20CA P4B 20D0 B 20E0P4C 20E6 C 20F6 DISPLAY 20FC ERR 21A0BAD 21AF ER 21B6

Notes:1. During Base identification, if the data found has odd parity, only then the program

jumps to this routine (starting at 2068 at P3:) for collector identification. A single logic-1denotes a good transistor, whereas three logic-1 (i.e. Base-Id = 07) denote a bad transistorwith shorted leads. Hence the program jumps to error processing routine to display themessage bAd.

2. The purpose of sending the Base-Id number to the interface through Port-C, is toinsert a resistor in series with the Base (as indicated in the principle above). The logic-1(s) ofthe Base-Id, set the switches connected with the collector and emitter leads to ON, and thatwith the base to OFF. The result is, the resistor already present in the base circuit (10K,47K or 100K which one is applicable), becomes active. To achieve this result, the Base-Idfound for an NPN device is to be inverted first.

;Display subroutine used by EFY using monitor program of Vinytics kit.20FC C5 DISPLAY: PUSH B20FD 3E00 MVI A,0H20FF 0600 MVI B,0H2101 7E MOV A,M2102 CDD005 CALL 05D0H2105 C1 POP B2106 C9 RET

Address Op Code Label Mnemonic Comments Addr. Data Display Addr. Data Display Addr. Data Display

TABLE VII; Modification to Collector Identification Program for pnp Transistors

Address Op Code Label Mnemonic Comments203D 216021 P2: LXI H,2160H Points to message PnPin data table2040 CDFC20 CALL DISPLAY Displays the message2043 216A21 LXI H,216AH Points to Base-Id in data table2046 7E MOV A,M Extract the number to the accumulator2047 D383 OUT 83H Send number via port C to interface

TABLE VIII; Modification to Collector Identification Program for npn Transistors

Address Op Code Label Mnemonic Comments2068 216421 P3: LXI H,2164H Points to the message nPn206B CDFC20 CALL DISPLAY Displays the same on display.206E 216A21 LXI H,216AH Points to Base-Id in DATA table2071 7E MOV A,M Extract the number to the accumulator2072 FE07 CPI 07H Refer note.1 (see original program.)2074 CAB621 JZ ER Jumps to error processing routine2077 EE0F XRI 0FH Refer note.2 (see original program.)2079 D383 OUT 83H Send number to interface (via port C)

ing operation is done after first movingthe data from the register to the accumu-lator, and then storing the result backinto the register once again if the zeroflag is not set by the RAR operation.

Now, with the reg. B content = 0000 0001,one more shifting of the bits towards rightwould make the accumulator content =0000 0000, which would set the zeroflag. And hence the program would jump

back to the calling one. It would be inter-esting to note the same reg. B content (abinary number comprising a logic 1) issent through port C to enable the particu-lar latch.

Since the base Id numbers and thecode to enable a specific latch are sentthrough the same port (port C) in thealternate display, the base Id must besent first for displaying the message PnP/nPn. Therefore changes or modificationsare required in the original program per-taining to collector identification programfor pnp transistors (at locations 203Dthrough 2048) and npn transistors (at lo-cations 2068 through 207A) as given inTables VII and VIII respectively.

Software flow charts. Software flowcharts for main program and various sub-routines are shown in Fig. 5.

PCB and parts list are included onlyfor the main interface diagram of Fig. 1.The actual-size, single-sided PCB for thesame is given in Fig. 6 while its compo-nent layout is shown in Fig. 7.

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The analogue technology is givingway to the digital technology asthe latter offers numerous advan-tages. Digital signals are not only freefrom distortion while being routed fromone point to another (over various me-dia), but error-correction is also possible.Digital signals can also be compressedwhich makes it possible to store hugeamounts of data in a small space. Thedigital technology has also made remark-able progress in the field of audio andvideo signal processing.

Digital signal processing is beingwidely used in audio and video CDs and CDplaying equipment. These compact diskshave brought about a revolution in thefield of audio and the video technology. Inaudio CDs, analogue signals are first con-verted into digital signals and then storedon the CD. During reproduction, the digi-

tal data, read from the CD, is reconvertedinto analogue signals. In case of video sig-nals, the process used for recording andreproduction of data is the same as usedfor audio CDs. However, there is an addi-tional step involvedboth during record-ing as well as reproduction of the digitalvideo signals on/from the compact disk.This additional step relates to the com-pression of data before recording on theCD and its decompression while it is beingread. As video data requires very largestorage space, it is first compressed usingMPEG- (Motion Picture Expert Group) com-patible software and then recorded on theCD. On reading the compressed video datafrom the CD, it is decompressed and passedto the video processor. Thus with the helpof the compression technique huge amountof video data (for about an hour) can bestored in one CD.

PARTS LIST-1Semiconductors:IC1 - LM7805 voltage regulator +5V

Resisters (All W, 5% metal/carbon film,unless stated otherwise):

R1 - 68 ohmR2, R3 - 1 kilo-ohmVR1 - 100 ohm cermet (variable resistor)

Capacitors:C1 - 1F paper (unipolar)C2 - 10F, 16V electrolytic

Miscellaneous:X1 - 230V AC primary to 12V-0-12V, 1A sec.

transformerS1, S2 - Push-to-on tactile switch

- MPEG decoder card (Sony Digital Tech.)- TV modulator (optional)- AF plugs/jacks (with screened wire)- Co-axial connectors, male/female- Co-axial cable

G.S. SAGOO

An audio CD player, which is used to playonly audio CDs, can be converted to playthe video CDs as well. Audio CD playershave all the required mechanism/functionsto play video CDs, except an MPEG card,which is to be added to the player. ThisMPEG card is readily available in the mar-ket. This MPEG card decompresses the dataavailable from the audio CD player and con-verts it into proper level of video signalsbefore feeding it to the television.

Step-by-step conversion of audio CD playerto video CD player is described with refer-ence to Fig. 1.

Step 1. Connection of MPEG cardto TV and step-down power trans-former to confirm proper working ofthe MPEG card. Connect IC7805, a 5-volt regulator, to the

MPEG card. Please check for correct pinassignments.

Connect audio and video outputs of the

FiAu

PUNERJOT SINGH MANGATg. 1: Complete schematic layout and connection diagram for conversion ofdio CD to Video CD player Fig 2: Photograph of TV scene

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MPEG card to the audio/video input of TVvia jacks J7 and J11 respectively. Useonly shielded wires for these connections.

Check to ensure that the step-downtransformer provides 12-0-12 volts at1 ampere of load, before connecting itto the MPEG card. Connect it to the MPEGcard via jack J1.

Switch on the TV to audio/video modeof operation. Adjust the 100-ohm pre-set connected at the video output ofMPEG card to mid position.

Switch on the MPEG card by switchingon 230 volts main supply to the 12-0-12 volt transformer.

If everything works right, Sony DigitalTechnology will be displayed on thetelevision. The TV screen will displaythis for about 5 seconds before goingblank. Adjust the 100-ohm preset forproper level of video signals.

Step 2. Connections to audio CDplayer after confirmation of properfunctioning of MPEG card duringstep1. Open your audio CD player. Do this very

carefully, avoiding any jerks to the au-dio CD player, as these may damage theplayer beyond repair.

Look for the IC number in Table II (onpage 47) that matches with any IC inyour audio CD player.

After finding the right IC, note its RFEF MIN pin number from the Table I.

Follow the PCB track which leads away

form RF EFM in pin of the IC and findany solder joint (land) on this PCB track.Solder a wire (maximum half meter) tothis solder joint carefully. Other end ofthis wire should be joined to RF jack J2of the MPEG card.

Caution: Unplug the soldering ironform the mains before soldering thiswire because any leakage in the sol-dering iron may damage the audio CDplayer.

Another wire should be joined betweenthe ground of the audio CD player andthe ground of jack J2 of the MPEG card.

This finishes the connection of the MPEGcard to the audio CD player.

Step 3. Playing audio and video CDs. Switch on the power for the audio CD

player and the MPEG card. Put a video CD in the audio CD player

and press its play button to play thevideo CD.

After a few seconds the video picturerecorded on the CD will appear on thetelevision.

The play, pause, eject, rewind, forward,track numbers, etc buttons present onthe audio CD can be used to control thenew video CD player.

Now your audio CD player is capableof playing video CDs as well. You can con-nect a power amplifier to the MPEG cardto get a high-quality stereo sound. Theauthor tested this project on many audioplayers including Thompson Diskman and

Kenwood Diskman. A photograph of oneof the scenes in black and white is in-cluded as Fig. 2. (Please see its colouredclipping on cover page.)

No special PCB is required and hencethe same is not included.

The author has perferred to use SonyDigital Technology Card (against KD680 RF-35C of C-Cube Technology) because of manymore functions it provides.

Additional accessibility features of thiscard (Sony Digital Technology), as shownin Table I can be invoked by adding twopush-to-on switches between jack 8(J8) andground via 1K resistors (Fig 1). These willenhance the already mentioned functionsand facilities available on this card, eventhough it has not been possible to exploitthe card fully due to non-availability oftechnical details. I hope these additionswill help the readers get maximum mile-age from their efforts.

TABLE I

POSSIBLE EXTRA FUNCTIONS

S1 (mode switch) S2 (function switch)

Slow Discview Pal/NTSC Pal NTSCVol+ Volume UpVol- Volume DownKey+ Left volume downKey- Right volume downL/R/CH Left, Right, Mute, StereoPlay/Pause

and backward scan facility with 9-viewpictures, slow-motion play, volume andtone control and R/L (right/left) vocal.

Want to convert your audio com-pact disk player into video com-pact disk player. Here is asimple, economical but efficient add-on cir-cuit design that converts your audioCDplayer to video CD player.

Decoder card. The add-on circuit isbased on VCD decoder card, KD680 RF-3Sc,also known as MPEG card adopting MPEG-1 (Motion Picture Expert Group) stan-

dard, the international stan-dard specification for compress-ing the moving picture and au-dio, comprising a DSP (digitalsignal processor) IC chip, CL860from C-cube (Fig. 3). The VCDdecoder card features smallsize, high reliability, and lowpower consumption (currentabout 300ma) and real and gaycolours. This decoder card hastwo play modes (Ver. 1.0 andVer. 2.0) and also the forward

Note: The above mentioned functions can also be accessedusing remote control.

Fig. 3: Layout diagram of MPEG card from c-cube

K.N. GHOSH

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put (AV in) facility in their TV, can makeuse of a pre-assembled audio-video to RFconverter (modulator) module of 48.25MHzor 55.25 MHz (channel 2 or channel3),which is easily available in the market(refer Fig. 4). The audio and video signalsfrom the decoder card are suitably modu-lated and combined at the fixed TVchannels frequency in the RF modulator.The output from the modulator can be con-nected to antenna connector of a colourtelevision.

Power supply unit: The VCD decodercard and the RF modulator requires +5V and+12V regulated power supply

r e s p e c -tively. Sup-ply designuses two lin-ear regula-tors 7805 and7812 (Fig. 5).The voltageregulatorsfitted withTO 220-typeheat sinkshould bemounted onthe CDp l a y e renclosures

rear panel The circuitcan be wired on a gen-eral-purpose PCB.

I n s t a l l a t i o nsteps:

1. Find suitableplace in the enclosureof the audio CD player

for fixing the decoder card, RF modulator,and the power supply unit. Make appro-priate diameter holes and fix them firmly.

2. Make holes of appropriate dimen-sions on the rear panel for fixing socketsfor power supply and RF output.

3. Refer to Table II (Combined for Part-I and II) and confirm DSP chip type of theexisting audio CD player for EFM (eight tofourteenth modulation)/RF Signal (from op-tical pick-up unit of the audio CD player)pin number, connect EFMin wire to thispin.

4. Make all the connections as per Fig.6.

Text of articles on the above projectreceived separately from the two authorshave been been reproduced above so as tomake the information on the subject asexhaustive as possible. We are further

TABLE II

DSP ICs and their EFM RF pin numbers

DSP IC EFM DSP IC EFM/RF Pin /RF Pin

CXA 1372Q 32, 46CXA 1471S 18, 27CXA 1571S 18, 35AN 8370S 12, 31AN 8373S 9, 35AN 8800SCE 12AN 8802SEN 9TDA 3308 3LA 9200 35LA 9200 NM 36LA 9211 M 72HA 1215 8 NT 46, 72SAA 7210 3, 25(40 pin)SAA 7310 32(44 pin)SAA 7341 36, 38SAA 7345 8SAA 7378 15TC 9200 AF 56TC 9221 F 60TC 9236 AF 51,56TC 9284 53YM 2201/FK 76YM 3805 8YM 7121 B 76YM 7402 4, 71HD 49215 71HD 49233 19AFSUPD 6374 CU 23UPD 6375 CU 46M 50422 P 15M 50427 FP 15, 17M 504239 17M 515679 4M 51598 FP 20MN 35510 43M 65820 AF 17M 50423 FP 17CX 20109 20, 9SAA7311 25M50122P 15M50123 FP 17M50127 FP 17UPD6374 CV 3NM2210FK 76YM2210FK 76

cuit, digital to analogue converter, microcomputer interface, video signal proces-sor, and error detector, etc. Audio andvideo signals stored on a CD are in a high-density digital format. On replay, the digi-tal information is read by a laser beam

and converted into analoguesignals.

One can also use anotherVCD decoder card comprising anMPEG IC 680, from Technics, anda DSP IC chip, CXD2500, with pow-erful error-correction fromSony. Similarly, another card,KD2000-680RF comprising anMPEG IC chip, CL680 from Tech-nics and a DSP IC chip, MN6627from C-cube.

RF modulator. For thosewho do not have audio-video in-

KS 5950 5KS 5990, 5991 5KS 9210 B 5KS 9211 B E, 9212 5KS 9282 5, 66KS 9283 66KS 9284 66CXD 1125 QX 5CXD 1130 QZ 5CXD 1135 5CXD 1163 Q 5CXD 1167 R 36CXD 1167 Q/QE 5CXD 20109 9, 20CXD 2500 AQ/BQ 24CXD 2505 AQ 24

CXD 2507 AQ 14

CXD 2508 AQ 36CXD 2508 AR 36CXD 2509 AQ 34CXD 2515 Q 36, 38CXD 2518 Q 36LC 7850 K 7LC 7860 N/K/E 7, 8LC 7861 N 8LC 7862 30LC 78620 11LC 78620 E 11LC 7863 8LC 7865 8

LC 7866 E 7, 8LC 7867 E 8LC 7868 E 8LC 7868 K 8LC 78681 8MN 6617 74MN 6222 11MN 6625 S 41MN 6626 3, 62MN 6650 6MN 66240 44MN 66271 RA 44, 52MN 662720 44CXA 72S 18, 46CXA 1081Q 2, 27

PARTS LIST-2Semiconductors:IC1 - LM78L05, voltage regulator +5VIC2 - 78L12, voltage regulator +12VD1,D2 - 1N4001, rectifier diode

Capacitors:C1 - 2200F, 35V electrolyticC2,C3 - 100F, 16V electrolytic

Miscellaneous:- 230V AC primary to 18V-0-18V,

1A sec. transformer- MPEG decoder card (C-cube Digital

Tech.)- TV modulator (optional)- AF plugs/jacks (with screened wire)- Co-axial connectors, male/female- Co-axial cable

The decoder card converts your CD play-ers or video games to VCD player to givealmost DVD-quality pictures.

The decoder card mainly consists ofsync signal separator, noise rejection cir-

Fig. 4: Layout of TV RF modulator

Fig. 5: Power supply to cater for MPEG card and RF modulator

Fig. 6: Block diagram of connections to decoder card and codulator

jeetu16


served that frequently, the picture/frames froze on the CTV screen and thepower to the MPEG converter card had tobe switched off and on again. This faultwas attributed to inability of 7805 regu-lator to deliver the required current(about 300 mA) to the MPEG card. Theregulator circuit was therefore modifiedas shown in Fig. 7 to provide a bypasspath for current above 110 mA (approxi-mately). A step-down transformer of 9V-0-9V, 500mA is adequate if the modula-tor has its own power supply arrange-ment (refer paragraph 4 below).

4. RF modulator for TV channels E2and E3 are available in the market com-plete with step-down transformer, hencethere may not be any need to wire up a12V regulator circuit of part II.

5. Apart from the facilities (availablein the MPEG decoder card KD680RF-3SC fromC-cube) as explained by the author, thereare other facilities such as IR remote con-trol of the card functions (via Jack J5)and realisation of change-over betweenNTSC and PAL modes (via jack J4noconnections means PAL mode). Similarly,Jack J1 is meant for external audio andvideo input from exchange and connec-tion of audio and video outputs toCTV. The foregoing information is avail-able on document accompanying theMPEG decoder card. However, the detailedapplication/information is not providedand as such we have not tested thesefacilities.

6. EFM is a technique used for encod-ing digital samples of audio signals intoseries of pits and lands into the disc sur-face. During playback these are decodedinto digital representation of audio sig-nal and converted to analogue form us-ing digital-to-analogue converter for even-tual feeding to the loud speakers.

7. For those enthusiasts who wish torig-up their own video modulator, an ap-plication circuit from National Semicon-ductor Ltd, making use of IC LM2889,which is pin for pin compatible withLM1889 (RF section), is given in Fig 8.

Tech Editor

player part. The DSP chip, more often thannot, would be a multipin SMT device. Inthe AIWA system we located two such chips(LA9241M and LC78622E both from Sanyo).Their data-sheets, picked up from theInternet, revealed the former chip to be anASP (analogue signal processor) and latterone (LA78622E) is the CD player DSP chip forwhich EFMIN is not found in Table I. Forthis chip EFMIN pin is pin 10 while pin 8 isthe nearest digital ground pinswhich we

used.2. Of the two converter cards

(one displaying Sony DigitalTechnology' and the other dis-playing C-cube Technologyon the CTV screen), the lattercard's resolution and colour qual-ity was found to be very goodwhen tested by us. The C-cubecard needs a single 5V DC supplyfor its operation.

3. During testing it was ob-

Fig. 8: Two channel video modulator with FM sound

Fig. 7: Modified 5V regulator for enhancing currentcapability

adding the following information whichwe have been able to gather during thepractical testing of the project at EFY.

1. There may be more than one PCBused in an audio CD player (i.e additionalfor FM radio and tape recorder functions)and even the DSP chips referred in Table1,may not figure on it. For example, we couldnot find the subject IC used in AIWA audioCD player. The PCB, which is located clos-est under the laser system, is related to CD

www.electronicsforu.coma portal dedicated to electronics enthusiasts

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C I R C U I T I D E A SCIRCUIT IDEAS

T can be connected in parallel to thetelephone instrument. The circuitprovides audio-visual indication ofon-hook, off-hook, and ringingmodes. It can also be used to con-nect the telephone to a CID (calleridentification device) through a re-lay and also to indicate tapping ormisuse of telephone lines by sound-ing a buzzer.

In on-hook mode, 48V DC supplyis maintained across the telephonelines. In this case, the bi-colour LEDglows in green, indicating the idlestate of the telephone. The value ofresistor R1 can be changed some-what to adjust the LED glow, with-out loading the telephone lines (bytrial and error).

In on-hook mode of the hand-set, potentiometer VR1 is so adjustedthat base of T1 (BC547) is forward bi-ased, which, in turn, cuts off transistor T2(BC108). While adjusting potmeter VR1, en-sure that the LED glows only in green andnot in red.

When the hand-set is lifted, the volt-age drops to around 12V DC. When this

he voltage across transistor T1sbase-emitter junction falls below its con-duction level to cut it off. As a result tran-

sistor pair T2-T3 starts oscillating and thepiezo-buzzer starts beeping (with switchS1 in on position). At the same time, thebi-colour LED glows in red.

In ringing mode, the bi-colour LEDflashes in green in synchronisation with

the telephone ring.A CID can be connected using a relay.

The relay driver transistor can be con-nected via point A as shown in the cir-cuit. To use the circuit for warningagainst misuse, switch S1 can be left inon position to activate the piezo-buzzerwhen anyone tries to tap the telephoneline. (When the telephone line is tapped,its like the off-hook mode of the tele-phone hand-set.)

Two 1.5V pencil cells can provide Vcc1power supply, while a separate power sup-

ply for Vcc2 is recommended to avoiddraining the battery. However, a single6-volt supply source can be used in con-junction with a 3.3V zener diode to caterto both Vcc2 and Vcc1 supplies.

Trigketocath

1756, connect line5 to C, line 6 to D, 3, 4, 8, and 9to by dotted lines in

YASH D. DOSHI

and D pads. The correct code sequence forenergisation of relay RL1 is realised byclocking points A, B, C, and D in that or-der. The five remaining switches are con-nected to reset pad which resets all theflip-flops. Touching the key pad switch A/B/C/D briefly pulls the clock input pin highand the state of flip-flop is altered. The Qoutput pin of each flip-flop is wired to Dinput pin of the next flip-flop while D pinof the first flip-flop is grounded. Thus, if

G.S. SAGOO

G.S. SAGOOhe circuit described here is of anelectronic combination lock fordaily use. It responds only to the

ht sequence of four digits that areyed in remotely. If a wrong key is

example, if the code is 1 to A, line 7 to B, line and rest of the lines2the reset pad as shownthe figure.his add-on device for telephones happens, t

RANJITH G. PODUVALuched, it resets the lock. The lock coden be set by connecting the line wires toe pads A, B, C, and D in the figure. For

The circuit is built around two CD4013dual-D flip-flop ICs. The clock pins of thefour flip-flops are connected to A, B, C,

correct clocking sequence is followed thenlow level appears at Q2 output of IC2 whichenergises the relay through relay driver

jeetu18

C I R C U I T I D E A S

transistor T1. The reset keysare wired to set pins 6 and8 of each IC. (Power-on-resetcapacitor C1 has been addedat EFY during testing as thestate of Q output is indeter-minate during switching onoperation.)

This circuit can be use-fully employed in cars sothat the car can start onlywhen the correct code se-quence is keyed in via thekey pad. The circuit can alsobe used in various other ap-plications.

Twmficthcuatanab

dethde

a reference potential set by preset VR1.The preset is so adjusted as to providean optimum threshold voltage so that out-put of IC2(a) is high when the door isclosed and low when the door is open.Capacitor C1 is connected at the outputto filter out unwanted transitions in out-JAYAN A.R.

F

G.S. SAGOOhis circuit is used to automate theworking of a bathroom light. It is

the door with a small sepa-ration between them asdesigned for a bathroom fittedith an automatic door-closer, where theanual verification of light status is dif-ult. The circuit also indicates whethere bathroom is occupied or not. The cir-it uses only two ICs and can be oper-ed from a 5V supply. As it does not usey mechanical contacts it gives a reli-le performance.

One infrared LED (D1) and one infraredtector diode (D2) form the sensor part ofe circuit. Both the infrared LED and thetector diode are fitted on the frame of

put voltage generated at the time of open-ing or closing of the door. Thus, at pointA, a low-to-high going voltage transitionis available for every closing of the doorafter opening it. (See waveform A in Fig.2.)

The second comparator IC2(b) does thereverse of IC2(a), as the input terminalsare reversed. At point B, a low level isavailable when the door is closed and it

shown in Fig. 1. The radia-tion from IR LED is blockedby a small opaque strip (fit-ted on the door) when thedoor is closed. Detector di-ode D2 has a resistance inthe range of meg-ohms whenit is not activated by IR rays.When the door is opened,the strip moves along withit. Radiation from the IR LEDturns on the IR detector di-ode and the voltage across

it drops to alow level.

C o m -p a r a t o rLM358 IC2(a)c o m p a r e sthe voltageacross thephotodetec-tor againstig. 1

Fig. 2

jeetu19


switches to a high level whenthe door is opened. (See wave-form B in Fig. 2.) Thus, a low-to-high going voltage transi-tion is available at point B forevery opening of the door,from the closed position. Ca-pacitor C2 is connected at theoutput to filter out unwantedtransitions in the output volt-age generated at the time ofclosing or opening of the door.

IC 7474, a rising-edge-sen-sitive dual-D flip-flop, is usedin the circuit to memorise theoccupancy status of the bath-room. IC1(a) memorises thestate of the door and acts asan occupancy indicator whileIC

laliin5 IC

thbaaofbp

McaLE

tosepplepfofu

CD

BC

closing of the door. (See waveform C inFig. 2.)

When the person exits the bathroom,

Fig. 32(b) is used to control the re-y to turn on and turn off the bathroomght. Q output pin 8 of IC1(b) is tied to D

The occupancy indicator red LED (D3) is offat this point of time, indicating that theroom is vacant.put pin 2 of IC1(a) whereas Q output pin

of IC1(a) is tied to D input pin 12 of1(b).

At the time of switching on power fore first time, the resistor-capacitor com-

ination R3-C3 clears the two flip-flops. As result Q outputs of both IC1(a) and IC1(b)re low, and the low level at the output IC1(b) activates a relay to turn on theathroom light. This operation is inde-endent of the door status (open/closed).

ost of the fluid level indicatorcircuits use a bar graph or aseven-segment display to indi-

te the fluid level. Such a display usingDs or digits may not make much sense an ordinary person. The circuit pre-nted here overcomes this flaw and dis-

lays the level using a seven-segment dis-laybut with a difference. It shows eachvel in meaningful English letters. It dis-lays the letter E for empty, L for low, Hr half, A for above average, and F forll tank .

The circuit is built using CMOS ICs.4001 is a quad. NOR gate and CD4055 is aD to seven-segment decoder and dis-

play driver IC. This decoder IC is capableof producing some English alphabets be-sides the usual digits 0 through 9. TheBCD codes for various displays are givenin Table I. The BCD codes are generatedby NOR gates because of their intercon-nections as the sensing probes get im-mersed in water. Their operation beingself-explanatory is not included here.

Note that there is no display patternlike E or F available from the IC. There-fore to obtain the pattern for letters Eand F, transistors T1 and T2 are used.These transistors blank out the unneces-sary segments from the seven-segmentdisplay. It can be seen that letter E is

generated by blanking b and c segmentsof the seven-segment display while it de-codes digit 8. Letter F is obtained byblanking segment b while it decodes let-ter P.

As CMOS ICs are used, the current con-

When a person enters the bathroom,the door is opened and closed, which pro-vides clock signals for IC1(b) (first) andIC1(a). The low level at point C (pin 5) isclocked in by IC1(b), at the time of open-ing the door, keeping the light status un-changed.

The high level point D (pin 8) isclocked in by IC1(a), turning on the occu-pancy indicator LED (D3) on at the time of

the door is opened again. The output ofIC1(b) switches to high level, turning offthe bathroom light. (See waveform D inFig. 2.) The closing of the door by thedoor-closer produces a low-to-high transi-tion at the clock input (pin 3) of IC1(a).This clocks in the low level at Q outputof IC1(b) point D to Q output of IC1(a)point C, thereby turning off the occupancyindicator.

TABLE ID C B A DISPLAYL L L L 0L L L H 1 2 3 4 5 6 7H L L L 8H L L H 9H L H L LH L H H HH H L L PH H L H AH H H L H H H H BLANK

THOMMACHAN THOMAS

RUPANJANA

jeetu20


supoteth

is of the order of 70 A, Note: This circuit should not be

TlepeThorritenastsyca

tr

mption is extremely low. This makes it mersed in water)

ssible to power the circuit from a bat-ry. The input sensing current throughe fluid (with all the four probes im-

which results in low rate of probe dete-rioration due to oxidation as also low lev-els of electrolysis in the fluid.

used with inflammable or highly reactivefluids.

his is an effective and usefulproject for educational institu-tions. In most schools and col-

ges, the peon rings the bell after everyriod (usually of a 40-minute duration).e peon has to depend on his wrist watch

clock, and sometimes he can forget tong the bell in time. In the present sys-m, the human error has been elimi-ted. Every morning, when the school

arts, someone has to just switch on thestem and it thereafter work automati-lly.

The automatic microprocessor con-olled school bell system presented here

has been tested by the author on aVinytics microprocessor-8085 kit (VMC-8506). The kit displaysthe period number ontwo most significantdigits of address fieldand minutes of theperiod elapsed on thenext two digits of theaddress field. Thedata field of the kitdisplays seconds con-tinuously.

The idea usedhere is very simple.

The programmable peripheral interfacing(PPI) Intel-8255-I chip present in the micro-processor kit has been used. It has three8-bit wide input/output ports (port A, portB, and port C). Control word 80 (hex) isused to initialise all ports of 8255-I as out-put ports. Bit 0 of port A (PA0) is connectedto the base of transistor BC107 through a10-kilo-ohm resistor as shown in the fig-ure. It is used to energise the relay whenPA0 pin of 8255-I is high. A siren, hooter,or any bell sound system with an audioamplifier of proper wattage (along with 2or 3 loudspeakers) may be installed inthe school campus. The relay would getenergised after every 40 minutes for a

Dr D.K. KAUSHIK

RUPANJANA

PAO

jeetu21


few seconds. The program (software) anddata used for the purpose are given be-low in mnemonic and machine code forms.The program is self-explanatory.

The program and data have been en-tered at specific memory locations. How-ever, the readers are at liberty to use anyother memory area in their kits, depend-ing on their convenience. Two monitorprograms (stored in kits ROM/EPROM) atlocations 0347H (for clearing the display)and 05DOH (for displaying contents ofmemory locations 2050H through 2055 inthe address and data fields respectively)

have been used in the program. Pleasenote that before calling the display rou-tine, registers A and B are required to beinitialised with either 00 or 01 to indicateto the monitor program as to where thecontents of above-mentioned memory lo-cations are to be displayed (e.g. addressfield or data field), and whether a dotis to be displayed at the end of addressfield or not. (Readers should refer to theirkits documentation before using the dis-play routine.) In Vinytics kit, if registerA contents are 00, the address field isused for display, and if it is 01, the

data field is used for display. Similarly,if register B contains 00 then no dotis displayed at the end of address field,else if B contents are 01, a dot isdisplayed.

When the program is executed on themicroprocessor kit, a bell sound would beheard for a few seconds. The address anddata fields would initially display :

01 00 0001 indicates start of first period with 00as elapsed minutes and 00 seconds in thedata field. The data field (seconds) arecontinuously incremented.

Address Op-code Label Mnemonic Comments

20 FC 3E 80 MVI A, 80H Initialise 8255-I as output port20 FE DE 03 OUT 03 H2100 31 FF 27 LXI SP, 27FFH Initialise the stack pointer2103 CD 47 03 CALL 0347H Clears the display2106 C3 69 21 JMP TT Jump to ring the bell2109 AF AA XRA A Put A=0210 A 47 MOV B, A Put B=0210 B 21 50 20 LXI H, 2050 H Starting address of display210 E CD D0 05 CALL 05D0H Call output routine to display period

no. & minutes to address field21 11 3E 01 MVI A, 01H A=0121 13 06 00 MVI B, 00H B=0021 15 21 54 20 LXI H, 2054H Current sec.21 18 CD D0 05 CALL 05D0H Address of LSD of current sec.21 1B 21 55 20 LXI H, 2055H21 1E 7E MOV A, M Move the LSD of current sec. to acc.21 1F C6 01 ADI 01 H Add 01 to acc.21 21 FE 0A CPI 0AH Compare LSD of sec. with 0AH (10

decimal)21 23 CA 36 21 JZ RR If LSD completes 09 jump to RR21 26 77 MOV M, A Move the acc. content to 20 55 H

location21 27 06 02 DD MVI B, 02H Delay21 29 11 00 FA YY LXI D, FA00H Sub-21 2C CD 00 25 CALL 2500H Routine21 2F 05 DCR B For21 30 C2 29 21 JNZ YY 1 second21 33 C3 09 21 JMP AA After delay of 1 sec.

Jump to AA for display the time21 36 3E 00 RR MVI A, 00H A=021 38 77 MOV M, A Store Acc. To memory location21 39 2B DCX H Decrement HL pair content21 3A 7E MOV A, M Move the MSD of sec to acc.21 3B C6 01 ADI 01H Add 01 to Acc.21 3D FE 06 CPI 06H Compare MSD of sec with 06H21 3F CA 46 21 JZ UU If sec. complete 59 move to UU21 42 77 MOV M, A Store acc. content to memory

location21 43 C3 27 21 JMP DD Jump for delay of 1 sec.21 46 3E 00 UU MVI A, 00 Put A=00 after completing 59

seconds21 48 77 MOV M,A21 49 2B DCX H21 4A 7E MOV A,M Move current LSD of minutes to acc.21 4B C6 01 ADI 01H Add 01 to acc.21 4D FE 0A CPI 0A Compares acc. to 0A H21 4F CA 56 21 JZ VV Jump to VV if LSD of minutes

completes 0921 52 77 MOV M,A Move acc. to memory location21 53 C3 27 21 JMP DD Jump for delay of 1 sec.21 56 3E 00 VV MVI A,00H21 58 77 MOV M,A21 59 2B DCX H Decrement H-L pair content21 5A 7E MOV A,M Move MSD of minutes to acc.21 5B C6 01 ADI 01H Add 01 to acc.21 5D FE 04 CPI 04H Compare acc. content with 04 H21 5F CA 66 21 JZ SS If minutes 40 then jump to SS21 62 77 MOV M,A21 63 C3 27 21 JMP DD Jump for delay of 1 sec

Address Op-code Label Mnemonic Comments

21 66 3E 04 SS MVI A, 04 Put A=421 68 77 MOV M, A21 69 AF TT XRA A A=021 6A 47 MOV B,A B=021 6B 21 50 20 LXI H, 2050H21 6E CD D0 05 CALL 05D0H Display the period no. and minutes

in address field21 71 3E 01 MVI A, 01H A=121 73 06 00 MVI B, 00H B=021 75 21 54 20 LXI H, 2054 H21 78 CD D0 05 CALL 05D0 H Display the seconds in data field21 7B 3E 01 MVI A, 01H21 7D D3 00 OUT 00H Exite the 8255:1 for engergising the

relay (rings the bell)21 7F 21 55 20 LXI H, 2055H21 82 3E 00 MVI A, 00H Stores 00 to memory location21 84 77 MOV M, A 2055 to21 85 2B DCX H 2052 H21 86 77 MOVM, A21 87 2B DCX H21 88 77 MOV M, A21 89 2B DCX H21 8A 77 MOV M,A21 8B 2B DCXH21 8C 7E MOV A, M Brings the LSD current period

no. to acc21 8D C6 01 ADI 01 Add 1 to it compare with OA21 8F FE 0A CPI 0A21 91 CA 98 21 JZ XX If LSD of period no. complete 09 then

jump to XX21 94 77 MOVM, A Else store it to memory location21 95 C3 A0 21 JMP XY Jump to XY21 98 3E 00 XX MVI A, 00H A=021 9A 77 MOV M,A Store it to main location21 9B 2B DCX H21 9C 7E MOV A, M Store MSD of period no. to acc21 9D C6 01 ADI 01H Add 1 to it21 9F 77 XXX MOV M,A Store it memory location21 A0 06 02 XY MVI B, 0221 A2 11 00 FA XYZ LXI D, FA 00H Program 1 sec display21 A5 CD 00 25 CALL 2500 H21 A8 05 DCR B21 A9 C2 A2 21 JNZ XYZ21 AC AF XRA A=021 AD 47 MOV B,A B=021 AE 21 50 20 LXI H, 2050H21 B1 CD D0 05 CALL 05D0H21 B4 3E 01 MVI A, 0IH21 B6 06 00 MVI B, 00H Program to display21 B8 21 54 20 LXI H, 2054 H The period no.21 BB CD D0 05 CALL 05 D0 H Minutes and second21 BE 21 55 20 LXI H, 2055H21 C1 7E MOV A, M LSD of stored current second to acc21 C2 C6 01 ADI 01H Add 1 to it21 C4 FE 06 CPI 06H Compare with 0621 C6 C2 9F 21 JNZ XXX If not 06 jump to XXX21 C9 3E 00 MVIA, 00H A=021 CB D3 00 OUT 00H Output to 8255 to de-energise

the relay

jeetu22


RUPANJANA

Address OP CODE LABEL Mnemonic Comments

21 CD C3 09 21 JMP AA Repeat for next period

DELAY SUBROUTINE25 00 1B NEXT DCX D25 01 7A MOV A, D25 02 B3 ORA E25 03 C2 00 25 JNZ NEXT25 06 C9 RET

Address OP CODE LABEL Mnemonic Comments

DATA20 50 00 MSD of period no.20 51 00 LSD of period no.20 52 00 MSD of minutes20 53 00 LSD of minutes20 54 00 MSD of seconds20 55 00 LSD of seconds

Radio frequency probe is used todirectly measure the level of RFRMS voltage present across twopoints. It is one of the most useful testinstruments for home brewers as well asfor communication equipment service/de-sign labs.

RF voltage level being measured pro-vides useful information only when theprobe has been designed for use with aspecific multimeter. The design of RFprobe is a function of the meter we in-tend to use it with. If a meter with adifferent input resistance is used with theprobe, the reading will be incorrect. Thevalue of RX (refer figure) is so chosen thatwhen this resistor is connected in paral-lel with input resistance of the multim-eter, the peak value is about 1.414 timesthe RMS voltage. Resistor RX has to dropthis excess voltage so that meter indica-tion is accurate. If we know the inputresistance of the meter, we can calculatethe value of RX with the help of the fol-lowing relationship:

Let meter DC input resistanceX 1.414 = RY

ta

taoh

N.S. HARISANKAR, VU3NSH

(E) so mea-s u r e dacross agiven loadresistance(R) to RFwatts (W)using thefo l l owingr e l a t i o n -ship:

Power P2

be voltage read-ce of 50 ohms is

In other words, for 5-watt power in a50-ohm load, the voltage across the loadis 15.85 volts.

The rectified DC voltage at the cath-ode of diode D1 is at about the peak levelof the RF voltage at the tip of the probe.Use shielded cable in between the probeoutput and meter. It will act as feed-through capacitance and thus avoid RF in-terference. The maximum RF input volt-age level depends on the peak inverse volt-age (PIV) of diode D1. The shielded leadlength is too large to give accurate re-sults at UHF. Please refer Tables I and II

for ready conversion of RF voltage level (RMS) toequivalent power across a 50-ohm load and deduc-

Table IIMeter DC Impedence Rx20 Meg-ohm 8.25 Meg-ohm10 Meg-ohm 4.14 Meg-ohm1 Meg-ohm 41.4 kilo-ohm20 kilo-ohm 8.28 kilo-ohm

TABLE IVoltage to Watts Conversion

for 50 ohms TerminationRMS (V) RF Power (W)2.24 0.13.88 0.35.0 0.57.08 112.25 315.90 520.0 822.4 1038.75 2541.85 3550.0 50Then RX = Ry meter DC input resis-nce

For example, if meter input resis-nce is 20 meg-ohm, R = 28.28 meg-

= E / Rwatts (W)

For example, if RF proing across a load resistany

m and RX = 8.28 meg-ohm.We can convert the RF voltage level

found to be, say, 15.85 volts, the power inthe load = 15.85 x 15.85 / 50 = 5W approx.

tion of RX value for a given meters DC input resis-

tance respectively.

jeetu23

February

2000


This project describes the softwareand hardware necessary to moni-tor and capture in real time thespeed of any rotating object. The speedmay be defined/stored/displayed in any ofthe three units: RPM (rev./minute), RPS(rev./second), or RPH (rev./hour). The sys-tem uses a sampling time of two secondsand can store up to 16 minutes of data perfile. The x and y axes can be scaled to readany speed and the x-axis can be stretchedto observe clustered points.

The hardware mainly comprises aproximity switch whose output is con-nected to the printer(LPT1) port of the com-puter through an opto-coupler. The proximityswitch is used as aspeed-sensor. The pro-gram is written in C++and has effective errorhandling capability anda help facility. This sys-tem can be used tomonitor the speed of ro-tating parts in the in-dustry or to read andrecord wind speeds.

The hardware interface circuit is givenin Fig. 1. A 230V AC primary to 0-9V,250mA secondary transformer followedby IC 7805 is used for catering to thepower supply requirement for proximityswitch and the opto-coupler. The proxim-ity switch, as shown in Fig. 2, is a 3-wireswitch (e.g. PG Electronics EDP101)which operates at 6V to 24V DC.

senof fanof tridufor

G.S. SAGOO

SANTHOSH JAYARAJAN

the machinery. The output of the circuit,available across resistor R2, is fed to thePC via 25-pin D connector of parallel portLPT1. Pin 11 pertains to data bit D7 of theinput port 379(hex) of the LPT1 port hav-ing base address 378(hex), and pin 25 isconnected to PC ground. (In fact, pins 18through 25 of the parallel port are strappedtogether and connected to ground.)

The proximity switch is mounted ona stationary part, such as a bolt or stud,in such a way that it senses each tooth ofthe rotating part as shown in Fig. 3. Twofixing nuts are provided on the threaded

body of the proximityswitch for securing itfirmly onto a fixedpart of the machinery.

The softwareprompts the operatorto enter the number ofteeth (being sensedduring every revolu-tion), which is used bythe program for calculationof RPM, RPS, or RPH, asthe case may be. In any

As interface circuit can easily be wiredon any general-purpose PCB, no PCB lay-out is included for it. The two wires to beextended to 25-pin parallel port may beconnected using a 25-pin male D connec-tor.

Lab Note: Magnetic proximityswitches, from various manufacturers,are available in the market. The impor-tant specifications include operating DCvoltage range, operating current and itssensitivity, i.e. the maximum distancefrom a metallic object such that theswitch operates. These specifications arenormally mentioned on the proximityswitch itself or in the accompanying lit-erature.

The structural block diagram of the soft-ware is shown in Fig. 4. The software hasthe following four main modules, whichare activated from the main menu usingfour of the function keys, F1 through F4.

Fig. 1: Interface circuit for PC based speed monitoring system

Fig. 2: Proximity switchThe inductive type proximity switchses any metal surface from a distance

about 5 mm to 8 mm. Thus, a gear or blade is ideal for counting the numberrevolutions. The number of teeth thatgger (switch-on) the proximity switch

specific application, wherenon-metallic rotating partsare present and inductiveproximity switch cannot beused, one may use photo-electric switch to do thering every revolution are to be known the software to calculate the speed of

counting for 2-second sam-pling period. Fig. 3: Mounting of proximity switch

jeetu25


1. Speed monitor and capture mod-ule. This module is used to monitor thespeed and store the data in a user-de-fined file.

(a) The module first prompts for thefilename. The file name is entered withan extension .DAT.

(b) The next entry is called triggermode. It specifies how the software shouldstart monitoring and capturing data. Theoptions are: 1 = manual and 2 = auto. Ifoption 1 is selected, the system waits fora key press to start the monitoring andcapturing operation.

If option 2 (auto mode) is selected,

the system waits for the first pulsefrom the proximity switch to startmonitoring and capturing of data.

(c) The next entry relates to units,which has the following further op-tions:

1 = Revolutions/min.2 = Revolutions/sec.3 = Revolutions/hr(d) The next entry pertains to the

range of speed, which must be morethan the maximum speed that is ex-

pected. The options are:1 = 400 units2 = 800 units, etc(e) The next entry concerns the num-

ber of teeth and represents the numberof pulses from the proximity switch perrevolution.

After making the above entries, thefollowing message is displayed on themonitor screen:

Trigger mode: Auto (or Manual) Waitingfor first pulse (or Press any key to start)depending on the trigger mode. If manualmode has been selected, then hit any keyto start. If auto mode is selected, the soft-ware waits for the first pulse from theproximity sensor to proceed. The displaythen shows the speed in the units selectedand the capture file name. Pressing ESCexits the monitor mode after closing thecapture file. Pressing any other key re-turns to main menu.

2. Viewing a graph file. This mod-ule is used to view an existing data file.Sequential contents of a DEMO.DAT fileare shown in a box (using eight columns).If a non-existant filename is entered, thesoftware detects the opening error andprompts the user for re-entering thefilename. The various prompts for enter-ing the required data are:

(a) File name Enter the full filename

FILE Contents of DEMO.DATShowing Rev./min.

1 0 0 0 0 0 0 015 0 0 0 0 0 0 00 0 0 15 0 0 0 00 0 0 30 0 0 0 00 0 0 0 0 15 0 00 15 0 90 0 15 0 00 15 0 0 0 0 0 00 120 0 0 0 0 0 1530 30 0 0 30 0 0 00 150 0 0 0 0 0 030 0 0 0 0 0 0 150 30 0 0 0 0 0 00 0 0 0 0 0 0 00 15 60 0 0 15 0 030 150 0 0 0 0 00 0 0 0 0 15 0

Fig. 4: Structural block diagram of software

!"#$ %

&&& !" &&&

This software can be used to captureand monitor the speed of any rotatingpart for a maximum of eight minuteswith a total sampling time of two sec-onds. The software has four menu lev-els which can be selected from the MainMenu.

In Capture/Monitor mode the soft-ware has two trigger modes, viz,Manual, which waits for a key press andAuto, which waits for the first pulse fromthe sensor.

The captured file can be viewed inany X-axis scale. However, all points com-ing out of the view page are clipped off.

When using the gear teeth for speedcalculation, please enter the teeth perrevolution to enable internal calculationof speed to be made.

Enter the filename where the datais to be stored, when prompted. Thesame file can be viewed in the view pageoption. If an invalid file name is entered,or the file cannot be opened, an error isdisplayed and the user can exit to Main.

...Press Any Key to Return to Main...

PARTS LISTSemiconductors:IC1 - 7805 regulator 5VIC2 - MCT2E opto-coupler

Resistors (all watt, 5% metal/carbonfilm, unless stated otherwise)

R1 - 300-ohmR2 - 150-ohmCapacitors:C1 - 1000F, 16V electrolyticC2 - 0.22F polysterMiscellaneous:X1 - 230V AC primary to 0-9,

250mA sec. transformerBR-1A - Bridge rectifier, 1-amp.S1 - Proximity switch (refer text)

jeetu26


#include#include#include#include#include#include#include#include#includevoid startgraphics();//start graphics system//void openingmenu();//opening menu//void monitor();//monitor and save to file//float readspeed(int unit,int teeth);//read the speed//void display(int unit);//display the speed//void view();//View a Speed vs Time Graph//void grid();//Draw the graph grid//void displayhelp(char helpfilename[10]);void exiit();void help();int roundoff(float number);//Global Variables//int unit;int teeth;float speed;char monitorfile[8];int gdriver;int gmode;int mid;//Program main menu//void main(){startgraphics();openingmenu();}//Graphics initialisation//void startgraphics(){registerbgidriver(EGAVGA_driver);registerbgifont(small_font);registerbgifont(triplex_font);int gdriver = DETECT, gmode;initgraph(&gdriver, &gmode, );}//Opening menu//void openingmenu(){setfillstyle(LTSLASH_FILL,5);bar(10, 10, 635, 470);setlinestyle(SOLID_LINE,0,2);rectangle(10,10,635,470);setlinestyle(SOLID_LINE,0,2);rectangle(200,40,400,90);setcolor(BLUE);line(200,91,400,91);line(200,92,400,92);line(401,90,401,40);settextstyle(2,HORIZ_DIR,8);setcolor(YELLOW);outtextxy(220,50,SPEED TRACK);setcolor(LIGHTBLUE);outtextxy(150,120,1.SPEED MONITOR & CAPTURE - F1);setcolor(LIGHTRED);outtextxy(150,180,2.VIEW SPEED vs TIME GRAPH - F2);setcolor(LIGHTMAGENTA);

outtextxy(150,240,3.SPEED TRACK HELP - F3);setcolor(LIGHTCYAN);outtextxy(150,300,4.EXIT TO SHELL - F4);setcolor(LIGHTGREEN);outtextxy(180,360,Enter your choice );outtextxy(200,383,(F1 TO F4) );USERCHOICE:while(!kbhit()){ }char userchoice=getch();switch(userchoice){case (char(59)):monitor();break;case (char(60)):view();break;case (char(61)):help();break;case (char(62)):exiit();break;default:goto USERCHOICE;}}

//Monitoring the speed online and storing the data//void monitor(){int s;int t;int trigger;int yrange;char unitf[8];int speedf;restorecrtmode();clrscr();window(1,1,80,25);clrscr();textcolor(YELLOW);textbackground(LIGHTBLUE);gotoxy(25,3);cprintf( - S P E E D T R A C K -);gotoxy(25,4);cprintf(=========================);gotoxy(25,6);cprintf(MONITOR & CAPTURE PAGE);window(10,8,75,8);textcolor(YELLOW);clrscr();cprintf(Enter file name to store Speed data (****.***) - );scanf(%8s, &monitorfile);GETTRIGGER:textcolor(YELLOW);clrscr();cprintf(Enter trigger mode(1=Manual,2=First pulse) - );scanf(%d, &trigger);if(trigger2){clrscr();textcolor(YELLOW+BLINK);cprintf(........Value out of range,Enter 1 or 2........);delay(2000);goto GETTRIGGER;}GETUNIT:textcolor(YELLOW);

clrscr();cprintf(Enter Unit for Speed(1=Rev/min,2=Revs/ sec,3=Revs/Hr) - );scanf(%d, &unit);if(unit3){textcolor(YELLOW+BLINK);clrscr();cprintf( ........Value out of range............ );delay(2000);goto GETUNIT;}GETRANGE:textcolor(YELLOW);clrscr();cprintf(Enter Range for Speed(1=400 units, 2=800 units..etc) - );scanf(%d, &yrange);if(yrange100){textcolor(YELLOW+BLINK);clrscr();cprintf( ........Value out of range............ );delay(2000);goto GETRANGE;}GETTEETH:textcolor(YELLOW);clrscr();cprintf( Enter Number of teeth for Sensor - );scanf(%d, &teeth);if(teeth100){textcolor(YELLOW+BLINK);clrscr();cprintf( ........Value out of range............ );delay(2000);goto GETTEETH;}//Open the file for data storagefstream infile;infile.open(monitorfile,ios::out);//Store the unitschar *unitf1 = Rev/min;char *unitf2 = Rev/sec;char *unitf3 = Rev/hr ;switch(unit){case 1:infile


s=inp(0x379);t=s;while(s==t)s=inp(0x379);break; default:textcolor(YELLOW+BLINK);cprintf (Trigger mode: Manual ..Press any key to Start); getch();break;}startgraphics();for(int pointno=1;pointnocoordinate[i];++i;++pointcount;}infile.close();startgraphics();cleardevice();setcolor(CYAN);setbkcolor(DARKGRAY);rectangle(10,40,490,440);settextstyle(2,HORIZ_DIR,6);outtextxy(140,15,Speed Master..GRAPH VIEW PAGE..);setcolor(GREEN);outtextxy(492,40,Graph Variables);

outtextxy(492,60,X scale =);outtextxy(492,75,Y scale =);outtextxy(492,90,Units = );outtextxy(492,105,File = );outtextxy(492,120,Points = );setcolor(GREEN);outtextxy(492,150,Options:);outtextxy(492,165,F1= New Graph);outtextxy(492,180,F2= Main Menu);outtextxy(492,210,NOTE:);outtextxy(492,225,X axis=960sec);outtextxy(492,240,Y axis=400units);outtextxy(492,255,For Xscale=1);outtextxy(492,270,and Yscale=1);setcolor(YELLOW);sprintf(msgx, %d, xscale);outtextxy(580,60, msgx);sprintf(msgy, %d, yscale);outtextxy(580,75, msgy);sprintf(msgun, %s, gunits);outtextxy(580,90, msgun);sprintf(msgfile, %5s, filename);outtextxy(565,105, msgfile);sprintf(msgpoint, %d, pointcount);outtextxy(567,120, msgpoint);sprintf(msgmaxx, %d, (960/xscale));outtextxy(480,450,msgmaxx);sprintf(msgmaxy, %d, (400*yscale));outtextxy(10,20,msgmaxy);outtextxy(60,20,msgun);outtextxy(480,460,Seconds);grid();setviewport(10,40,490,440,1);setcolor(GREEN);int x1=0;int y1=0;int j;for (j=0;j


cleardevice();setbkcolor(LIGHTGREEN);setcolor(RED);moveto(150,200);outtext(Exiting to DOS..);delay(2000);closegraph();exit(1);}//Display the helpfile if resident or else indicate error//void displayhelp(char helpfilename[10]){fstream infile;textbackground(BLACK);window(1,1,80,25);textcolor(LIGHTRED);const int max=80;char buffer[max];clrscr();

infile.open(helpfilename,ios::in);if(infile.fail()){window(10,8,70,9);textcolor(YELLOW+BLINK);clrscr;cprintf(.....HELP NOT AVALABLE OR ERROROPENING FILE.....\n\r ....Press any KEY TO RETURN TO MAIN....);getch();main();}while(!infile.eof()){infile.getline(buffer,max);cout


G.S. SAGOO

An electronics hobbyist always findspleasure in listening to a songfrom a cassette player assembledwith his own hands. Here are the detailsof a stereo cassette player with the fol-lowing features, which many electronicsenthusiasts would love to assemble andenjoy:

1. Digital 4-function selector (radio,tape, line input, and transmit).

2. Four sound modes (normal, lowboost, hi-fi, and x-bas).

3. Bass and treble controls.4. Function and output level displays.5. Built-in FM transmitter for cordless

head-phones.

The functional block diagram of the ste-

REJO G. PAREKKATTU

reo cassette player is shown in Fig. 1.The circuit may be divided into three func-tional sections as shown in the block dia-gram.

Section I (Fig. 2). It comprises a ste-

reo head preamplifier, a function selec-tor, and an FM transmitter. The pream-plifier is built around IC LA3161. The out-puts from 200-ohm stereo R/P (record/play) head are connected to the left andright input pins 1 and 8 of LA3161 pream-plifier. A 9V regulated power supply, ob-tained from the voltage regulator builtaround transistor T1, is used for thepreamplifier. The outputs of this pream-plifier are routed to the function selectorconfigured around two CD4066 (quad bi-polar analogue switches) and an HEF4017(decade counter).

When any control input pin (5, 6, 12,

Fig. 1: Functional block diagram of stereo cassette player

Fig. 2: Preamplifier and function selector and FM TX (Section I)

jeetu30


and 13) ofCD4066, asshown inFig. 3, ismade high,it can switchAC and/orDC signalsbetween itscorrespond-ing outputpins (3-4, 8-9, 10-11, and1-2 respec-tively) inboth direc-

tions. In other words, it acts like an ana-logue switch which can be turned on oroff by making its input control pin highor low. A single IC contains four suchswitches/sections (A, B, C, and D). Thecontrol inputs of the two ICS (CD4066)are derived from the decade counter IC(HEF4017). Only four outputs of this IC(Q0 through Q3) are used and the fifthoutput Q4 (pin 10) is connected to thereset pin (pin 15) via diode D1.

When power is turned on, the outputQ0 (pin 3) of this IC will be high. In thiscondition any audio signal fed to the ra-dio I/P terminal reaches the output. Ifdesired, the audio output from a radio

receiver can be connectedto this input terminal.Circuit diagram and de-tails of such radio receiv-ers have appeared in ear-lier issues of EFY.

With each depressionof switch S1, the outputsof IC4 (Q0-Q3) go high se-quentially to control dif-ferent modes of operation.When Q1 (pin 2) of IC4goes high, the audio sig-

nals from the output of the preamplifierreach the output terminals of the circuit.At the same time, a 9V regulated powersupply to the preamplifier is switched onthrough transistor T1. When Q2 (pin 4)goes high, any audio signals applied tothe auxiliary I/P terminals (Aux. I/P (L)and Aux. I/P(R)) reach the output termi-nals. When Q3 (pin 7) goes high, thepower to both the FM transmitter andpreamplifier is switched on and the sig-nals from the preamplifier appear at thebase of transistor T3 (BF494) which, inassociation with some passive compo-nents, forms an FM transmitter. The de-tails of coil L1 are included in the partslist. The frequency of this transmitter fallsbetween 88 and 108 MHz.

The frequency can be slightly variedby adjusting trimmer capacitor VC1. Thetransmitted signals can be received on anyFM receiver working in 88-108 MHzrange. LEDs D2 through D5 are bilateralLEDS which are used to display the se-lected function.

Section II. This section employs aJFET dual operational amplifier LF353whose gain for different audio frequen-cies is controlled by the corresponding po-

tentiometer settings (VR3 andVR6 for bass, VR4 and VR5 fortreble for left and right channelsrespectively) and, additionally,by sound mode selector switchS2. The simplified circuit dia-gram for left channel is shownin Fig. 4, while the completeschematic circuit diagram isshown in Fig. 5.

In the simplified diagram,the function of decade counterIC (HEF 4017) and bipolar ana-logue switcher ICs (CD4066) arereplaced by a simple switch, SW.The output of preamplifier (sec-tion I) is applied as input to theinverting terminal of op-amp IC8and at the output we obtain a180o phase shifted amplified sig-nal. Potentiometers VR3 andVR4 are used to control low fre-quencies (bass) and high fre-quencies (treble) respectively.

In the normal mode (Q0 out-put of IC7 high), pole-P of switchSW is in contact with terminals1 and 2 simultaneously. In thiscondition, normal gain isachieved for both high and lowfrequencies as per settings of

Fig. 3: Internal schematicdiagram of CD4066switcher IC

Fig. 4: Simplified schematic diagram of tone and soundmode control (left channel)

Fig. 5: Tone and sound mode control (Section II)

jeetu31


VR3 and VR4. But the mid-range frequency compo-nents get attenuated dueto capacitor C41 (0.047F).

In the hi-fi mode (Q1output of IC7 high), pole-Pof the switch is in contactwith terminal 1. In this po-sition, normal gain isachieved for entire audiofrequency range (since ca-pacitor C41 is disconnectedfrom the feedback path).

When pole-P of switchSW is in position 2 (Q2 out-put of IC7 high), the at-tenuation of mid-range fre-quency components is re-established and also thegain of the amplifier forvery low frequencies in-creases (since an additionalfeedback resistance of 100k(R25) is introduced in thefeedback loop). This is thelow-frequency boost mode.

When pole-P is in con-

R25,R32,R29,R34 R41,R42 - 2.2-kilo-ohmR43,R44 - 1-ohmR45-R50 - 33-kilo-ohmR61 - 680-ohmR62 - 330-ohm,0.5WVR1-VR3,VR6 - 47-kilo-ohm linear

potmeterVR4,VR5 - 100-kilo-ohm linear

potmeterVR7 - 220-kilo-ohm linear

potmeterVR8,VR9 - 47-kilo-ohm log potmeter

Capacitors:C1,C5,C17,C27-C30,C32,C47,C59,C60- 0.1F ceramic discC2,C4,C24 - 100F, 25V electrolyticC3,C11,C26 - 22nF ceramic discC6,C16,C22,C23C34,C36,C22,C23,C52,C53 - 1nF ceramic disc

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