electronic devices

Chapter 3 The Bipolar Junction Transistor 1

CHAPTER 3

The Bipolar Junction Transistor

3.1. Transistor Structure. Operating Modes

A Bipolar Junction Transistor (BJT) is a semiconductor device formed by two pn junctions. Therefore, it will have three alternating regions. It can be either a narrow n type region placed between two p type layers (forming a pnp transistor), or a thin p-

type region between two n- type layers (representing a npn transistor). Fig. 3.1 shows the construction and symbols of the two kinds of BJTs. The three terminals of the transistor are called emitter (E), base (B) and collector (C), respectively. The arrow at

the emitter indicates the conventional direction of the current through the device.

The name BJT comes from the fact that the transistor operates with two type of

charge carriers, electrons and holes, in the same time. The first BJT was invented in 1947 at Bell Labs by William Shockley, Walter Brattain and John Bardeen. Their

invention was awarded with the Nobel Prize in 1956.

Fig 3.1 BJT construction and symbols: a) pnp transistor (left); b) npn transistor

(right)

p

p+

n

C

B

E

n

n+

p

C

B

E

B - Base

E - Emitter

C - Collector

C

B

E iE

iC

iB

vEB

vEC

C

B

E iE

iC

iB

vBE

vCE

________________________________________________________________

The key fact in BJT manufacturing consists in making the middle layer (the base) as

thin as possible. Because of this feature, the transistor functionality differs from two diodes placed back to back. Normally, the base - emitter (BE) junction is forward biased, while the base – collector (BC) junction is reverse biased (fig. 3.2). Also, the

emitter has a higher concentration of impurities than the other two layers. This is marked by a p+ or n+ sign in fig. 3.1 and fig 3.2.

Since the BE junction is forward biased, the emitter electrons diffuse into the base.

Their flow produce the emitter current iE. To be noticed that the conventional current direction is opposite to the electron flow direction.

+

-

+

-

VBC

VBE

C

B

E

+ + + + + + + + - - - - - - - - - -

n

+ + + + + + + +

- - - - - - - - - -

p

n+

iE

iC

iB

C

B

E iE

iC

iB

vBE

vCE

Electron

Hole

Depletion region

Electron flow

Fig. 3.2 BJT operating principle illustrated for a npn type transistor


A few of the emitter electrons recombine with the holes found into the base, thus

forming a very small current called the base current, iB. However, most of the emitter electrons cross over into the BC depletion region, where the strong electric field found here leads them directly into the collector, thus creating the collector current iC.

Practically 99% of the emitter current reaches the collector and only 1% flows into the base. This happens because the base layer is very thin. (If it were not so, the majority of the emitter electrons would recombine with the base holes, never reaching the

collector). The operation of a pnp –type transistor is analogous to that of a npn type, with the role of the charge carriers reversed.

From the above discussions, the following equations can be written for describing

the transistor operation:

0

;

CEBC

CBE

Iii

iii

(3.1)

where is called current amplification factor (current gain). It is a dimensionless number, typically in the range of 100 to 800. In the literature it is also denoted with

hFE. The term ICE0 is the leakage current produced by the minority charge carriers. It can be neglected in practice. Since the base current iB is hundreds of times smaller than the collector current iC, it can be neglected also in (3.1):

.

;

BC

CE

ii

ii

(3.2)

Fig. 3.3 presents the typical physical appearance of a transistor.

As can be noticed, the most important

feature of the transistor is the fact that it can be used to control a large current to pass between the emitter and collector, by

the means of a much smaller current (iB). The device can be compared to a faucet, where the flow of the water can be

controlled by opening /closing a control knob. In the same way, a voltage or current applied to the transistor base may

allow much or less current to pass between the emitter and the collector. At the limit, the device can be completely closed, when iC = 0 and the transistor is blocked. This operation mode is called cut – off regime and

corresponds to the case when both junctions are reverse-biased. On the other hand, the device can be made maximum opened when the collector current is maximum. This

mode is called saturation, and corresponds to the case when both junctions are forward biased. Therefore the transistor can be used as a switch when operating in one of these two modes (cut-off / saturation). Between the two limits, the device works as an

Fig 3.3 BJT common packages

E C

B

E C

B

________________________________________________________________

amplifier. The current gain is a measure of the transistor effectiveness as an amplifying device.

In many applications the transistor can be connected using one of the following three

possible configurations: common emitter (CE), common base (CB) or common collector (CC), depending on which terminal is

common between the input and the output (fig. 3.4). Among them, the most used configuration is the CE connection.

It can be noticed (equation (3.1) and fig.3.1) that two currents and two voltages are

sufficient to specify the transistor operation. (The third one can be computed from the other two.)

Also the transistor operation can be described by its i-v characteristics. For the

CE connection, they are defined as follows:

a) The input characteristic relates the input

current iB with the input voltage vBE, when the output voltage vCE remains constant:

.constvvii CEBEBB (3.3)

b) The output characteristic relates the

output current iC with the output voltage vCE, with the condition that the input current iB is kept constant:

.constivii BCECC (3.4)

c) Finally, the transfer characteristic is

defined by the variation of the output current iC versus the input voltage vBE, when the output voltage vCE is maintained constant:

.constvvii CEBECC (3.5)

If the constant parameter in the above equations is varied, a family of characteristics can be drawn, each curve corresponding to a certain parameter. The common emitter i-v qualitative characteristics are depicted in Fig. 3.5.

The most important of all these are the output characteristics, since they can be used to describe the transistor behavior. In the (iC, vCE) plane four main regions can be

defined (fig. 3.5c), corresponding to four different operating modes of the BJT. The features of each region are summarized below:

C

B

E

iE

iC

iB vBE

vCE

C

B

E

iE vEB iC vCB

iB

vEC

C

B

E

vBC iB

iC

iE

Fig. 3.4 BJT main connections: a) CE (top); b) CB (middle); c) CC (bottom)


a) The cut-off region is characterized by the fact that both junctions are reverse

biased, therefore iB 0, and consequently iC 0. In conclusion no current flows through the transistor.

b) The saturation region corresponds to the case when both junctions are forward

biased. The collector current iC reaches its maximum. Also the collector emitter voltage

vCE is smaller than the base– emitter voltage, vBE (typical VCE,sat 0.2 V)

IB1

Saturation

vCE

0

iC

VCE,Max VCE,Sat

ICMax Breakdown

Cut-off

Active Region

IB2

IB3

IB4

IB=0

0

iB

0.6V vBE

VCE1 VCE2

VCE2 > VCE1

vCE = const.

0

iC

0.6V vBE

vCE = const.

Fig. 3.5 Typical i-v characteristics for a npn BJT operating in the CE mode: a) input curves (top left hand corner); b) transfer characteristic (top right-hand corner); c) output characteristic

(bottom)

ICE0

________________________________________________________________

c) The active region has the base– emitter junction forward biased, while the base –

collector junction is reverse biased. In this case the transistor acts as a linear amplifier. The collector current iC can be controlled by the base current iB, according to (3.2). Also the collector – emitter voltage has to be such that VBE < VCE < VCC, where VCC is

the value of the voltage supply.

d) The breakdown region corresponds to the situation when iC and vCE exceed the

specifications given in the transistor data sheet. Above these values the transistor is damaged.

Table 3.1 summarizes the main transistor parameters that can be found in a data sheet, for BC 108, a general purpose npn transistor.

Table 3.1. Typical ratings for BC 108, a common npn transistor, at room temperature (25ºC)

Symbol Parameter BC 108

ICE0 Collector cut - off current 15 A

VCE0 Max Maximum value of collector-emitter voltage with the base terminal

left open circuit (IB = 0) 20 V

VCE,sat Collector emitter saturation voltage (at IC = 100 mV) 0.2 V

IC Max Collector current maximum value 100 mA PD Maximum total power dissipation 300 mW

hFE min Minimum DC current gain at IC = 2mA 110

3.2. BJT Operating Point

The operating point (Q point or bias point) of the BJT is defined as the DC component pair of the collector current IC

Q and the collector – emitter voltage VCEQ:

Q

CE

Q

C

V

IQ

(3.6)

Graphically, the operating point is situated at the intersection of the load line and the output i-v characteristic of the transistor (fig. 3.6). It can be noticed that when the

base current IB decreases, the corresponding Q point approaches the cut – off region. Conversely, as IB increases, it falls near the saturation region. Therefore, when designing a transistor amplifier, the Q point has to be chosen as much as possible in the

middle of the active region.

A practical diagram for biasing the BJT is shown in fig. 3.7. It is called the self-

bias circuit and has several advantages compared to other types of biasing diagrams. First of all, it is better from a practical perspective, since it doesn’t require two voltage sources. Secondly, the Q point can be stabilized so it doesn’t depend on the current

gain, which may vary in a wide range (e.g. 100 … 800) from transistor to transistor. This can be done by choosing proper values of the base resistors, so that the base current IB is much smaller than the divider current ID. Typically it is required that


BD II 10 (3.7)

Generally, the algorithm summarized in

fig. 3.8 can be used for performing the DC analysis of a circuit containing transistors working in the active region.

In the first step of this algorithm all capacitors can be replaced with open

circuits, since their reactance

CX C

1 (3.8)

is practically infinite at zero frequency

(DC regime). Also, the signal sources are being replaced by short-circuits. For example, the circuit shown in fig. 3.7

represents already the DC equivalent diagram of a single transistor amplifier (the AC varying source, the load and the coupling capacitors were not presented yet.).

In the second step, on the resulted diagram, it is important to mark the transistor currents and voltages with their corresponding conventional directions (as shown in fig. 3.1).

Fig. 3.6 Graphical interpretation of the BJT operating point

Saturation

vCE 0

iC

Q

Load line

Cut-off

Active Region

IB

VCEQ

ICQ

RC

RE RB2

VCC +15V

VC

VB

RB1

100k

50k 3k

ICQ

5k

VE

IEQ

ID

IBQ

VCEQ

VBE0

Fig. 3.7 Typical circuit for biasing the BJT

________________________________________________________________

Next, the transistor equations can be

written in their simplified form (3.2). Also, the base – emitter voltage can be assumed equal with the offset voltage of

forward biased pn junction:

VVBE 6.00 (3.9)

The equations given by the external circuit can be obtained by applying

Kirchhoff Laws, Ohm’s Law, the voltage divider rule, the Thevenin theorem, etc.

In the current example (fig. 3.7), after applying the Thevenin theorem between the transistor terminal base and the

ground, a simplified diagram like the one shown in fig. 3.9can be obtained, where:

kRRR

VVRR

RV

BBBB

CC

BB

BBB

3.33||

5

21

21

2

Next, by applying Kirchhoff second law, around the left loop, and taking into

account the transistor equations (3.2) the collector current can be derived immediately:

EBB

BEBBQ

CRR

VVI

0 (3.10)

It can be noticed that generally ICQ

depends on the current gain . In practice this relation is undesirable,

due to the large range variation of this parameter. In turn this may cause a significant variation of the Q point,

which is required to be as stable as possible inside the active region.

This inconvenient can be avoided if

EBB RR (3.11)

which is satisfied in the current

example for 100.

1. Plot the DC equivalent circuit

2. Mark transistor currents and

voltages

3. Write the transistor equations

(3.2)

4. Write the external

circuit equations

5. Solve to find the

unknown quantities

Fig. 3.8 General algorithm for DC analysis

of transistor circuits

RC

RE

RBB

VCC +15V

VC

3k

ICQ

5k

VE

IEQ

IBQ

VCEQ

VBE0

VBB +

-

VCC +

-

Fig. 3.9 Equivalent diagram obtained by applyin

the Thevenin Theorem for the circuit in fig. 3.7


Then the bias point collector current can be approximated as:

mAR

VVI

E

BEBBQ

C 47.10

(3.12)

The collector-emitter voltage, VCEQ can be drawn from the second Kirchhoff law

written for the loop on the right:

VIRRVV Q

CECCC

Q

CE 24.3 (3.13)

Thus it can be concluded that the operating point in the current example is ICQ =

1.47 mA and VCEQ = 3.24 V.

The same result can be obtained directly, if neglecting the base current IBQ relative

to the divider current ID. The left branch of the circuit in fig.3.7 can be approximated with a voltage divider. Then the base voltage VB can be computed easily by applying

the voltage divider rule:

VVRR

RV CC

BB

BB 5

21

2

(3.14)

Next the emitter voltage and current can be obtained immediately from the bottom-left loop:

mAR

VII

VVVV

E

EQ

C

Q

E

BEBE

47.1

4.40

(3.15)

The collector- emitter voltage VCEQ is computed identically with (3.13).

The initial assumption (3.7) can be next verified by comparing the two currents:

mAR

VVI

B

BCCD 1.0

1

(3.16)

If the minimum value of the current gain = 100,

D

Q

CQ

B ImAI

I 014.0

Finally it can be concluded that the initial assumption was true.

The load line equation can also be drawn from the second Kirchhoff law written for the loop on the right, similar to (3.13:

CECECCC viRRV (3.17)

This line can be plotted in the( iC, vCE) plane by finding the intercepts with the axes (fig.3.10):

(3.18)

mARR

Viv

VVvi

EC

CCCCE

CCCEC

875.10

;150

________________________________________________________________

It can also be noticed in fig.3.10 that the

position of the Q point is indeed in the active region, thus the transistor works as an

amplifier, as desired. However, when a signal source is applied at the input, the transistor currents and voltages will have variations

around their DC values. If the input signal amplitude is increased, the total collector current iC or the collector – emitter voltage

vCE may extend beyond the active region boundaries reaching into the saturation or into the cut-off domains. In this case, the

signal at the amplifier’s output may be distorted (fig. 3.11). Thus, if a sine wave is applied at the input, the voltage at the

amplifier’s output may present flattened peaks. The decomposition in Fourier series of this waveform leads to additional superior

Fig. 3.10 The load line and the Q point

Saturation

vCE[V] 0

iC[mA]

Q

Load line

Cut-off

Active Region

VCEQ

ICQ

VCC

VCC

RC+RE

15

1.875

3.24

1.47

Vce

Qopt

VCEQ

opt

ICQ

opt

7.5

0.94

ic

Ic

Fig 3.11 Signal distortion example

Input signal vi(t)

Output signal vO (t)

time

vi(t), vO(t)

Vi

t[s]

0

t[s]

-Vi

t[s]


harmonics. For example in audio applications the listening quality may be seriously

affected.

In order to obtain a maximum gain from the amplifier and in the same time no

output signal distortions, it is a good practice to choose the transistor’s bias point as much as possible in the middle of the load line segment from the active region (fig.3.10). This particular operating point is called optimum, Qopt. In the current

example,

VV

V

mARR

VI

QCCQ

CE

EC

CCQ

C

opt

5.72

94.02

(3.19)

Example 1

In the above circuit (fig. 3.7), often the inverse problem might arise: for example to find the resistances RB1 and RB2, such that the transistor works in its optimum Q point.

It is assumed that the total value of the base resistors remains the same i.e. 150 k. In this case the analysis starts from the “tail” to the “head”. First, the emitter voltage VE is found:

VRIV E

Q

CE 8.2394.0 (3.20)

The base voltage VB can be computed next, from the bottom-left loop:

VVVV BEEB 4.36.08.20 (3.21)

Requiring the condition (3.7), thus assuming IB >> ID, then it follows that:

mARR

VI

BB

CCD 1.0

150

15

21

(3.22)

Still at the same time,

kI

VR

D

BB 34

1.0

4.32 (3.23)

and therefore,

kRB 116341501 (3.24)

If the value of the total base resistance RB1 + RB2 is not given, then the divider

current ID has to be chosen, according to (3.7) considering the worst conditions. For

example assuming the minimum value of the current gain factor min = 100, it follows that

mAI

I

Q

Copt

BMax 0094.0100

94.0

min

________________________________________________________________

and therefore the divider current can be chosen ten times higher:

mAII BMaxD 094.010

Consequently,

k6.159094.0

15

I

VRR

D

CC2B1B (3.25)

The rest of the problem can be solved in a similar manner, by following the same

equations (3.23 – 3.24) and choosing a proper RB1 + RB2 value, according to (3.25).

3.3. BJT Large Signal Model

The large signal model describes the behavior of the transistor in the presence of relatively large base and collector currents. It includes all three basic operating modes highlighted previously, in the output characteristic plane (fig. 3.6).

Thus, in the cut-off region, both junctions are reverse biased. The collector current is given by the small leakage current

00 CEC II (3.26)

Therefore, it acts virtually as an open circuit and can be replaced by the corresponding circuit shown in fig. 3.12 a, where ICE0 denotes a very small current source.

In the active mode the BE junction is forward biased, therefore it can be modeled by

a DC voltage source VBE = 0.6 V, placed between the base and the emitter. At the same time, the BC junction is reverse biased, so there is an open circuit between these two

terminals. In this case the base current is amplified by the gain factor at the collector

according to (3.2), and thus IC can be modeled by a current source IB, as shown in fig. 3.12 b.

Finally, in the saturation regime both junctions are forward biased. Again the BE

junction can be replaced by a DC voltage source VBE = 0.6 V as in the previous case. Also, the voltage drop between the collector and the emitter is very small (typically less than 0.2 V). Thus an additional DC voltage source VCE,sat can be placed between

these two terminals to specify this property (fig. 3.12 c). (Evidently, since VBE > VCE,sat the BC junction still remains forward biased).

Example 2

In some microcomputer applications it is required to turn on an off an LED from

one of its digital output ports. A transistor has to be employed to drive the LED device

as shown in fig. 3.13 a. It is known that VBE0 = 0.6V; VCEsat = 0.2V; = 65. The LED is turned on at VLED = 1.4V and ILED > 15mA. Also its maximum dissipated power is PMax = 100mW. On the other hand, the microcomputer output resistance is RB=1k and its

output voltage levels corresponding to the off and on states are VOFF = 0V and VON = 5V, respectively. Also it can provide an output current no more than 5 mA.


The transistor large signal model can be used to find the collector resistance RC for

this application. It is also required to check if the power dissipated by the LED doesn’t exceed the maximum limit.

When the microcomputer voltage is V1 = VOFF = 0, the transistor is obviously in its

cut – off region since the BE junction is reverse biased. Thus IB = 0, and therefore IC 0 also, so the LED is off (fig. 3.13 b).

On the other hand, when the microcomputer voltage is V1 = VON = 5V, the transistor has to be biased in its saturation region. It follows that the device can be replaced by DC voltage sources: VBE0 = 0.6V between the base and the emitter and VCEsat = 0.2V

between the collector and the emitter, respectively (fig. 3.13 c).

The Kirchhoff second law written for the loop on the right gives:

C

satCELEDCC

CI

VVVR

,

Fig. 3.12 The large signal models of the BJT: a) Cut – off mode – bottom; b) Active mode - top right hand corner; c) Saturation – top left hand corner.

Saturation

vCE

0

iC

Cut-off

Active Region

IB

+

- + -

IC

C

B

E

VCE, sat

VBE IB

+ -

C

B

E

IC=IB

VBE

C

B

E

ICE0 0

VCE,Sat

ICE0

________________________________________________________________

At the same time,

mAII LEDC 15

Therefore, it follows that

22015

2.04.15CR

If for example the chosen collector resistance

is RC = 110 , then the collector current will be

mAIC 3011.0

2.04.15

In this last case, the power dissipated by the LED

mWmWVIP LEDCLED 100424.130

doesn’t exceed the maximum power limit PMax

It can be noticed that the transistor in this example works indeed in the saturation

mode. Evidently, the collector voltage VC = VCE,sat = 0.2V is smaller than the base voltage VB= VBE0 = 0.6V, and thus the BC junction is forward biased (like the BE

junction). From the left loop it can be drawn that

IB = 0

RB

1k VE

VBE0 VI=0

IC

VLED

RC

5V +VCC

VC

B ICE0 0

Fig. 3.13 b) BJT replaced by its cut-off model (left); c) BJT replaced by its saturation model (right)

IB

RB

1k VE

VBE0

VI=5V

IC

VLED

RC

5V +VCC

VC

+

- + -

IC

VCE, sat VB

Fig. 3.13 a) LED driver circuit

IC

IB

VLED

RC

5V +VCC

RB

VC

1k VE

VCE

VBE0

V1


mAR

VVI

B

BEONB 4.4

1

6.050

However, it can be seen that equation (3.2b) cannot be applied here anymore since it will lead to a different result:

mAII BC 4184.495

3.4. BJT Small Signal Model

The small signal models of the BJT are based on the fact that the transistor characteristics can be assumed linear in the neighborhood of the operating point. These

models can be applied when the amplitudes of voltages and currents are much smaller than the values from the Q point. Typically, the small signal condition is given by

CmVVV thbe 25/25 (3.27)

This condition is usually satisfied in practice (e.g. amplifiers used to magnify low

level voltages acquired by various sensors).

There are known many models which approximate the dynamic behavior of a BJT

such as the natural model (also known as the Giacoletto model), the hybrid parameter (h-parameter) model, etc.

In the following discussion, the hybrid parameter model is used. According to this representation the

transistor is regarded as a quadripole (a two port device). The base and emitter terminals represent

the input port, denoted 11’ (fig. 3.14). In the same manner, the collector and emitter terminals form

the output port, 22’. Obviously, in this representation the emitter is common between the two ports.

The transistor is thus modeled as a “black box” with its properties

defined by a matrix of parameters, specified also in the device data sheets:

2

1

2221

1211

2

1

v

i

hh

hh

i

v

ee

ee (3.28)

where the index e denotes the fact that the transistor has the common emitter connection. Equivalently, it can be written that:

C

B

E

i2 = iC

i1= iB

v1 = vBE

v2 = vCE 1

1’

2

2’

Fig. 3.14 Transistor modeled as a quadripole (two – port device)

________________________________________________________________

2221212

2121111

vhihi

vhihv

ee

ee (3.29)

Thus the first parameter h11e is defined as the input impedance when the output voltage variation around the Q point is zero:

01

111

2

v

d

ei

vh (3.30)

Knowing that

CBCEBE iiiivvvv 2121 ;;; (3.31)

it follows that graphically, the h11e parameter represents the slope to the input

characteristic, taken in the Q point (fig.3.15), since evidently it can also be written as:

constvb

bee

CE

I

Vh

11 (3.32)

where Vbe, Ib denote the small signal amplitudes of voltage and current.

Sometimes h11e is also denoted hie, to indicate an input parameter. Typically it

ranges within a few kilo ohms, h11e = 2k … 4 k.

Fig. 3.15 Graphical interpretation of the h11e parameter

vBE 0

iB

VBEQ

Q

IBQ

vbe

t

Vbe

tg h11e

BJT input characteristic for vCE = VCE

Q

The Load line

Linear approximation

around the Q point

ib

t Ib


The second parameter denoted in (3.28) with h12e is defined as the input to output

voltage ratio, thus is a dimensionless quantity. It represents the reverse voltage gain factor when the input is open:

02

112

1

i

d

ev

vh (3.33)

In terms of transistor voltages and currents, equation (3.33) can be written as:

.

12

constice

bee

B

V

Vh

(3.34)

Fig. 3.16 presents the graphical interpretation of this parameter. In the literature it is also denoted hre (reverse parameter). Typically,

4

12 10eh

but in practice it is usually neglected.

Another h- parameter, denoted h21e in (3.28) is

the current gain factor computed when the output voltage variation is zero:

01

221

2

v

d

ei

ih (3.35)

It is also identical with:

.

21

constvb

ce

CE

I

Ih

(3.36)

This parameter represents the current gain of the BJT and is approximately equal to

the transistor parameter described by (3.1) – (3.2). In the literature it is also denoted

with hfe (forward parameter). The graphical interpretation of h21e is shown in fig.3.17a.

Finally, the last parameter in (3.28) is h22e. It is defined as the output admittance

when the output is kept open:

02

222

1

i

d

ev

ih (3.37)

Clearly it can also be expressed in terms of transistor voltages and currents as:

.

22

constice

ce

B

V

Ih

(3.38)

0

iB

Q

vBE

IBQ

VBEQ

iB = const.

2Vbe

VCEQ

2Vce

Fig. 3.16 Graphical interpretation

of the h12e parameter

________________________________________________________________

Its graphical interpretation is depicted in fig. 3.17 b. This parameter indicates that

the output characteristic is not exactly flat. Precisely, h22e represents the slope of the output characteristic with the horizontal axis, in the Q point. It has units of

conductance (i.e. Siemens). Typically, h22e 10-5 S, or h22e-1 100 k. In many

applications this parameter can be neglected. In the literature this h22e is also denoted

hoe (specifying an output parameter).

Assembling the previous definitions, the BJT small signal model for medium

frequencies can be derived and is presented in fig. 3.18.

vCE 0

iC

Q IBQ

VCEQ

ICQ

2Ic

2Vce

tg h22e

vCE 0

iC

Q IBQ

VCEQ

ICQ

2Ic IB

Q + Ib

IBQ - Ib

Fig. 3.17 Graphical interpretations of the BJT small signal h parameters:

a) h21e (vCE = VCEQ = const.) – top; b) h21e (iB = IB

Q = const.) – bottom.


3.5. The Transconductance

Another useful small signal parameter is the transfer conductance or simply the

transconductance. It is defined as the local slope of the transfer characteristic (fig. 3.19) and is denoted with gm:

intintint poQbe

b

b

c

poQbe

c

poQBE

Cd

mV

I

I

I

V

I

v

ig

(3.39)

Therefore the transconductance can be expressed in mA/V. Taking into consideration

the equations (3.32) and (3.36), it follows immediately that gm can also be written as:

e

em

h

hg

11

21 . (3.40)

On the other hand, it can be shown that:

CmVq

kTV

V

Ig th

th

Q

Cm 25/25; (3.41)

C B

E

i2 = Ic i1= Ib

v1 = Vbe v2 = Vce

1

1’

2

2’

~

E

h11e

h12eVce

1

h22e

h21eIb

Neglected parameter

C B

E

Ic Ib

Vbe Vce

1

1’

2

2’ E

h11e h21eIb

Fig. 3.18 BJT h-parameter small signal model for medium scale

frequencies: a) Complete diagram (top); b) Simplified model (bottom)

________________________________________________________________

Thus, assuming the room ambient temperature (25ºC), in most applications the

transconductance can be computed as:

Q

Cm Ig 40 (3.42)

It can be noticed that the collector current in the BJT h- parameter model (fig. 3.18) can also be computed in terms of the transconductance:

bembmebec VgIghIhI 1121 (3.43)

3.6. Using the h- Parameter Model in AC Circuit Analysis

Fig. 3.20 a presents a typical voltage amplifier using a single BJT - common emitter connection. It can be observed that this circuit contains two voltage sources. The DC voltage source VCC is required for biasing the transistor in the active region so

that it can work as an amplifier. On the other hand, the AC source vg provides the variable signal to be amplified.

Usually it is more convenient to analyze such circuits in two steps, applying the superposition theorem. The DC analysis can be performed first, by considering inactive the AC source vg. The DC components of voltage/ currents can be computed for

example by following the general algorithm described in section 3.2, fig. 3.8. The AC analysis can be done next, in order to determine the small signal components which are superimposed over their DC values. Typically, the quantities which are usually

tg gm

BJT transfer characteristic for vCE = VCE

Q

The Load line

Linear approximation

around the Q point

vBE 0

iC

VBEQ

Q

ICQ

vbe

t

Vbe

ic

t Ic

Fig. 3.19 Graphical interpretation of the BJT transconductance, gm


required when performing the AC analysis are the voltage gain, Av and the input /

output circuit resistances Ri and Ro, respectively, as defined below:

.;

;

0

gVo

od

o

i

id

i

i

od

v

I

VR

I

VR

V

VA

(3.44)

This amplifier can also be referred as a two port circuit (fig. 3.20 b) for which the quantities defined in (3.44) are sufficient to describe its functionality.

VBE0

RC RB1

RL

RB2

VCC +15V

+1600 5V

Vo

vO Vi

vi 3k

ICQ

5k

50k50k

~

Rg

Vg

600

IC

Q

CE

C1

C2

VCEQ

VB

VC

VE

ICQ

ID

+

-

RE

~

Vg +

-

-

RL Vo vO Vi

vi 50k

50k

Rg

~

600

600

vg ~ AvVi

+

Ro

-

Ri

Ii Io

Fig. 3.20 Voltage amplifier. a) Typical single transistor diagram

(top); b) Two-port equivalent circuit (bottom)

Ii

________________________________________________________________

In the above diagram depicted in fig 3.20a, the capacitors are chosen such that at

the working frequency (usually a few kilohertz), their reactance can be neglected,

compared to the circuit resistances. For example, if the capacitor value is chosen 1 F its reactance at 5 kHz will not exceed 100 ohms.

321010514.32

1

2

1163fCC

X C

Like in the DC case, an algorithm can be developed for performing the AC analysis too. The steps of this procedure are being summarized in fig. 3.21.

Thus in the first step, the AC equivalent circuit has to be plotted, taking into account that all capacitors can now be replaced by

shortcircuits (wires). In addition to this, the DC voltage source VCC is passivated and can also be replaced by a shortcircuit between its terminals.

The AC equivalent circuit for the amplifier presented in fig. 3.20a is shown in fig. 3.22a.

Next, the transistor can be replaced by its simplified h-parameter small-signal model discussed in section 3.4, fig 3.18b. The resulted

diagram for the current example is shown in fig. 3.22b.

The currents and voltages will be marked on the new circuit usually using small letters (for variations), or capital letters with small

subscripts (for amplitudes). The transistor currents/ voltages will respect their conventional directions.

The BJT the small signal parameters h11e and gm can be found with the help of the equations

(3.40) and (3.42), and the value of the collector current from the Q point, computed in the DC analysis stage.

Next, linear circuit equations can be written for the AC diagram using the Kirchhoff laws,

Ohm’s law, the voltage divider rule, etc.

Finally, the AC required quantities such as

the voltage gain, the input and output resistances, can be computed from their definitions (3.44) and the equations written in

the previous step.

Fig. 3.21 General algorithm for AC analysis of transistor circuits

1. Plot the AC

equivalent circuit

2. Replace the

transistor by its small signal model

3. Mark voltages

and currents

4. Compute the

transistor small-signal parameters

5. Write circuit

equations

6. Solve to find the

AC quantities


Example 3

For the amplifier shown in fig. 3.20a, knowing that the transistor has min = 50 and VBE0 = 0.6 V the first question is to find the base resistances RB1 and RB2 such that a

maximum voltage gain is obtained and in the same time the output signal is free of distortions.

In this situation, the voltage, current and power gains are to be computed, together with the amplifier’s input and output resistances, given the fact that h21e = 200.

Finally, the value of the coupling capacitors C1 and C2 are required, that will permit

the transistor to operate in the audio range.

For this example, the load line equation, the optimum Q point and the emitter and

base voltages are given by (3.17) – (3.21), as shown previously in section 3.2. The base resistors RB1 and RB2 can be computed in a similar way as in Example 1. Thus, for

min= 50, the current flowing through the base voltage divider can be taken

mAI

IIQ

CBMaxD 19.01010

min

Therefore, the base resistances can be chosen accordingly:

kI

VR

kI

VVR

D

BB

D

BCCB

1819.0

4.3

6119.0

4.315

2

1

In order to perform the AC analysis of the amplifier, the corresponding AC

equivalent circuit is derived (fig. 3.22), by following the steps specified in the general algorithm described previously (fig. 3.21).

Fig. 3.22 AC equivalent circuit for the amplifier in fig. 3.21

C

B

E

Ic

Ib

~ Vg

+ -

-

Vi vi

Rg

~

600600

vg

Ii

Vo vi

RB2

61 k

vg

RC RL

5 k

vg

50 k

vg

T

Ri,T Ri

RB1

18 k

vg

Io

________________________________________________________________

Here Ri,T denotes the transistor input resistance, defined by

b

id

TiI

VR , (3.45)

Fig. 3.23 presents also the AC circuit with the transistor replaced by its equivalent

small signal h-parameter simplified model (fig. 3.18).

In this equivalent diagram

kRRR BBB 14||21

(3.46)

It can be noticed that the input transistor resistance can be derived from Ohm’s Law:

e

b

iTi hI

VR 11, (3.47)

and the parameter h11e can be computed from (3.40) - (3.42):

kI

h

g

hh

Q

C

e

m

ee 7.4

94.040

200

40

2121

11

Consequently, the input amplifier resistance will be in this case

TiTiB

i

ii RkkkRRI

VR ,, 4.37.4||14|| (3.48)

The voltage gain can be written as a product of three fractions

i

b

b

c

c

o

i

ov

V

I

I

I

I

V

V

VA

where each term can be computed easily. Thus,

Fig. 3.23 AC diagram for the amplifier in fig. 3.21 with the transistor replaced by its small signal model

Ib

~ Vg

+

-

-

Vi vi

Rg

~

600600

vg

Ii

Vo vi

RB

14 k

vg

RC||RL

4.5k

vg

Ri,T Ri

C B

E

Ic Ib

Vbe Vce

E

h11e h21eIb

(gmVbe)


.1695.494.040||

1||

1||

11

21

,

21

LCm

e

eLC

Ti

eLC

i

b

b

c

c

ov

RRg

hhRR

RhRR

V

I

I

I

I

VA

(3.49)

The minus sign in the voltage gain expression (3.49) indicates the fact that the phase shift between the output and the input voltage is 180º.

Also, noticing that the input signal generator resistance Rg and the input amplifier equivalent resistance Ri form a voltage divider, the voltage gain relative to the voltage

source Avg, can be written as:

1436.04.3

4.3169

gi

iv

g

i

i

o

g

ovg

RR

RA

V

V

V

V

V

VA (3.50)

The output resistance of the transistor Ro,T is defined as the equivalent resistance seen at the output of the device, when the input is short circuit to the ground while an external source is connected at the output (fig. 3.24). In this case the base current Ib=0

and consequently Ic=0. It follows therefore that :

0

,

gVc

od

ToI

VR (3.51)

Thus, the output resistance of the amplifier will be:

kRRRI

VR CToC

Vo

od

o

g

5|| ,

0

(3.52)

In a similar manner, the current gain Ai of the amplifier can be put in the form:

Fig. 3.24 Circuit configuration for computing the output resistances

C

B

E

Ic

Ib=0

Vi=0

vi

Rg

~

600600

vg

Vo vi RB

14 k

vg

RC RL

5 k

vg

50 k

vg

T

Ro,T Ro

Io

________________________________________________________________

i

b

b

c

c

o

i

oi

I

I

I

I

I

I

I

IA (3.53)

The first and the last fractions in (3.53) can be computed by applying the current divider rule, it follows that:

13,

21

TiB

Be

LC

Ci

RR

Rh

RR

RA

Finally, the power gain Ap will be given by:

1859

iv

ii

oo

i

op AA

IV

IV

P

PA

In conclusion, the transistor in this example amplifies both voltage and current, and thus amplifies in power.

The capacitors C1 and C2 in the amplifier diagram in fig.3.20a are designed to perform the coupling of the AC source and the load to the remainder of the circuit (For this reason they are called coupling capacitors). Basically, they have to provide

separate paths for the DC and AC components in the circuit. Evidently, they act as open circuits for the DC voltages and currents, allowing the transistor to be biased in the active region, so it may work as an amplifier. On the other hand, their impedances

have to be negligible at the working frequencies, so they can act as short circuits, thus connecting the AC source and the load to the amplifier. The emitter capacitor CE (called emitter bypass capacitor or decoupling capacitor) serves a similar purpose, i.e.

to provide a stable DC bias point and on the other hand, to increase the amplifier gain.

The audio frequency domain is considered between 20 Hz and 20 kHz. It follows

that the capacitive reactance of C1 has to be much smaller than the equivalent resistance “seen” by the capacitor between its terminals.

ig

L

C RRCf

X 12

11

(3.54)

even at the lowest frequency fL = 20 Hz. Thus, C1 >> 2F. For example it can be

chosen 22F, a standard value. In a similar way,

Lo

L

C RRCf

X 22

12

(3.55)

Therefore, C2 >> 0.14 F, so its value can be chosen for example 2F.

Finally, the emitter bypass capacitor “sees” across its terminals two resistances connected in parallel: RE and the equivalent resistance of the transistor between its

emitter and ground, Ri,TE (fig. 3.25)

1

||||

21

11

21

11

,

e

gBe

beb

bgBbe

e

eTEi

h

RRh

IhI

IRRIh

I

VR (3.56)


It can be noticed in (3.56) that Rg << RB and thus Rg || RB Rg . Therefore,

121

11

,

e

ge

TEih

RhR (3.57)

After replacing the corresponding values, Ri,TE 26, which is a small resistance. The bypass emitter capacitor has to be chosen such that

TEiE

EL

CE RRCf

X ,||2

1

(3.58)

or

F

RRfC

TEiEL

E

300||2

1

,

The capacity for this case can be chosen at least ten times higher than the computed

value, i.e. 3000F, which is a high capacity. Yet in practice it would be reasonable to

select a somewhat a smaller value (e.g. 1000 F).

C

B

E

Ie

Ve

Ic

Ib RC||RL

Rg||Ri

C

B

E

Ie

Ve

Ic

Ib

RC||RL

Rg||Ri

E

Ib Vbe h11e

Fig. 3.25 Circuit configuration for computing equivalent resistance

in the emitter of the BJT

electronic devices

Documents

base emitter

base b

emitter current

base current

pnp transistor

pnp type transistor

transistor operation

transistor functionality