eet 1131 unit 14 memory and storage read kleitz, chapter 16. lab #14 due next week. final exam...

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EET 1131 Unit 14 Memory and Storage Read Kleitz, Chapter 16. Lab #14 due next week. Final Exam next week.

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Page 1: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

EET 1131 Unit 14Memory and Storage

Read Kleitz, Chapter 16. Lab #14 due next week. Final Exam next week.

Page 2: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

• Bit: The smallest unit of digital data, a single 1 or 0.

• Byte: A group of 8 bits.

• Nibble: A “half-byte”: a group of 4 bits.

• Word: Used in two ways:

• Sometimes means 2 bytes (or 16 bits).

• Sometimes means the data width that a particular chip or system uses: could be 4 bits, 8 bits, 16 bits, 32 bits, etc.

Terms for Units of Data

Page 3: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

Kilo-, Mega-, Giga-

• In engineering notation,

• Kilo means 1,000 (the same as 103)

• Mega means 1,000,000 (same as 106)

• Giga means 1,000,000,000 (same as 109)

• When talking about memories, these terms have slightly different meanings:

• Kilo means 1,024 (the same as 210)

• Mega means 1,048,576 (same as 220)

• Giga means 1,073,741,824 (same as 230)

Page 4: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

Making Sense of Windows File Sizes

• Have you ever noticed that when you use Windows to look at a file’s size, it gives two numbers that don’t seem to match each other?

• Example: “Size on disk: 624 KB (638,976 bytes)”

• That’s because 624 x 1024 = 638,976.

• How many megabytes (MB) is in a file that contains 28,311,552 bytes?

Page 5: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved

The location of a unit of data in a memory is called the address. In personal computer memories, a byte is the smallest unit of data that can be addressed.

Memory Units

For example the blue byte is located in address 6.

Page 6: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

• A computer system has two primary busses:

• The data bus, which carries data and instructions from one part of the system to another.

• The address bus, which carries addresses of memory locations or external devices.

• These two busses may have the same width (number of bits), but they need not.

• When people talk about a “16-bit system” or a “32-bit system,” they’re talking about the width of the data bus.

Computer Busses

Page 7: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved

Write Operations

The two main memory operations are called read and write. A simplified write operation is shown in which new data overwrites the original data. Data moves to the memory.

1. The address is placed on the address bus.

2. Data is placed on the data bus.

3. A write command is issued.

7

6

5

4

3

2

1

0

0 0 0 0 1 1 1 1

1 1 1 1 1 1 1 1

1 0 0 0 1 1 0 1

0 0 0 0 0 1 1 0

1 1 1 1 1 1 0 0

1 0 0 0 0 0 0 1

0

1

0

0

1

1

0

0

1

1

0

1

0

1

1

1

1 0 1

1

0 0 1

2

01 1 0 1

3

Address register Data register

Address bus

Address decoder Byte organized memory array

Write

Data bus

Page 8: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved

Read Operations

The read operation is actually a “copy” operation, as the original data is not changed. The data bus is a “two-way” path; data moves from the memory during a read operation.

1. The address is placed on the address bus.

2. A read command is issued.3. A copy of the data is placed

in the data bus and shifted into the data register.

7

6

5

4

3

2

1

0

0 0 0 0 1 1 1 1

1 1 1 1 1 1 1 1

1 0 0 0 1 1 0 1

0 0 0 0 0 1 1 0

1 1 0 0 0 0 0 1

1 0 0 0 0 0 0 1

0

1

0

0

1

1

0

0

1

1

0

1

0

1

1

1

0 1 1

1

0 0 0

3

11 0 0 1

2

Address register Data register

Address bus

Address decoder Byte organized memory array

Read

Data bus

Page 9: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

Some Common Address Bus Widths

• An address bus’s width (in bits) determines the number of locations it can address:

Width of Address Bus Number of locations

8 bits 256

10 bits 1 K

16 bits 64 K

20 bits 1 M

24 bits 16 M

32 bits 4 G

Page 10: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

Powers of 2

• Here’s a handy table showing the powers of 2 up to 240.

• You can use a table like this to answer the following questions:

1. How many addressable locations are there in a memory with n address bits?

2. How many rows are there in a truth table with n input variables?

3. What is the MOD of an n-bit counter?

Page 11: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

• The size and organization of a memory chip is given by a designation such as 16 x 4.

• The first number (16 in our example) tells how many addressable locations the chip contains.

• The second number (4 in our example) tells how many bits are contained in each of these addressable locations.

• Thus, an 8 x 8 chip, a 16 x 4 chip, and a 64 x 1 chip all have a bit capacity of 64 bits, but they’re organized differently.

Designating a Memory Chip’s Size & Layout

Page 12: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

• We can tell how many address pins a memory chip needs by looking at the first number in its designation.

• For example, a 16 x 4 chip has 16 addressable locations. How many address pins are needed if we want to be able to select any one of these 16 locations?

• How many address pins would an 8 x 8 chip need?

• How many address pins would a 64 x 1 chip need?

Address Input Pins

Page 13: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

• We can tell how many data output pins a memory chip needs by looking at the second number in its designation.

• For example, on a 16 x 4 chip, each location contains 4 bits, so to read out the contents of any location, we need 4 data output pins.

• How many data output pins would an 8 x 8 chip need?

• How many data output pins would a 64 x 1 chip need?

Data Output Pins

Page 14: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

• Some memory chips are read-only memories (ROMs). These chips don’t have data input pins because you cannot change the contents of the memory locations.

• Other memory chips are read-write memories (confusingly called RAMs, for “random-access memory”). These may have data input pins that are separate from the data output pins, or the pins may be combined as data input/output (I/O) pins.

Data Input Pins?

Page 15: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved

Memory Addressing

In addition to address pins and data pins, memory chips usually have other input pins for control signals. These may include the following signals:

Chip Select (CS) or Chip Enable (CE) is used as part of address decoding. All other inputs are ignored if the Chip Select is not active.

Read Enable (RE) and Write Enable (WE) signals are sent from the CPU to memory to control data transfer to or from memory.

Output Enable (OE) is active during a read operation, otherwise it is inactive. It connects the memory to the data bus.

Page 17: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

• A computer’s memory consists of many memory chips, which may be organized in different ways.

• Example: in the tiny memory below, each byte may be contained on a single chip, or may be spread across two or more chips.

Computer Memory

Page 18: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved

Memory Expansion

Memory can be expanded in either word size or word capacity or both.

To expand word size:

m bits

m bitsAddress

bus

m bits

2n bits

Controlbus

Data bus

RAM 2m ́2n

Datain/out

RAM 22m ́ n

RAM 12m ́ n

Datain/out

DD

n bits n bits

Notice that the data bus size is larger, but the number of addresses is the same.

Page 19: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved

Databus

RAM 2M ́8

Addressbus

21 bits

Controlbus

20 bits

EN

EN

RAM 21M ́8

RAM 11M ́8

8 bits

8 bits

8 bits

20 bits

Memory Expansion

To expand word capacity, you need to add an address line as shown in this example

Notice that the data bus size does not change.

What is the purpose of the inverter?

Only one of the ICs is enabled at any time depending on the logic on the added address line.

Page 20: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

• A computer’s memory consists of many memory chips.

• Some of the bits on the address bus are used to select one of these chips (and to de-select all of the others).

• The remaining bits on the address bus are used to select a memory location within the selected chip….

Computer Memory

Page 21: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

• Example: Suppose a computer’s memory consists of 32 memory chips, each of which is 2048 x 8.

• How many bytes does the computer’s memory contain?

• How many bits are needed to select one of the 32 memory chips?

• Once a chip has been selected, how many bits are needed to select a memory location within that chip?

• How many bits wide does this system’s address bus need to be?

Computer Memory (Continued)

Page 22: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

• A computer system typically has one or more small, high-speed cache memories in addition to its large, slower main memory.

• Recently used data and instructions are temporarily stored in the cache memory so that if the processor needs them again, they can be retrieved more quickly than if they had to be retrieved from the main memory.

• See figure on next slide.

Cache Memory

Page 23: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

Copyright ©2009 by Pearson Higher Education, Inc.Upper Saddle River, New Jersey 07458

All rights reserved.

Digital Fundamentals, Tenth EditionThomas L. Floyd

Block diagram showing L1 and L2 cache memories in a computer system.

Page 24: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

• Most memory chips fall into one of the following two categories (which have many subcategories).

1. RAM (Random Access Memory)• Read/write• Volatile (Loses data when power is removed.)

2. ROM (Read-Only Memory)• Impossible or difficult to write to• Non-volatile

Memory Technologies

Page 25: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved

• RAM is for temporary data storage. It is read/write memory and can store data only when power is applied, hence it is volatile. Two major categories are static RAM (SRAM) and dynamic RAM (DRAM).

• The memory cells in SRAM are latches or flip-flops.

• The memory cells in Dynamic RAMs (DRAMs) are capacitors. Since the capacitors lose charge, they must be refreshed many times each second.

Random Access Memory (RAM)

Page 26: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10th ed

Types of RAM

Latch or flip-flopstorage cell.

Capacitor storage cell. Must be refreshed.

High-density but slow. Used for main memory.

Fast but low-density. Used for cache memory.

Page 27: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved

Read-Only Memory (ROM)

• Members of the ROM family are all considered non-volatile, because they retain data with power removed.

• Various members can be either permanent memory (truly read-only) or erasable (not truly read-only, but they are more difficult to write to than RAM).

• ROMs are used to store data that is never (or rarely) changed, such as system initialization files.

Page 28: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10th ed

Types of ROM

Data written by the manufacturer, and can never be changed.

Data written by the user, and can never be changed.

Data written by the user, and can be changed with some difficulty.

Page 29: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved

Read-Only Memory (ROM)

A ROM symbol is shown with typical inputs and outputs. The triangles on the outputs indicate it is a tri-stated device.

ROM 256́ 4

0

&EN

7

A0

255

D

D

D

D

To read a value from the ROM, an address is placed on the address bus, the chip is enabled, and a short time later (called the access time), data appears on the data bus.

Address input lines

A0

A1

A2

A3

A4

A5

A6

A7

E0

E1

O0

O1

O2

O3

Data output lines

Address input lines

Data outputs

Address transition

Data output transition

ta

Chip select

Valid data on output lines

Valid address on input lines

Page 30: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved

PROMs, UV EPROMs and EEPROMs

PROMs are programmable ROM, in which a fused link is burned open during the programming process. Once the PROM is programmed, it cannot be reversed.

A UV EPROM can be erased by exposure to UV light through a window. To program it, a high voltage is applied to VPP and OE is brought LOW.

EPROM2048 ́ 8

&EN

0

10

02047A

D

D

D

D

D

D

D

D

O0

O1

O2

O3

O4

O5

O6

O7

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

CE/PGM

OE

VPP

Another type of erasable PROM is the EEPROM, which can be erased and programmed with electrical pulses.

Page 31: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

Copyright ©2009 by Pearson Higher Education, Inc.Upper Saddle River, New Jersey 07458

All rights reserved.

Digital Fundamentals, Tenth EditionThomas L. Floyd

Figure 10.29 MOS PROM array with fusible links. (All drains are commonly connected to VDD.)

Page 32: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved

Flash Memory

Flash memories are high density read/write memories that are nonvolatile. They have the ability to retain charge for years with no applied power.

Flash memory uses a MOS transistor with a floating gate as the basic storage cell. The floating gate can store charge (logic 0) when a positive voltage is applied to the control gate. With little or no charge, the cell stores a logic 1.

Controlgate

Floatinggate Drain

Source

MOStransistorsymbol

––––––

––––––

logic 0 is stored logic 1 is stored

Page 33: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

Copyright ©2012 by Pearson Education, Inc.All rights reserved.

Digital Electronics: A Practical Approach with VHDL, 9th EditionWilliam Kleitz

Here’s a good summary table from p. 777 of our textbook.

Page 34: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

• “Memory” refers to semiconductor devices of the kinds we’ve been discussing (RAM, ROM, Flash).

• “Storage” refers to non-semiconductor non-volatile devices used to store huge quantities of data. Major categories include:

• Magnetic disk (such as computer hard drives)

• Magnetic tape

• Optical disk (CDs and DVDs)

Memory versus Storage

Page 35: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved

Magnetic Hard Drive

The magnetic hard drive is the backbone of computer mass storage and is applied to other devices such as digital video recorders. Capacities of hard drives have increased exponentially, with 1 TB (1 trillion bytes!) drives available today. Spindle

Platters

Actuatorarms

Read/Writeheads

Case

Hard drive with cover removed

Page 36: EET 1131 Unit 14 Memory and Storage  Read Kleitz, Chapter 16.  Lab #14 due next week.  Final Exam next week

© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved

Optical Storage

The compact disk (CD) uses a laser to burn tiny pits into the media. Surrounding the pits are flat areas called lands. The CD can be read using a low-power IR laser that detects the difference between pits and lands.

Binary data is encoded with a special method called negative non-return to zero encoding. A change from a pit to a land or a land to a pit represents a binary one, whereas no change represents a zero. A standard 120 mm CD can hold approximately 700 MB of data.