eem336 week02 addr modes 4pp

Week 2: Addressing Modes 1

Machine Code

The commands the CPU understands


Machine Code

A set of binary codes that are recognised and executed directly by a particular CPU


Machine Instructions

• An individual machine code is called a Machine Instruction– e.g. the machine instruction to add 1 to the

value in accumulator A is 01001100• The set of all codes recognized by a

particular CPU is known as its Instruction Set


Machine Instructions

• A typical machine instruction consists of an operation code (op-code), which specifies what operation the CPU is to do, plus a number of arguments, which specify what data the CPU is to operate on– e.g. the machine instruction to add 2 to the

value in accumulator A is 10001011 00000010


What Do/Can Machine Instructions Do?

• We can group the instructions according to function. The groups given here are generally applicable to most instruction sets (i.e. they apply to the machine code for most types of processor)


Instructions: Data Transfer

• From where, to where?• load (e.g. from memory to a register)• store (e.g. from a register to memory)• move (e.g. from register to register)• …


Instructions: Computations• The arithmetic and logical operations,

normally carried out by the ALU(Arithmetic Logic Unit)

• What might this include?– add– subtract– increment– invert bits – … and more


Instructions: Flow Control

• A computer program is not a lot of use without loops, functions, etc.

• We need to have machine codes to control the flow of execution through a machine code program

• Branching, jumping to subroutines, returning from subroutines


Instructions: Others

• You’ll come across other types of instruction as the course proceeds

• The bulk, however, fall into the three categories already mentioned:– Data transfer– Computations– Flow control


Example machine codes(68HC11 CPU)

• The 68HC11 CPU is the one we’ll be looking at in this course

• The codes that follow apply to the whole 68HC11 family of microcontrollers

• The CPU has the following characteristics:– an 8-bit word length– a 16-bit address space– memory-mapped I/O

What does this mean?

If you don’t know, it’s time to revise!


68HC11 Register Set

• Every CPU contains a set of registers which are available to the machine-code programmer

• You’ve seen two of these already:– the Program Counter (PC)– the Accumulator

• You need to know about these registers before you can start writing machine-code programs


The Programmer’s Model• This is the way a programmer needs to view

the CPU• As a programmer, you don’t necessarily

need to know about what we’ve learnt before regarding the internals, but you need to know what’s sometimes termed the Programmer’s Model of the CPU


68HC11 Architecture: Programmers Model

7 Accumulator A 0 7 Accumulator B 0

15 Double accumulator D 0

15 Index register IX 0

15 Index register IY 0

15 Stack pointer 0

15 Program counter 0

S X H I N Z V C

A:B

D

IX

IY

SP

PC

CCR Condition Code RegisterCarryOverflowZeroNegativeI interrupt maskHalf-carry (from bit 3)X interrupt maskStop disable


Instruction: LDAA immediatemnemonic: LDAAop-code: 86 (hex)operation: Load accumulator A with the

8-bit value immediately following the op-code

dd86

increasing addresses

op code for LDAA

data to be loaded


Instruction: LDAA directmnemonic: LDAAop-code: 96 (hex)operation: Load accumulator A with the

contents of memory locationgiven by 8-bit number following the op-code

dd96


op code for LDAAaddress of data to be loaded


Why two instructions with the same mnemonic?

• They perform the same operation, but the source is different

• We say they use different addressing modes• Customarily, the same mnemonic is used for all

operations that perform essentially the same operation, and differ only in their addressing modes

• It’s the syntax (in assembly code) which differentiates them


Addressing Modes ExampleLDAA immediate to load the value (decimal) 30 into

accumulator A would be written:LDAA #30

LDAA direct to load the contents of address 30 into accumulator A would be written:

LDAA 30

The # sign distinguishes between them

Week 2: Addressing Modes

Memory consists of addressable locations. A memory location has 2 components:

Data transfer between CPU and memory involves address bus and data bus

CPU memory

address bus lines

data bus lines

address contents

Memory Addressing


Endian-ness

• 68HC11 is a big endian microprocessor. • When we write a 16 bit in a memory

location, the first byte of memory containsthe high portion of the 16 bit number.

• Big Endianà Big End in First• Small Endianà Small end in First• Intel 80x86, Pentium processors are the

examples of Small Endian machines.


Machine Language Execution

How Machine Language ProgramsAre Executed on the CPU?


Machine Language Execution• Each machine language instruction consists of an operation code

(opcode) and zero or more operands.• Operands are the data or the location of the data to be used in

performing the specified operation.• Often some operands are implicit in the opcode.• Each instruction occupies some number of consecutive bytes of

memory and the machine program consists of a sequence of instructions stored consecutively in memory.

• A special register called the program counter (PC) in the controlunit of the CPU contains the address of the next byte of instructioncode to be fetched.

• Unless the program directs otherwise, instructions are executed in the sequence they are stored in memory.


The Instruction Execution Cycle68HC11 Example

LOAD: copy the content of a memory location into a register in CPULDAA $D000 load the content of memory at

address $D000 into register A

ADD: add the content of a memory location to a register in CPU and store the result in register.ADDA $D001 add the content of memory at

address $D001 to register A andstore the result in register A.

STORE: store the content of a register into a location in memorySTAA $D000 store the content of accumulator/

register A into memory at address$D000.


AssemblyßàMachine CodeAssembly language facilitates to write programs for humans. Assembler converts assembly programs to machine code.

LDAA $D000

ADDA $D001

STAA $D000

Assembly languageprogram

..B6D000BBD001B7D000..

Machine code equivalentstarting at $C000

AssemblerLDAA $D000

ADDA $D001

STAA $D000


Instruction Code and Operands..B6D000BBD001B7D000..

LDAA $D000

ADDA $D001

STAA $D000

instruction codeoperand



Different instructions may need different number ofoperands or sometimes none at all. In the above

program, all operands are two-byte numbers.


LDAA $D000• Step 1: Assume PC=$C000. $C000 is

placed on A-bus and READ issued.• Step 2: 8-bit content at location $C000($B6) is returned on data bus and place in the Instruction Decode Register (IDR) in thecontrol unit.– PC is incremented by 1 to become $C001– The machine instruction loaded into IDR will be

analyzed to understand what to do next in thecontrol unit.


LDAA $D000 ($B6 $D0 $00)

CPU

IDR

..$B6 [$C000]$D0 [$C001]$00 [$C002]$BB [$C003]$D0 [$C004]$01 [$C005]$B7 [$C006]$D0 [$C007]$00 [$C008]..$19 [$D000]$37 [$D001]..

Step 1: A-bus ($C000-READ)

Step 2: $B6 is returnedon D-bus. PC ß $C001


LDAA $D000 ($B6 $D0 $00)• Step 3: Control unit (decoder) recognizes LOAD

instruction. This instruction needs 2-byte value foroperand address.– Issues two READ cycles:

• address bus-READ-$C001à data bus returns $D0• address bus-READ-$C002à data bus returns $00

– At the end PC becomes $C003• Step 4: Execution of the instruction ($B6) needs

the content of location $D000. A READ is issuedwith address = $D000 à data bus returns $19 andthat is put into register A.


CPU

IDR


Step 3: A-bus ($C001 & $C002 READ)

$D0 & $00 is returned on D-bussaperately and put into MemoryAddress Register (MAR)

LDAA $D000 ($B6 $D0 $00)

MAR


CPUIDR


Step 4: A-bus ($D000 - READ)

$19 is returned on D-bus and put into register A (Accumulator A)

MAR

LDAA $D000 ($B6 $D0 $00)

ACCA


ADDA $D001 ($BB $D0 $01)

• Step 1: PC=$C003, $C003 is placed on A-bus andREAD is issued.

• Step 2: 8-bit content at location $C003=$BB is returned on data bus and place in IDR. PC is incremented by 1 to become $C004.

• Step 3: Control unit (instruction decoder) recognizes ADD instruction. Needs a 2-byte valuefor operand address and it issues 2 READ cycles:– address bus = $C004 à data bus = $D0– address bus = $C005 à data bus = $01– At the end, PC becomes $C006

MAR


ADDA $D001 ($BB $D0 $01)

• Step 4: Execution of the instruction needs thecontent of location $D001

• A READ is issued with address bus = $D001 anddata bus returns $37 (put into MDR - MemoryData Register in the control unit).

• Step 5: ALU adds the content of MDR ($37) toACCA ($19) so that ACCA becomes $50.


STAA $D001 ($B7 $D0 $01)• Step 1: PC = $C006, $C006 is placed on address bus and READ

is issued.• Step 2: 8-bit content at location $C006 = $B7 is returned on data

bus and placed in IDR. PC is incremented by 1 to become$C007.

• Step 3: Control unit (instruction decoder) recognizes STORE instruction. It needs a 2-byte value for operand address. It issuestwo separate READ cycles– address bus = $C007 à data bus = $D0– address bus = $C008 à data bus = $01– At the end PC becomes $C009

• Step 4: Execution of the instruction needs to issue a WRITE tomemory with address bus = $D001 and data bus = $50


Addressing Modes

One instruction, multiple meanings


Addressing Modes

• “Addressing Modes” is the technical term for the various different ways that arguments for machine instructions can be specified

• It is common practice for CPUs to provide several machine codes for each basic operation: one code for each addressing mode that makes sense with this operation.


Common Addressing Modes

• Machine-code programmers need to know what addressing modes are provided by a given CPU

• Not all processors implement all addressing modes

• Here we list some of the most common addressing modes


Immediate

• The argument itself appears immediately after the op-code.

• In other words, the address of the argument is the address of the next memory location after the op-code

• This addressing mode is used only for input arguments (it’s meaningless for output arguments – think about it!)


68HC11 Immediate

• An 8-bit or 16-bit argument immediately follows the op-code

LDAA #23

# signifies immediate mode

The argument (specified in decimal, by default)


Direct (or Absolute)

• The address of the argument (8 bit) follows the op-code

• That is, the number which follows the op-code is treated as an address at memorylocations [$00 - $FF], and the CPU will look there for the actual argument.


68HC11 Direct

• An 8-bit address in the range 0…255 follows the op-code

LDAA 23LDAA $FF

No # sign, so we know it’s not in immediate mode

<256, so it must be direct

$ means it’s hexFF hex = 255 decimal, so it’s still direct


Extended• The address of the argument (16 bit)

follows the op-code• That is, the number which follows the op-

code is treated as an address at memorylocations [$0000 - $FFFF], and the CPU will look there for the actual argument.

• Using this addressing mode, memory spaceof HC11 can be fully accessed.


68HC11 Extended

• A full 16-bit address follows the op-code

• LDAA 257• LDAA $255

No #, so we know it’s not immediate

>255, so it can’t be direct, and must therefore be extended

$ means it’s hex255 hex = 597 decimal, so it’s extended


Relative• The relative address of the argument

follows the op-code• Relative addresses specify where the

argument is relative to the current value of the PC

• The CPU calculates the actual address by adding together the relative address and the current value of the PC


68HC11 Relative• This is slightly different. It’s only used in

branch instructions – see later in the course• To recognise a branch instruction, look for

the B. (BRA, BNE, BLS, BGS etc)

BRA $F8BNE $21

Jump location at [PC – 8]

Jump $21 bytes ahead [PC+$21]


Indexed

• The address of the argument is the value currently stored in a specified index register (or general-purpose register) plus an offset that immediately follows that op-code

• 68HC11 has two index registers IX and IY• Useful for implementing arrays!


68HC11 Indexed• The address of the argument is worked out

by adding the value of the IX or IY (index) registers to the number before the commaLDAA 1, XLDAA 2, Y

You can’t really makemistake with this one –it’s the only one with a comma

If you were to put the address of the start of an array in IX, you could address the elements of it using the number


68HC11 Indexed

LDAA 3,X

Offset(unsigned 8 bit)

0 .. 255

Index Registerto be used

X or Y

It loads the byte at address [X+offset]to Accu A


Inherent• The instruction is self contained. i.e. no

operands are used.• They are generally one byte instructions

with no operands.• These instructions are generally used to

operate directly on registers. For example, clear accumulator A, B, X, etc.


68HC11 Inherent

• In these instructions, there is no argument. They generally operate on registers.

CLRAINX

A ß 0

X ß X + 1


Others (not 68HC11)• register

– The argument is the current contents of a specific register• register-indirect

– The address of the argument is the current value of a specified register

• register-autoincrement/decrement– As register-indirect, but adjust register to point to

next/previous location before or after using its value• Indirect

– The number following the op-code is the address of a memory location that contains the address of the argument


All of LDAA Instructions

LDAA dd, Y18 B6 ddind, Y

LDAA dd, XB6 ddind, X

LDAA ddddA6 dd ddext

LDAA dd96 dddir

LDAA #dd86 ddimm

Assembly-code syntaxMachine codesMode

How can weDifferentiate

Addressing Modes?

Are These NumbersChosen Randomly?


Patterns in Machine CodeMachine codes are not chosen at random!

01101111F6LDAB ind, X01100111E6LDAB ext01101011D6LDAB dir01100011C6LDAB imm01101101B6LDAA ind, X01100101A6LDAA ext0110100196LDAA dir0110000186LDAA imm

defines the addressing mode


How is Addressing Mode Specified?• In most cases, set by bits from opcode• ADDA: $8B $9B $BB $AB• ADDB: $CB $DB $FB $EB

1 A/B AM1 1101AM0

Selects RegisterA for 0 or B for 1

00 immediate01 Direct10 Extended11 Indexed

code for ADD

Opcode (8bit) format


Some Arithmetic Instructions

ADDA add 8-bit word to accumulator AADDB add 8-bit word to accumulator BADDD add 16-bit word to double accumulator DABA add B to A

Equivalent subtraction operations are:SUBA, SUBB, SUBD, SBA


Other Instructions

There are also instructions to:-• Increment, decrement or negate a register or

memory location• Perform bitwise logical operations such as

AND, OR, XOR and NOT• Perform shifts, rotates, and many more

logical and arithmetic operations


Conditionals

Bits in Condition Code Register


Condition Code Register (CCR)

• 5 status bits.– Certain bits in CCR indicate the situation after

the operation. For instance, if previousoperation yields a zero output, Z flag becomesone.

• 2 interrupt masking bits (later)• 1 stop disable bit (later)


Condition Code Register

CarryC0OverflowV1ZeroZ2NegativeN3Interrupt maskI4Half carry from lower 4 bitH5XIRQ interrupt maskX6Stop disable flagS7FunctionBit NameCCR bit #


Status Bits

• Carry/Borrow (C)• Overflow (V)• Zero (Z)• Negative (N)• Half Carry (H)

Used by CPU’s branch instructions to make decisions


Carry Flag (C)

• Indicates a carry from an addition or a borrow from a subtraction

• For addition,– C = 1 if carry out exists– C = 0 if no carry out


Example 1

10101100MSB LSB

53

1100001067

0 00111100120

+

C

Add 53 and 67, and determine if carry bit is set or not.

LDAA #53LDAB #67ABA

The result fits into8 bits, therefore no

carry.


Example 2

01000001MSB LSB

130

11000101163

0 11001001293

+

C

Add 130 and 163, and determine if carry bit is set or not.

LDAA #130LDAB #163ABA

The result is 9 bits, we use C flag as the

9th bit.


Example 3 (16 bit addition)

1 00 0 1 0 0 1 00100011MSB LSB

50274

28712

78986

+

C

LDD #50274ADDD #28712

The result is 17 bits(exceeds 65535), we useC flag as the 17th bit.

1 00 0 0 1 0 0 00001110

10 00 0 1 0 1 0 01011001


Handling of Signed Numbers

• 6811 handles signed numbers using the 2’s complement numbering system

• Recall the most significant bit is the sign• You negate a number by taking its 2’s

complement (e.g. complement all bits and add 1)

• Review Digital Logic I and II courses


Arithmetic with Signed Numbers

• All arithmetic (addition/subtraction) performed on full binary number, including sign.

• Hardware treats signed number as unsigned from perspective of requested operation

• Benefit is that we do not need to do anything special to manage sign of operands or result

• Disadvantage, seems counterintuitive.


2s Complement Ranges

+3 = 00000011+26 = 00011010+40 = 00101000+102= 01100110

-3 = 11111101-26 = 11100110-40 = 11011000-102= 10011010

Range of 2’s complement numbers:

8-bit Reg. -128 to +127 decimal

16-bit reg. -32,768 to 32,767 decimal

Complementand add 1


C Flag (for 2s ComplementNumbers)

• C flag set to ‘1’ if – Carry out from MSB for addition– Borrow from MSB for subtraction

• C flag set to ‘0’ if neither of the above apply• Several hardware implementations possible

to determine value of C


Methods to Determine C Flag Value• Method 1: more like how we do it hand

–Explicitly monitor for carry or borrow, • Method 2: possible implementation

–Express result expressed as 9/17 bit quantity–For addition, extra bit is the carry flag–For subtraction—carry determined from extra bit

• borrow from fictitious 9th bit in first subtrahend that is always “1”• carry is the complement of the extra 9th/17th bit from result

• Method 3: possible implementation—minimum hardware?

–Examine operands and result, develop Boolean equations for C–Method 3 is how the carry is documented in the 68HC11

manual


Signed Addition Example

00011100MSB LSB

56

11010011-53

1 100000013

+

C

Add 56 and –53 ($CB), and determine if carry bit is set or not.

LDAA #56LDAB #-53ABA

The result is 8 bits, we don'tuse C flag as the 9th bit since

the numbers are taken as signed


Signed Subtraction Example

1 00011100MSB LSB

56

11010011-53

1 100000013

+

C

Add 56 and –53 ($CB), and determine if carry bit is set or not.

LDAA #56SUBA #-53

For subtraction, a fictitous 9th bit is

assumed.

For subtraction 9th bit is the

complement of carry

complement

The resultant C is 0


Signed Addition ExampleAdd 33 and –40, and determine if carry bit is set or not.

10000100MSB LSB

33

00011011-40

0 10111110-7

+

C

LDAA #33ADDA #-40

9th bit is thecarry


Overflow Flag (V Flag)

• CPU sets V flag to a logic ‘1’ when the result of an operation is beyond of the range that can be represented

• Known as 2’s complement overflow• CPU clears flag when the number is within

range


2s Complement Overflow ExampleAdd 105 and 45, and determine if overflow bit is set or not.

10010110MSB LSB

105

10110100+45

1 01010010150

+

LDAA #105ADDA #45

DesiredValue

01101001-106

how it is interpreted! Result is

Negative!!

Two positive numbersare added and a

negative number is computed !!!

OVERFLOW!!!


Add -120 and -10, and determine if overflow bit is set or not.

00010001MSB LSB

-120

01101111-10

1 01111101-130

+

LDAA #-120ADDA #-10

The result exceeds the rangeof 8 bit 2s complement

numbers (i.e. less than -128) OVERFLOW!!!

2s Complement Overflow Example 2


Add 80 and 45, and determine if overflow bit is set or not.

00001010MSB LSB

80

0110111145

1 0101100125

+

LDAA #80ADDA #45

The result does NOT exceeds the range of 8 bit

2s complement number NO OVERFLOW!!!

2s Complement Overflow Example 3


In More Simple Terms

10

OutsideInside

V FlagRange Limit


Negative Flag

• N-bit indicates state of msb of a result• If msb = 1 => N-flag = 1• If msb = 0 => N-flag = 0• N-bit is used in 2’s complement arithmetic

to indicate the sign of a number• So if V-flag = 0 => correct answer

=> N-flag valid sign


N Flag

• 6811 treats all numbers as 2’s complement binary numbers• Subtraction is performed using 2’s complement arithmetic• N Flag is simply the MSB of the result

11-00+

Value of N-flagValue of MSBValue


Half Carry (H flag)

• Used only for BCD (Binary Coded Decimal)operations. (They will be discussed later)

• H-flag updated only by ABA, ADDA, ADDB, ADCA, ADCB

• To do decimal arithmetic, the 68HC11 does arithmetic in binary and then uses H and C to adjust the calculation to give a proper decimal result.


Zero Flag (Z flag)

Z bit is set to a logic ‘1’ when the result is ‘0’, otherwise Z=0.


Zero Flag Example 1 Add 50 and -50, and determine zero flag is set or not.

01001100MSB LSB

50

01110011-50

0 000000010

+

LDAA #50ADDA #-50

The 8bit result is all zeros. Therefore, Z flag is set. Note

also that C=1 and V=0.


Zero Flag Example 2Add 50 and -47, and determine zero flag is set or not.

01001100MSB LSB

50

10001011-47

1 100000013

+

LDAA #50ADDA #-47

Some bits are not zeros, therefore, Z flag is clear. Note that C=1 and V=0


Z Flag

10

All bits zeroSome bits are ones

Status ofZ Flag

Results of operation


First Assembly LanguageExample

Adding five numbers at address$C100 - $C104 and put the result in

location $C105


+

Picture


?$C105?…..?$C102?$C101?$C100


Design

• We have to perform a running sumoperation (i.e. add the incoming number to a variable in an iterative way)

• What about accumulator A? • That is what accumulators are used for!


Implementation

clear accumulatorans = ans + [$C100]ans = ans + [$C101]ans = ans + [$C102]ans = ans + [$C103]ans = ans + [$C104]store ans to $C105

Add the contents ofmemory locations

to accumulator

Store the answer to$C105

Clear accumulator(running sum)


Coding

CLRAADDA $C100ADDA $C101ADDA $C102ADDA $C103ADDA $C104STAA $C105

Clear accumulator A.A Self contained

instruction.

A ß A + [$C100]

A ß A + [$C101]

A ß A + [$C102]

A ß A + [$C103]

A ß A + [$C104]

[$C105] ß Aopcodes operands


Machine Code Equivalent of theAssembly Program

CLRA $4FADDA $C100 $BB $C1 $00ADDA $C101 $BB $C1 $01ADDA $C102 $BB $C1 $02ADDA $C103 $BB $C1 $03ADDA $C104 $BB $C1 $04STAA $C105 $B7 $C1 $05

opcodes operands...$C1$BB$00$C1$BB$4F...

$C000

$C001

$C002

$C003

$C004

$C005


Improvement - 1

CLRAADDA $C100ADDA $C101ADDA $C102ADDA $C103ADDA $C104STAA $C105

LDAA $C100

Saves 1 byte,which may be quite

important forsystems with

limited memory


Improvement - 2

LDAA $C100ADDA $C101ADDA $C102ADDA $C103ADDA $C104STAA $C105 Yes, we can!

We have to use anIndex Register

(Indexed Addressing)

Can we iteratethrough

the memorylocations?


Improvement :Using Loops

CLRALDX #$C100

START ADDA 0,XINXJMP START

Add the byte at location [X+0] to A

X ß $C100

X ß X + 1

Jump to the locationlabeled by

START

Clear Accumulator

Well, well, well.We have a loop

that never stops.

We need to jumpconditionally toSTART to dealwith the infinite

loop


Improvement: Using LoopsCLRALDX #$C100

START ADDA 0,XINXJMP START

We need tocompare X with

$C105

If X = $C105 thenwe continue, otherwise we jumpto label START

Therefore, we need a comparison

operation and a conditional branch


ComparisonCLRALDX #$C100

START ADDA 0,XINXCPX #$C105............

Compare X immediately with

value $C105

Comparison is a non-destructive

subtraction

It sets theappropriate bit inCondition CodeRegister (CCR)

S X H I N Z V C Condition Code Registerset if operation makes carryset if operation makes overflowset if the operation's result is zeroset if the result is a negative number.......if 3rd bit is set (for BCD numbers)...........

We need a branch

instruction thatchecks CCR


ComparisonCLRALDX #$C100

START ADDA 0,XINXCPX #$C105BNE START...........

Checks Z bit in CCR. If it is 0

jumps to START

If Z bit is 1, thencontinues (i.e. exits

loop)

BNE stands forBranch If Not

Equal

S X H I N Z V C Condition Code Registerset if operation makes carryset if operation makes overflowset if the operation's result is zeroset if the result is a negative number.......if 3rd bit is set (for BCD numbers)...........


The Final Program$B6 LDAA $C100$C1$00$CE LDX #$C101$C1$01$AB START ADDA 0,X$00$08 INX$8C CPX #$C105$C1$05$26 BNE START$F8 $A7 STAA 0,X$00

$F8 = -8in 2s

complementform

Jump 8 bytesbackward

PC ß PC -8

You must start counting from thenext instruction

backward orforward


ExampleFill a page (256 bytes) of memory with value of

address ($D000 = $D0, $D001 = $01, etc...)

....

$FE$D0FF

$D0$D0FE

$FC$D0FD

....

$04$D005

$D0$D004

$02$D003

$D0$D002$00$D001

$D0$D000

MEMORYOUTPUT


First Version

....LDX #$D000

LOOP STX $0,XINXINXCPX #$D100BNE LOOP....

X ß Starting address

[X + 0] ß X

X ß X + 1

X ß X + 1

X ?= $D100, changes Z flag

if Z bit = 0, go to theaddress labeled as LOOP

We use index register X to point out the beginningof the memory block. We store the value of X

to the location pointed by X and increment X twiceto move on.


Second Version (better)LDAB #$02LDX #$D000

LOOP STX $0,XABXCPX #$D100BNE LOOP....

X ß Starting address

[X + 0] ß X

X ß X + B


if Z bit = 0, go to theaddress labeled as LOOP

B ß 2

This version is better thanthe first one, since ABX is

faster than two INX instructions.


ExampleMove a page of memory from $D000 to $D200

$55$D202$33$D201

$23$D2FF

$73$D200

$23$D0FF

$55$D002$33$D001$73$D000


The First VersionWe need two pointers. 68HC11 has

two index registers IX and IY. Use one of themfor target, the other for source.

LDX #$D000LDY #$D200

LOOP LDAA $0,XSTAA $0,YINXINYCPX #$D100BNE LOOP....

Y ß destination address

A ß [X + 0]

[Y + 0] ß A


if Z bit == 0, go to theaddress labeled as LOOP

X ß source address

X ß X + 1

Y ß Y + 1

eem336 week02 addr modes 4pp

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