EE4990-01: Advanced MicroprocessorsAssignment-3

By: Karan Sodhi

Solution 1.Note: In real mode addressing, addressing is performed using the combination of segment registers and an appropriate offset register. The base of each Data Segment is found by multiplying the Data Segment with 10h. To which we add the offset address.

a. Here [100h] is accessed. Address Accessed: DS*10h+100h = 12000h+100h=12100h. {Offset : 100h}

b. Here [SI + 100h] is accessed. Address Accessed: DS*10h+SI+100h=12000h+0250h+100h = 12350h. {Offset : SI+100h}

c. Here [BX+100h] is accessed. Address Accessed: DS*10h+BX+100h = 12000h+0100h+100h = 12200h. {Offset : BX+100h}

Solution 2.Note: In real mode addressing, addressing is performed using the combination of segment registers and an appropriate offset register. The base of each Data Segment is found by multiplying the Data Segment with 10h. To which we add the offset address.

a. Here [EAX+EBX] is accessed. Address Accessed: DS*10h+EAX+EBX = 001000h+00000_1000h+0000_2000h=0000_4000h. {Offset : EAX+EBX}

b. Here [EAX+2*EBX] is accessed. Address Accessed: DS*10h+EAX+2*EBX= 001000h+0000_1000h+0000_4000h=0000_6000h. {Offset : EAX+2*EBX}

c. Here [EBX+4*EAX+1000h] is accessed. Address Accessed: DS*10h+EBX+4*EAX+1000h=00_1000h+0000_2000h+4*0000_1000h+1000h=0000_8000. {Offset : EBX+4*EAX+1000h}

Solution 3. Linear Address: 00200000H or 0000_0000_0010_0000_0000_0000_0000_0000B According to the paging mechanism, Linear Address can be split as :

31 22 21 12 11 0Directory Page Table Offset

So our linear address becomes:31 22 21 12 11 0

0000_0000_00 10_0000_0000 0000_0000_0000

Following is the figure that explains the paging directory page table entries accessed:

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