ee3 mosfet review

p npn diode

I

V

No control

p npnp npn

MOSFET BJT

I

I I

I

V V

I

Metal-Semiconductor Field Effect Transistors

MOSFETs

MOSFET fabrication

1. p-type substrate2. Thermal oxidation3. Poly-Si deposition4. Lithography and Ohmic contact window opening5. Donor implantation andthermal anneal.5. Lithography and metaldeposition.5. Back contact.

Names of contacts on MOSFET

Source: S

Gate: G

Drain: D

Bulk contact: B

S, B: normally grounded

Current and control?

• Apply only VDS

SiO2

n+ n+

GS D

p-Si

VDS

• np diode un-biased• pn diode reverse biased

NO CURRENT

The voltage on the gate can create aconduction path between source and drain and control the amplitude of the current that is flowing.

CONTROL

n-channel MOSFETEnhancement mode:

no conduction when no gate voltage applied

p-Si substraten+ Ohmic contacts

S D

source, drain contactsSiO2 oxide insulatorgate contact

G

Bbulk contact grounded with S

Energy band diagram from S → D

Energy band diagram from G → B

The function of the GATE contactMetal – Oxide - Semiconductor contact• MOS

p-Si

V

IAssume SiO2 perfect insulator

current I = 0A

Capacitive effects

Electric field effect

• Energy band diagram MOS: Vext = 0V

S DGfm= fs

p-Si

n+-Si n+-Si

BnMOS

• Energy band diagram: Vext = 0V

2) p-type semiconductor

Ec

Ev

1) Workfunction: fm= fs

efmefs

EFsEFm

3) No e- transferNote, if fm≠fSi: then an electric field occurs across interface → V0=fm-fSi

Evac

metal semiconductoroxide

2) Electron affinity in oxide

e SiO2 = Evac-EcSiO2

Ec

Ev

Under chosen conditions: no band bending when connecting

eSi

• Energy band diagram MOS: Vext = 0V

tox

EFSiEFSi

EcSi

EvSi

Ecox

Evox

metalgate p-Sioxide S DG

fm= fs

p-Si

n+-Si n+-Si

B

Flatband condition

nMOS

p-Si

tox

• Energy band diagram MOS: Vext < 0V

EFSiEFm

EcSi

EvSi

Ecox

Evox

V

E

--

++

𝑑𝐸𝑐

𝑑𝑥 =𝑒(𝑥)E

accumulation of holes

h+-

parallel plate capacitor𝐶=𝐶𝑜𝑥 𝐴=

𝜀0𝜀𝑜𝑥𝑡𝑜𝑥

𝐴

• Energy band diagram MOS: Vext > 0V

EFSiEFm

EcSi

EvSi

Ecox

Evox

V

E

--

++

𝑑𝐸𝑐


Depletion of holes

+

parallel plate capacitor

𝐶=𝐶𝑜𝑥+𝑑𝑒𝑝𝑙 𝐴

p-Si

tox wp

NA-

---

• Energy band diagram MOS: Vext = Vth > 0V

EFSi

EFm

EcSi

EvSi

Ecox

Evox

Vth

E

- -- -

++++

𝑑𝐸𝑐


Depletion of holes

+

2 parallel plate capacitors1𝐶=

1𝐶𝑜𝑥 𝐴 +

1𝐶𝑑𝑒𝑝𝑙 𝐴

p-Si

tox

THRESHOLD VOLTAGE

attraction of electrons

wpmax

NA-

---

----

--

e-

• Energy band diagram MOS: Vext = Vth > 0V

EFSi

EFm

EcSi

EvSi

Ecox

Evox

Vth

- -- -

++++

Definition of threshold voltage:ns @ SiO2/Si interface = p in bulk

THRESHOLD VOLTAGE

eVth

nsp

INVERSION

MOS-capacitor Capacitance varies with gate voltage

• Ideal MOS capacitor on p-type substrate.

• High frequency measurement (1 MHz)

C

V

Oxide capacitance

Depletion capacitance

accumulation

depletion

inversion

Vth

Cmax = Cox A

1/Cmin = 1/(Cox A)+1/(Cdepl A)

Cmin

M O p-SiVGS

fm=fs

EF

equilibriumEcs

Evs

Ecox

Evox

Ecs

Evs

Ecox

Evox

VGS>0 h+

Depleting p-Si

Depletion region

h+

EFmEFm

h+

EFm

VGS = Vth

Onset of inversionVGS > Vth

Inversion

ddeplmax

n

Inversion region

EFm

Inversionon p-SiRevision

n-channel MOSFET - Enhancement mode: ACTION OF GATE

S DG

B

VGS

VGS

Vth

n-channel MOSFET - Enhancement mode: Applying a drain-source voltage

S DG

Bbulk contact grounded with S


S DG


EF

n+ n+p

Potential barrier between supply of electrons from source into channel

channel

Ec

Ev

0V0V

0V

eV0

S DG


n+ n+pPotential barrier between supply of electrons from source into channelstops diffusion of e- from source into channel IDS = 0V

channel

Ev

EFEc

0V0V

VDS>0V

EeV0

EFEc

Ev

Need gate to lower V0

Energy band diagram from G → B

S DG

channel

EF

SD

G

chan

nel

G ox p-Si

G

chan

nel

Ec

Ev

source0V

0V

Energy band diagram from G → BApply VGS = Vth > 0Then inversion charge at ox/Si is equal to the majority carrier charge in p-Si

EF

G ox p-Si

G

chan

nel

eVGSEF

Ec

Ev

Energy band diagram from G → BApply positive voltage on gate VGS>Vth

INVERSION

EF

G ox p-Si

G

chan

nel

e VGS

EFEF

Full of electronsEc

Ev

S DG

Impact of VGS on energy band diagram from S → D

EF

n+ n+p

Potential barrier between supply of electrons from source into channel

channel

n

Potential barrier between supply of electrons from source into channelis lowered, thus electrons from source will not be “blocked” if attracted by drain

Ec

Ev

S DG

Impact of VDS on energy band diagram from S → D

n+ n+

channel

n

Electrons allowed across the source-channel potential barrier now DRIFT to the drain

EF

Ec

Apply VDS > 0V

Derivation of currents in MOSFETs

dxxdpeDxxpexJ

dxxdneDxxnexJ

ppp

nnn

)()()()(

)()()()(

E

E

dxxdpeDxxpexJ

dxxdneDxxnexJ

ppp

nnn

)()()()(

)()()()(

E

E

VGSVth

VDS 0

Diffusion e-

Drift e-

Diffusion h+

Drift h+

Drift e-

Diffusion e-

Drift h+

Diffusion h+

nsS nsD

Diffusione-

Drift e-

n+n+

n-

EFS EFD

ECS ECD

EVS EVD

SD

EFS

GB@S

EF ECEV

EFD

GB@D

EF ECEV

Derivation of currents in MOSFETs

• Current in single carrier type layer under electric field: drift current

Adx

xdVxenI )()(

AxExneI )()(

• MOS: capacitive effect– Charges induced by applied voltage: Q

Q

Determine source-drain current

• Take VDS = 0

GS D

VDS

VGS>Vth

1. Determine charge Q in channel

• Remember:– Qn = charge/unit area– Qn = CV

• Apply VGS ≥ Vth

• Which V? Assume: @ VGS = Vth : Qn = 0• then:

– Qn = -Cox (VGS – Vth)– Charge in the channel under

the gate per gate area

– Qn = Cox VCox

Cox = e0 eox/tox

Qn


• Take VDS > 0, VGS ≥ Vth

2. Determine charge Q(x) in channel

GS D

VDSVGS>Vth

Inversion layer



2. Determine charge in channel

GS D

VDSVGS>Vth Not only do we have a voltage in the y

direction due to the gate voltage

y

x

But also in the x direction due to the drain voltageThus in the channel we have the vector sum of the gate induced electric field and the drain induced electric field.



2. Determine charge in channel

• The inversion layer is a function of the electric field in the channel of the MOS at each position x along the channel.

• Voltage in the channel due to VDS is Vx(x).

x

Vx(x)

0 L

VDS

GS D

VDSVGS>Vth

@ x=0 : Vy(0) = VGS

@ x=L : Vy(L) = VGD

VGD = VGS – VDS

@ x : Vy(x) = VGS - Vx(x).

• Voltage in the channel due to VGS and Vx(x) is Vy(x).

y

x

Determine source-drain current2. Determine charge in channel

x

Vx(x)

0 L

VDS

GS D

VDSVGS>Vth

y

x

• Charge in channel– Qn = -Cox (VGS - Vx(x) - Vth)

A closer look at the inversion layer

Channel region

S D

G

VS

VG VG VG

VD

VS

VS

VD

VD

VG >Vth

VS =0

VD >0

QnS=-Cox(VGS-Vth)

aS = a0 QnS

Charge:Inversion layerwidth:

QnD=-Cox(VGD-Vth)

QnD=-Cox((VGS –VDS)-Vth)

Voltage drop across the channel

Since VGS –VDS<VGS

QnD< Qn

S → aD < aS

aS

aD


Channel region

S D

G

VS

VG VG VG

VD

VS

VS

VD

VD

VG >Vth

VS =0

VD >0

QnS=-Cox(VGS-Vth)

aS = a0 QnS

Charge:Inversion layerwidth:

QnD=-Cox(VGD-Vth)

QnD=-Cox((VGS –(VGS -Vth))-Vth)

QnD=0 → aD =0

aS

Pinch-off: VDS = VGS -Vth

QnD=-Cox((VGS –VDS)-Vth)

Current in channelDrift current: I = e n e E A

constant graphs in books

-dVx/dx

arean(x)

x

Current in channelDrift current: I = e n e E An(x)

n(x)? density of mobile carriers in channel due to inversion at point x

toxa(x)

L

W

S D

channelx

G

ox



Qn(x) = -Cox (VGS – Vth)- Vx(x)Voltage across oxide at each point x along the channel

= e × #carriers/gate area (=W L) toxa(x)

L

W

Charge due to gate voltage (MOS capacitor)

S D

channelx



Qn (x) = -Cox (VGS – Vth)

- Vx(x)

= e × #carriers/area (=W L)

toxa

L

W

n(x) = Qn(x)/(a(x) e)#carriers/volume (=W L a)n(x)

n(x) = -Cox (VGS – Vth)/(a(x) e)

- Vx(x)I = -e Cox (VGS – Vth) e E A/(a(x) e)

- Vx(x)

Current in channel

toxa

L

WA: area of current flowA = a(x) W

I = Cox (VGS –Vx(x) – Vth) W e dVx/dx

- Vx(x)I = -e Cox (VGS – Vth) e E A/(a(x) e)A

- Vx(x)I = -e Cox (VGS – Vth) e E a(x) W/(a(x) e)

Current

I = Cox (VGS –V(x) – Vth) W e dVx/dx

∫0

L I dx = Cox W e ∫0VDS (VGS –Vx(x) – Vth) dVx

I = Cox e (W /L) [(VGS –Vth) VDS- VDS2/2]

Oxide capacitanceper area Length of

channel

Threshold voltage

Width of channel

Electron mobility in channel

Current-voltage characteristics

0< VGS –Vth

VDS < VGS –Vth 0< VGS –Vth

VDS ≥ VGS –Vth

I = Cox W e /L [(VGS –Vth) VDS - VDS2/2]

R(VGS)

Triode region: voltage controlled resistance

VGS VthVy

=

Pinch-off I = Cox W e /2L (VGS –Vth)

2

Saturation region: voltage controlled current source

VGSVDS

Ideal n-channel enhancement mode MOSFET characteristics

Output characteristics

22 thGS

g

goxnsatDS

thGSDS

VVL

WCI

VVV

DSthGSg

goxnDS

thGSDS

VVVL

WCI

VVV

IDS

VDS

VGS

Onset of saturation

Triode regionLinearResistor behaviour

Saturation regionConstant Current source

2

2DS

DSthGSg

goxnDS

VVVV

LWC

I


IDS

VDS

VGS

triode

IDS

VGSVth

VDS1

in triode region

Transfer characteristics


IDS

VDS

VGS

saturation

IDS

VGSVth

in saturation region

Transfer characteristics

In saturation: voltage controlled current source

thGSg

goxnsatm

thGSg

goxnsatDS

GS

DSm

VVL

WCg

VVL

WCI

dVdIg

2

2

IDS

VDS

VGS

How well does the gate control the current?

gmvgs

Transconductance, gm

1

DS

DSo dV

dIRoR

What happens at pinch-off?

The channel-drain junction is reverse biased.

A depletion region exists between the channel and the drain.

S DG

n+ n+p

Large part of the VDS will be dropped across the channel-drain depletion region = reverse biased pn diode.

channel

EF

Ec

Ev

V0-Vsi

MOSFET: VGS>Vth>0 ; VDS ≥ VGS-Vthno longer inverted

↓depleted

EF

Ec

Ev

If VDS is increased, most of the extra voltage will be dropped across the channel-drain depletion region.

S DG

n+ n+p

channel

V0-Vsi

MOSFET: VGS>Vth 0 ; VDS ≥ VGS-Vth

EF

Ec

Ev

Negligible change in slope of potential energy Ec in channelNo change in source-channel barrier (controls carrier supply)Thus current remains constant

Why is there current through a depletion region?Remember: Reverse biased pn diode

The current in reverse bias is limited by the availability of minority carriers

EF

Elec

tron

ener

gyH

ole

ener

gy

Ec

Ev

Electron diffusionElectron drift

Hole diffusionHole drift

e(V0+Vr)

Channel Drain

Any extra is made available by source and is controlled by the source channel potential barrier

TCAD simulationsNumerical solution of the transport equations

Taken from: http://www.eng.auburn.edu/~niuguof/elec6710dev/html/idvd.html

Vx(x)

S

D

channel

linear

saturation

Real n-channel enhancement mode MOSFET characteristics

• Channel length modulation

• For VDS = VGS-Vth

VGSVDS

>

Channel length L

LDL

has decreased by DL

IDS

VDS

VGS

I 1/LL L-DLI 1/(L-DL)


Channel region

S D

G

VS

VG VG VG

VD

VS

VS

VD

VD

VG >Vth

VS =0

VD >0

QnS=-Cox(VGS-Vth)

aS = a0 QnS

Charge:Inversion layerwidth: Qn

C=0 thus aC =0

aS

Channel length modulation: VDS > VGS -Vth

If VDS > VGS –Vth then at some point in the channel: Vx(x) = VGS –Vth

QnC( )=-Cox((VGS –(VGS -Vth))-Vth)

L

DL

L’

Different modes of operation

n-channelnMOS

p-channelpMOS

p

G

n nS D

n

G

p pS D

Carriers in channel: e- Carriers in channel: h+

Vth>0 Vth<0

0 >0 >0

e-

0 <0 <0

h+

Different modes of operation

Enhancement mode Depletion mode

GS D

VDS =0

VGS=0

S D

GS D

VDS =0

VGS =0

S D

No channel Channel exists

Different modes of operationCurrent-voltage characteristics

nMOSEnhancement modeDepletion modeIDS

VDS

IDS

VGSVth

VDS1VGS

123

4

5VGS

-2-10

1

2

Vth

VDS1

CMOS

VD>Vth

in out

pMOS

nMOSvin

vout

Vth<0V

VGS

IDS

VGS

IDS

t

vin

t

vout

Vth>0V

VDVD

Conclusions• A MOSFET is a majority carrier device.• The width of the conducting channel and thus the

amount of carriers in the channel is determined by the gate voltage.

• Current is determined by drift through a channel.• The current is inversely proportional to the length

of the gate.• The transconductance is a measure of how good

the gate controls the current through the channel.• Different modes of operation exist dependent on

carrier type and inversion layer width without gate bias.

ee3 mosfet review

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