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Page 1: A 50 Gb/s NRZ Modulated 850 nm VCSEL Transmitter Operating Error Free to 90 °C

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A 50 Gb/s NRZ Modulated 850nm VCSEL Transmitter Operating Error Free to 90°C

Daniel M. Kuchta, Senior Member, IEEE, Alexander V. Rylyakov, Clint L. Schow, Senior Member, IEEE, Jonathan E. Proesel, Member, IEEE, Christian W. Baks, Petter Westbergh, Johan S. Gustavsson,

Anders Larsson, Fellow, IEEE

Abstract—We report on the properties of an 850nm VCSEL

transmitter running at 50Gb/s with NRZ modulation from 30°C to 90°C. This is the highest transmitter operating temperature at 50Gb/s for a VCSEL link of any wavelength. This achievement is made possible by a combination of a high speed VCSEL design and driver and receiver circuits that incorporate equalization. Without equalization, the highest temperature attained with BER <1E-12 is 57°C. Index Terms— High-speed modulation, optical interconnects, semiconductor lasers, vertical cavity surface-emitting laser

(VCSEL)

I. INTRODUCTION

IGH performance computers, high end servers and data centers rely substantially on low cost, short distance,

multimode fiber links using high speed Vertical Cavity Surface Emitting Lasers (VCSELs). Even with advanced cooling techniques, the operating environment for the optical components can reach temperatures above 70°C. At the same time, the serial speed of the optical links is increasing by at least of a factor of two with each new generation. With current serial speeds of 25Gb/s/ch, the next generation is likely to be 50Gb/s or higher. Demonstration of optical links running error free at temperatures beyond the expected operating range is one of the first steps toward commercial viability of the technology.

In the past decade and a half, there has been an effort by quite a few groups to explore the limits of speed and temperature for VCSEL links. Fig. 1 shows a plot of the various speed and temperature records for 850nm, 980nm, ~1060nm, ~1300nm, and 1550nm wavelength VCSELs since 2001 [1]-[28]. See Table 1 in the appendix for a list of each point and its reference. Most of these results demonstrated both eye diagrams and error free operation through bit error

D. M. Kuchta, A. V. Rylyakov, C. L. Schow, J. E. Proesel, and C. Baks

are with the IBM – T. J. Watson Research Center, 1101 Kitchawan Road, Yorktown Heights, NY 10598 (e-mail: [email protected])

P. Westbergh, J. S. Gustavsson, and A. Larsson are with Department of Microtechnology and Nanoscience, Photonics Laboratory, Chalmers University of Technology, Göteborg SE-412 96, Sweden (e-mail: [email protected]; [email protected]; [email protected]). Copyright (c) 2014 IEEE. Personal use of this material is permitted. However, permission to use this material for any other purposes must be obtained from the IEEE by sending a request to [email protected].

ratio (BER) measurement. A few demonstrated the result using eye diagrams only. Almost none of the prior records mention or quantify the jitter increase at the higher temperatures, with the exceptions being [9] and [17].

10 20 30 40 50 60 70-20

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Serial Bit Rate (Gb/s)

Tem

per

atu

re (

oC

)

850nm980nm1090nmNew 850nm result1550nm1270-1330nm

Fig. 1. VCSEL speed records versus operating temperature since 2001. See references [1]-[28].

In this paper we extend the data rate/temperature boundary

for 850nm VCSELs to 50Gb/s at 90oC. This result is made possible by a combination of a state of the art VCSEL design and specially designed driver and receiver circuits which incorporate equalization. The paper is organized as follows: Section II describes the VCSEL static and dynamic properties, Section III describes the transmitter and receiver assemblies, and Section IV presents the transmission results.

II. VCSEL PROPERTIES

A. Static VCSEL Characteristics

The VCSEL used in this experiment was an 850nm oxide confined device with a 6 μm aperture. The details of the device fabrication and design can be found in [9]. Fig. 2 shows the light and voltage characteristics versus VCSEL substrate temperature from 25 to 95 oC in 5 oC steps. The optical power was measured using a large area (1 cm2) silicon PIN detector (Newport model 818-ST) placed in close proximity above the VCSEL. The IV measurement was made with the VCSEL connected to the driver chip and as a result, the series resistance and voltage are higher due to the 50 Ohm load of the driver IC output stage. The actual device series resistance at 6.9 mA varies from 125 Ohms at 25 oC to 132 Ohms at 95

oC. The increase is probably due to a reduction in electron and

H

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hole mobility for AlGaAs with temperature [29]. Fig. 3 shows the extracted VCSEL threshold current over the same temperature range. At room temperature (RT) the threshold current is 0.73mA and increases to 1.24mA at 90 oC. The threshold minimum for this device is below RT. The slope of the L-I curve is 0.72mW/mA at RT and decreases to 0.55mW/mA at 90 oC. Measurements below RT were not performed to avoid condensation on the sub-assembly.

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tica

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Fig. 2. Light-current-voltage curves as a function of VCSEL substrate temperature from 25 to 95 oC in steps of 5 oC.

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Fig. 3. Threshold current versus VCSEL substrate temperature.

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Am

pli

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Fig. 4. VCSEL optical spectrum at two substrate temperatures: Left = 30 oC,

Ibias=2mA, IC=off and Right = 90 oC, Ibias=6.9mA, IC=on.

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Th

erm

al I

mp

edan

ce (

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)

Fig. 5. Measured VCSEL thermal impedance as a function of substrate temperature.

Fig. 4 shows the optical spectrum at substrate temperatures of 30 and 90 oC. For the 30 oC measurement, the bias current is just above threshold at 2mA and the IC is not powered on. This is intended to be a reference point where the VCSEL junction temperature is not much higher than the substrate temperature. Using a measured thermal impedance of 2700K/W, the junction is found to be only 6 oC above the substrate under these conditions. For the 90 oC measurement, the bias current is 6.9mA and the driver IC is powered on. The 6.9mA current is the bias current used for the high speed measurements. The RMS spectral width is 476pm and the mean wavelength is 854nm. The junction temperature under this condition is found to be 137 oC. The thermal impedance of a VCSEL is a function of temperature due in part to the temperature dependence of the thermal conductivity of AlGaAs. Fig. 5 shows the measured thermal impedance of the VCSEL as a function of substrate temperature from 25 to 95

oC. The thermal impedance is extracted from LIV curve and the shift in the peak wavelength of the optical spectrum from 2 to 10mA. In making this measurement, a measured wavelength shift with temperature of 62pm/K was used which

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is consistent with the value reported in [30]. Over the measurement range of interest, the thermal impedance was found to increase by 24%.

B. Dynamic VCSEL Characteristics

Fig. 6 shows the small signal modulation response for the VCSEL at RT and at 85°C. The modulation bandwidth at 6.8 mA is approximately 24 GHz at RT. At the higher temperature, thermal saturation causes a reduction of the bandwidth to 21 GHz at the same bias current. The D-factor decreases from 10.4 to 9.6 GHz/mA½ when moving from RT to 85°C while the K-factor increases slightly from 0.15 to 0.16 ns.

Fig. 6. Small signal modulation response for increasing currents at (a) room temperature and (b) 85°C.

III. TRANSMITTER AND RECEIVER ASSEMBLIES

The full optical link consists of a transmitter subassembly and a separate receiver subassembly which are described in the following two sections.

A. Transmitter Subassembly

The transmitter consists of a driver IC fabricated in IBM’s 0.13 μm SiGe BiCMOS process, co-mounted on a printed circuit board with two VCSELs and eight decoupling capacitors. See Fig. 7. The high speed input to this printed circuit board is through two vertical SMP connectors and two single ended 50 Ohm transmission lines which do not appear in the figure. There are dc blocking capacitors on the inputs. The driver IC, which has been described in [14], is a two tap feed forward equalization design with a 50 Ohm load in the differential output stage. Because the output stage is differential, it is terminated with two VCSELs in a common

anode configuration. In the common anode configuration, the VCSEL appears in parallel with the output stage load resistor. Using a lower resistance improves the speed but also reduces the modulation amplitude. One of the two VCSELs is not used for these experiments and is not powered on. The VCSELs are attached using Ag epoxy to an AlN ‘diving board’ submount as shown Fig. 8. This submount has half its thickness removed under the VCSELs to form an air gap, giving it a diving-board–like structure. The purpose of the air gap is two fold. For high speed testing, the air gap acts to reduce the parasitic capacitance of the VCSELs to ground. The air gap also helps to thermally isolate the VCSELs from the driver IC. To monitor the temperature, there are two chip thermistors, a large one on the printed circuit board next to the IC and a small one on the AlN submount close to the VCSELs. Both thermistors were calibrated to 100 oC and have an accuracy of <0.3 oC. All electrical connections between the printed circuit board, the IC, and the VCSELs are made using wirebonds.

Large Thermistor

Small Thermistor

SiGe Driver IC

VCSELs

Decoupling Caps

High Speed Inputs

Large Thermistor

Small Thermistor

SiGe Driver IC

VCSELs

Decoupling Caps

High Speed Inputs

Fig. 7. Top view of transmitter subassembly showing the SiGe driver IC, VCSELs, thermistors and eight decoupling capacitors.

Circuit Board

IC AlN submount

VCSEL

TECAir gap

Thermistor

Circuit Board

IC AlN submount

VCSEL

TECAir gap

Thermistor

Fig. 8. Cross section of the transmitter subassembly showing the AlN ‘diving board’ structure with the air gap beneath the VCSEL.

The entire printed circuit board is 32 mm x 32 mm. The central region is placed on top of a 4 layer Thermo Electric Cooler (TEC) pyramid with a top surface area of 56 mm2.

B. Receiver Subassembly

The receiver subassembly consists of a receiver IC fabricated in IBM’s 0.13 μm SiGe BiCMOS process, co-mounted on a printed circuit board with a 21 μm diameter, 1.6 μm intrinsic region thickness photodiode and six decoupling capacitors. The photodiode is elevated on an Al2O3 submount. The photodiode’s bandwidth has been measured to be 22GHz and its responsivity is 0.51 A/W [31]. The submount helps to

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reduce the parasitic capacitance to ground a bit and also facilitates the wirebonding. The IC has been described in [32] with some improvements mentioned in [14]. It has a transimpedance amplifier with a 480 Ohm feedback resistor, several limiting amplifiers and a two tap FFE output driver. The printed circuit board used for the receiver subassembly is the same design as the transmitter’s. A thermistor is present on the receiver printed circuit board and the receiver is mounted over a single layer TEC however, neither is used in these experiments. The temperature of the receiver circuit board rises to 40°C when the receiver is powered on without air flow.

Photodiode

SiGe Receiver IC

Photodiode

SiGe Receiver IC

Fig. 9. Top view of receiver subassembly showing the SiGe receiver IC, photodiode and six decoupling capacitors.

IV. TRANSMISSION RESULTS

The transmission link begins with an SHF 12103A pattern generator with both data and databar outputs connected to the transmitter printed circuit board through 10cm coaxial cables. The pattern is set for PRBS7. The light output from one of the VCSELs is coupled to a 50/125 μm graded index multimode fiber (OM3 grade) first using a diffractive lens (similar to the one described in [33]) and then through a PRIZM® LightTurn® connector1for a coupling efficiency of approximately -5dB. Two meters of fiber connect the transmitter to a variable optical attenuator (JDSU MAP200) and 5m of fiber connects the attenuator output to the lensed fiber probe which couples light into the photodiode. See figure 1 of [12] for a block diagram of the link. The total fiber length of the link is 7m. The differential outputs from the receiver are either connected to an oscilloscope or to an SHF 11100A error detector. At room temperature, this link was found to operate error free (defined as BER < 1E-12 for >200s) to 62Gb/s using equalization and a VCSEL bias current of 9mA. But this bias current was found to be too high for operation at 90 oC as it is well past the point of rollover in the L-I curve. Rather than re-optimize the driving conditions for each temperature, the conditions that were found to be optimal at 90 oC were used for all lower temperature measurements. The optimal VCSEL bias current was found to be 6.9mA which is at or very close to the peak in the L-I at 90

oC. The total link power dissipation was 1.775W (35pJ/bit) which remains approximately constant over temperature due to the constant bias and control settings.

1 PRIZM® and LightTurn® are trademarks or registered trademarks of US

Conec Ltd.

A. Eye Diagrams vs. Temperature

The right column of Fig. 10 shows a set of 50Gb/s transmit optical eye diagrams at different temperatures ranging from 50 to 90 oC with the FFE enabled. The time scale for all eyes is 8.0ps/div and the vertical scale is 5mV/div. The bias current on the VCSEL is fixed at 6.9mA. A linear photodiode (Newport model 1481-S-50) with a bandwidth of 22GHz was used to collect these eyes. A decrease in the optical modulation amplitude with temperature is noticeable. This is due primarily to the decrease in the VCSEL’s L-I slope. The eye at 90 oC appears to be closed on the oscilloscope but this is due to a combination of the low responsivity of the photodiode and the noise from the oscilloscope on this small scale. The extinction ratio, measured using a linear photodiode (Picometrix D25-rx) on the eye at 20Gb/s where no inter-symbol interference (ISI) is present, increases roughly linearly with temperature starting from 1.86 at 30 oC and increasing to 2.25 at 90 oC. The rise and fall times (20-80%) are ~11ps not deconvolved from the oscilloscope response.

50 oC

70 oC

90 oC

With EqualizationNo Equalization

50 oC

70 oC

90 oC

With EqualizationNo Equalization

Fig. 10. Transmit optical eyes at 50Gb/s from 50 to 90 oC. The horizontal scale is 8.0ps/div and the vertical scale is 0.5mW/div. The left column is for the case of no transmitter equalization, see section E. The right column is for the case of transmitter feed forward equalization.

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30 oC

60 oC

90 oC

30 oC

57 oC

X

With Tx EqualizationNo Tx Equalization30 oC

60 oC

90 oC

30 oC

57 oC

X

With Tx EqualizationNo Tx Equalization

Fig. 11. Receiver output electrical eyes at 50Gb/s from 30 to 90 oC. The horizontal scale is 8.0ps/div and the vertical scale is 100mV/div. . The left column is for the case of no transmitter equalization, see section E. The right column is for the case of transmitter feed forward equalization. In both case, the receiver’s FFE tap is in use.

The right column of Fig. 11 shows the 50Gb/s electrical eyes output from the receiver from 30 oC to 90 oC with the FFE enabled. A Tektronix scope head (model 80e09) is used. The horizontal time scale is 8.0ps/div and the vertical scale is 100mV/div. The electrical eyes show an increase in jitter with temperature which is discussed in section IV C. The rise and fall times (20-80%) are ~6ps not deconvolved from the oscilloscope’s response.

B. BER and Penalty vs. Temperature

For nine VCSEL substrate temperatures, ranging from 30 to 90 oC, a BER vs. received optical modulation amplitude (OMA) curve is measured. See Fig. 12. The OMA is calculated from the receiver’s photocurrent and the extinction ratio. The BER is measured in the center of the eye. The sensitivity penalty at BER=1E-12 relative to 30 oC is extracted from these curves and plotted in Fig. 13 in terms of OMA and average optical power. The penalty does not start to increase until the temperature is above 40 oC and then monotonically increases with an almost quadratic characteristic. The increase in transmitter penalty is due in part to observed increase in the ISI and a suspected increase in relative intensity noise with temperature. Both of these effects are tied to the reduction in small signal bandwidth with temperature.

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Fig. 12. BER vs. OMA at 50Gb/s for VCSEL substrate temperatures of 30, 40, 50, 60, 70, 75, 80, 85 and 90 oC (left to right).

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Fig. 13. Penalty vs. VCSEL substrate temperature at BER=1E-12 relative to 30 oC at 50Gb/s. Blue squares represent the pernalty in terrms of OMA while red triangles represent average optical power.

At this time, it is not possible to compare this penalty directly with any other published results as there are no other 50Gb/s results reported above room temperature. At 40Gb/s, where the penalty is expected to be lower due to the larger timing window, there are three papers that provide enough data to extract a temperature penalty in terms of average power [9], [19], and [20]. In [9], there is a 2.5dB penalty at 85 oC which compares closely with the 3.1dB penalty in Fig. 13. In [19] there appears to be negative penalty of 0.5dB at 55 oC and in

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[20] there is a penalty of 0.5dB at 75 oC. For all three of these results, the temperature at which the minimum in threshold current occurs is not reported. Dropping further still to compare at the 25Gb/s rate, Hatekeyama et al., [23], report a penalty in average optical power of 1.5dB at 100C using a VCSEL with a threshold current minimum at 65 oC. As shown in Fig. 3, the minimum in threshold current for the device used for our 50Gb/s measurements occurs at a temperature below room temperature. The penalty over temperature would be expected to be lower with devices having a high temperature for the minimum in threshold current.

C. Jitter vs. Temperature

The jitter as a function of temperature is characterized at 50Gb/s by measuring the bathtub curves (BER vs. clock to data delay). Fig. 14 shows three bathtub curves for temperatures of 30, 60 and 90 oC. At 90 oC, the eye opening (defined at BER=1E-12) was 4.8ps (0.24UI). The random (RJ) and deterministic jitter (DJ) components were extracted from the bathtub curves using a dual-Dirac model [34] and are plotted in Fig. 15 along with the eye opening (EO). From Fig.

15 the EO is decreasing with temperature and the RJ is increasing but the DJ appears to be constant at 7ps. This constant DJ is not consistent with the eye diagrams shown in Fig. 11, which show a pattern dependent eye crossing of ~4ps at 30 oC that increases to ~5.6ps at 85 oC. The constant DJ in this measurement is attributed to the error detector. A temperature dependent DJ is attributable to the reduction in bandwidth and a corresponding increase in ISI. Using a DJ value of 6ps and the measured RJ value of 8.2ps rms would bring the 90 oC eye opening to 0.29 UI which is slightly below the typical minimum eye opening specification for commercial links (0.3UI). The increase in RJ with temperature is attributed to an increase in relative intensity noise from the VCSEL.

Fig. 14. BER vs. relative clock and data delay (bathtub curve) for temperatures of 30 (outermost), 60, and 90 oC (innermost). The points above 1E-10 are the measured data. The blue curves and the points at BER= 1E-12 and 0.25 are from a fit to a dual-Dirac model. The data rate is 50Gb/s.

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Fig. 15. Eye opening, random and deterministic jitter as a function of VCSEL substrate temperature at 50Gb/s.

D. Measurements at 51.5625Gb/s

At the moment, there appears to be only one standard that is considering an NRZ serial signaling rate above 50Gb/s. This is the InfiniBand® HDR which, if implemented, would call for a signaling rate of 51.5625Gb/s. Fig. 16 shows the BER vs. OMA for temperatures of 50 to 90 oC at this rate. For temperatures above 70 oC this 3% increase in data rate incurs a 1dB penalty compared to 50Gb/s.

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Fig. 16. BER vs. OMA at InfiniBand® HDR rate (51.5625Gb/s) for VCSEL substrate temperatures of 50, 70, 80, 85 and 90 oC (left to right).

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E. Measurements without Equalization

To see the impact of the two tap feed forward equalizer on the link performance, a series of measurements were performed with the same transmitter and receiver settings except that one of the transmitter FFE taps was turned off. The tap that was left on was on the one set for the largest modulation amplitude. This setting creates a typical non-equalized driving condition The temperature was raised until the point were BER=1E-12 could no longer be reached. A small increase in bias current from 6.9mA to 8.0mA helped to increase the temperature range. The error free temperature attained without equalization was found to be 57oC. Fig. 17 shows the unequalized BER curves as a function of temperature from 30 to 65oC using the settings from the 57oC curve. For the unequalized case, the extinction ratio is much higher, starting at 2.44 (30oC) and increasing to 3.14 (65oC) but the ISI is also much larger which results in a large penalty compared with the equalized case in Fig. 12. The optical eye diagrams without equalization are shown in the left column of Fig. 10 and the received electrical eye diagrams for this case are shown in the left column of Fig. 11

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Fig. 17. BER vs. OMA at 50Gb/s without transmitter equalization for VCSEL substrate temperatures of 30, 40, 50, 57, 60, and 65oC (left to right).

In comparing the equalization with no equalization it is interesting to look at the optical link margin rather than the relative receiver sensitivity. Fig. 18 shows the optical link margin for the two cases as a function of temperature. The optical link margin is defined as the amount of optical

attenuation on the attenuator at the BER=1E-12 point. It can be seen that equalization can improve the link budget at a given temperature or for a fixed link margin, it can increase the temperature range of operation.

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Lin

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arg

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EQNo EQ

Fig. 18. Optical link margin vs. temperature with and without transmitter equalization at 50Gb/s.

V. RELIABILITY ESTIMATE

With such high temperature operation of a laser, the reliability becomes a concern. Table 1 in the Appendix also lists bias currents, device diameters and current densities for the data points in Fig. 1. There are several recent reliability reports on commercially viable 28 Gb/s 850nm VCSELs which also use Indium in the active region [35][36]. These two reports reached similar conclusions with respect the activation energy (Ea>1eV) and current acceleration factor (n>2). The 6um VCSEL device aperture used in this study is slightly smaller, 15%, than the 6.5um device reported in [35]. The current density used, 24.4kA/cm2, is also only 15% higher than the 21.0kA/cm2 used for the device reported in [35]. At 6.9mA and 70C ambient, the VCSEL in this study would be expected to have comparable reliability to the data shown in figure 5.3 of reference [35] with a time to 1% failure in the range of 80 – 90 years. Extending this analysis to 6.9mA at 90°C ambient would result in an estimated time to 1% failure of >15 years [37]. While continuous operation at 90°C may be considered to be beyond worst case, this reliability estimate gives some indication that large HPC system with a typical lifespan of 6 years would not see many optical link failures. The 6.9mA bias point was choosen based on best performance at 90C. In principle and often in practice, the bias current can be further lowered for operation at lower temperatures, thus reducing the stress on the VCSEL.

VI. CONCLUSION

Demonstrating high temperature operation at 50Gb/s is one of the necessary steps towards establishing commercial viability of a technology. Here we have shown an 850nm VCSEL transmitter operating at this bit rate from 30 to 90°C with a fixed driving condition that incorporates transmit equalization. The link was characterized in terms of BER and jitter.

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Without the use of equalization, the maximum operating temperature was limited to 57°C. A remaining step would be to confirm the reliability which usually lags the technical performance and is expected to be similar to commercial 25 to 28Gb/s devices as the bias current densities used in this experiment are comparable.

APPENDIX

The following table contains the data points and references used in Fig. 1. along with the bias currents, device diameter and operating current density.

Table 1. Data and References used in Fig. 1

Wavelength [nm

]

Data R

ate [Gb/s]

Tem

perature [C]

Data

Bias C

urrent [mA

]

Device D

iameter [

m]

Current D

ensity [kA

/cm2]

Reference

850 10 150 Eyes Only 4 4 31.8 [1]

850 12.5 140 Eyes Only 4 4 31.8 [1]

850 14 95 Mask Margin 6 8 11.9 [2]

850 25 85 Eyes Only 8 7.5 18.1 [3]

850 28 85 BER, Eyes 6 6 21.2 [4]

850 28 40 Eyes Only 7.5 7 19.5 [5]

850 30 25 BER, Eyes [6]

850 34 85 BER, Eyes 4 4 31.8 [7]

850 34 25 BER, Eyes 7 6 24.8 [4]

850 38 20 BER, Eyes 9 9 14.1 [8]

850 40 85 BER, Eyes 9.5 7 24.7 [9]

850 40 25 BER, Eyes 8 7 20.8 [10]

850 44 25 BER, Eyes 13.5 7 35.1 [11]

850 47 25 BER, Eyes 10 7 26.0 [9]

850 50 90 BER, Eyes 6.9 6 24.4

This paper

850 56 25

BER and Eyes 8.1 7 21.0 [12]

850 57 25

BER and Eyes 13 8 25.9 [13]

Wavelength [nm

]

Data R

ate [Gb/s]

Tem

perature [C]

Data

Bias C

urrent [mA

]

Device D

iameter [

m]

Current D

ensity [kA

/cm2]

Reference

850 64 25 BER, Eyes 8 5 40.7 [14]

980 12.5 155 BER 6 6 21.2 [15] 980 17 145 BER 6 6 21.2 [15]

980 20 120 Eyes Only 6 3 84.9 [16]

980 25 120 BER 8 6 28.3 [15]

980 25 70 Eyes Only 7 8 13.9 [17]

980 35 20 BER, Eyes 4.4 3 62.2 [18]

980 38 85 BER 13 6 46.0 [19] 980 40 75 BER 14 6 49.5 [20] 980 44 25 BER 13 6 46.0 [19]

980 46 85 BER, Eyes 7.5 5 38.2 [21]

980 47 0 BER 13 5 66.2 [15][14] 980 49 -14 BER 13 5 66.2 [15]

980 50 25 BER, Eyes 8 5 40.7 [21]

1090 6 115 BER, Eyes 9.8 13 7.4 [22]

1090 25 100 BER, Eyes 6 6 21.2 [23]

1090 40 25 BER, Eyes 5 6 17.7 [24]

1270 30 25 BER, Eyes 7 3 99.0 [25]

1330 25 20 Eyes Only [26]

1330 10 90 Eyes Only [26]

1320 10 100 BER, Eyes 9 6 31.8 [27]

1550 25 55 BER, Eyes 9.6 5 48.9 [28]

1550 35 25 BER, Eyes 7.3 5 37.2 [28]

ACKNOWLEDGMENTS

The authors acknowledge IQE Europe for providing the epitaxial material for the VCSELs. A portion of this research is financially supported by the Swedish Foundation for Strategic Research.

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[37] Estimate provided by Avago Technologies, Fiber Optics Product Division using the parameters from [35].

Daniel M. Kuchta (IEEE SM’97) is a Research Staff Member in the Communications and Computation Subsystems Department at the IBM Thomas J. Watson Research Center. He received B.S., M.S., and Ph.D. degrees in Electrical Engineering and Computer Science from the University of California at Berkeley in 1986, 1988, and 1992, respectively. He subsequently joined IBM at the Thomas J. Watson Research Center, where he has worked on high-speed VCSEL characterization, multimode fiber links, and parallel fiber optic link research. Dr. Kuchta is an author/coauthor of more than 100 technical papers and inventor/co-inventor of more than 15 patents. Alexander V. Rylyakov received the M.S. degree in physics from Moscow Institute of Physics and Technology in 1989 and the Ph.D. degree in physics from State University of New York at Stony Brook in 1997. From 1994 to 1999 he worked in the Department of Physics at SUNY Stony Brook on the design and testing of integrated circuits based on Josephson junctions. In 1999 he joined IBM T.J. Watson Research Center as a research staff member. Dr. Rylyakov's main current research interests are in the areas of digital phase-locked loops and integrated circuits for wireline and optical communication. Clint L. Schow (SM’10) received the Ph.D. degree in electrical engineering from the University of Texas at Austin, Austin, TX, USA, in 1999. He joined IBM, Rochester, MN, USA, assuming responsibility for the optical receivers used in IBM’s optical transceiver business. From 2001 to 2004, he was with Agility Communications, Santa Barbara, CA, USA, developing high speed optoelectronic modulators and tunable laser sources. In 2004, he joined the IBM Thomas J. Watson Research Center, Yorktown Heights, New York, NY, USA, as a Research Staff Member and currently manages the Optical Link and System Design group responsible for optics in future generations of servers and supercomputers. He has directed multiple DARPA-sponsored programs investigating chip-to-chip optical links, nanophotonic switches, and future systems utilizing photonic switching fabrics. He has published more than 125 journals and conference articles, and has ten issued and more than 20 pending patents. He is a senior member of the OSA.

Jonathan E. Proesel (M’10) received the B.S. degree in computer engineering from the University of Illinois at Urbana-Champaign in 2004. He received the M.S. and Ph.D. degrees in electrical and computer engineering from Carnegie Mellon University, Pittsburgh, PA, in

2008 and 2010, respectively. He joined the IBM Thomas J. Watson Research Center, Yorktown Heights, NY, in 2010, where he is currently a Research Staff Member working on analog and mixed-signal circuit design for optical transmitters

and receivers. He has also held internships with IBM Microelectronics, Essex Junction, VT, in 2004 and IBM Research, Yorktown Heights, NY, in 2009. His research interests include high-speed optical and electrical communications, silicon photonics, and data converters. Dr. Proesel is a member of the IEEE Solid-State Circuits Society. He received the Analog Devices Outstanding Student Designer Award in 2008, the SRC Techcon Best in Session Award for Analog Circuits in 2009, and co-received the Best Student Paper Award for the 2010 IEEE Custom Integrated Circuits Conference.

Christian W. Baks received the B.S. degree in applied physics from Fontys College of Technology, Eindhoven, The Netherlands in 2000 and the M.S. degree in physics from the State University of New York, Albany in 2001. He joined the IBM T.J. Watson Research Center, Yorktown Heights, NY, as

an engineer in 2001, where he is involved in high-speed optoelectronic package and backplane interconnect design specializing in signal integrity issues.

Petter Westbergh received his M.Sc. degree in Engineering Physics and his Ph.D. degree in Microtechnology and Nanoscience from Chalmers University of Technology, Göteborg, Sweden, in 2007 and 2011, respectively. His thesis focused on the design, fabrication, and

characterization of high-speed 850 nm vertical-cavity surface-emitting lasers (VCSELs) intended for application in short-reach communication networks. He is currently continuing his work on improving the performance of high-speed VCSELs with the Department of Microtechnology and Nanoscience at Chalmers University of Technology.

Johan S. Gustavsson received his M.Sc. degree in Electrical Engineering and his Ph.D. degree in Photonics from the Chalmers University of Technology, Göteborg, Sweden, in 1998 and 2003, respectively. His main research topics were mode dynamics and noise

in vertical-cavity surface-emitting lasers (VCSELs). Since 2003 he has been a researcher at the Photonics

Laboratory, Department of Microtechnology and Nanoscience, Chalmers University of Technology, with an Assistant Professor position 2004-2008, and an Associate Professor position 2011-. In Sept.-Oct. 2009 he was a visiting scientist at CNR Polytechnico, Turin, Italy. He has authored or coauthored more than 140 scientific journal and conference papers, and his research has been focused on semiconductor lasers for short to medium reach communication, and sensing applications. This has included surface relief techniques for mode and polarization control in VCSELs, 1.3 µm InGaAs VCSELs/GaInNAs ridge waveguide lasers for access

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networks, 2.3-3.5 µm GaSb VCSELs for CO, CO2 and NH3 sensing, and tunable VCSELs via moveable mirror for reconfigurable optical interconnects. He is currently working on 56 Gb/s 850-nm VCSELs for next generation datacom links, blue/green GaN VCSELs, high contrast gratings as feedback elements in micro-cavity lasers, and heterogeneous integration of III/V-based VCSEL material on Si-platform.

Anders Larsson received the M.Sc. and Ph.D. degrees in electrical engineering from Chalmers University of Technology, Göteborg, Sweden, in 1982 and 1987, respectively. In 1991, he joined the faculty at Chalmers where he was promoted to Professor in 1994. From 1984 to 1985 he was with the Department of Applied Physics, California Institute of

Technology, and from 1988 to 1991 with the Jet Propulsion Laboratory, both at Pasadena, CA, USA. He has been a guest professor at Ulm University (Germany), at the Optical Science Center, University of Arizona at Tucson (USA), at Osaka University (Japan), and at the Institute of Semiconductors, Chinese Academy of Sciences (China). He co-organized the IEEE Semiconductor Laser Workshop 2004, organized the European Semiconductor Laser Workshop 2004, was a co-program chair for the European Conference on Optical Communication 2004, and was the program and general chair for the IEEE International Semiconductor Laser Conference in 2006 and 2008, respectively. He is a member of the IEEE Photonics Society Board of Governors, an associate editor for IEEE/OSA Journal of Lightwave Technology and a member of the editorial board of IET Optoelectronics. His scientific background is in the areas of optoelectronic materials and devices for optical communication, information processing, and sensing. Currently, his research is focused on vertical cavity surface emitting lasers and optical interconnects. He has published more than 500 scientific journal and conference papers and 2 book chapters. He is a Fellow of IEEE, OSA, and EOS. In 2012 he received the HP Labs Research Innovation Award.


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