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DM6914User�s Manual

(Real Time Devices)

RTD Embedded Technologies Inc.

�Accessing the Analog World�®

BDM-610010017Rev. A

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DM6914User�s Manual

RTD Embedded Technologies, INC.103 Innovation Blvd.

State College, PA 16803-0906

Phone: +1-814-234-8087FAX: +1-814-234-5218

[email protected]

[email protected]

web sitehttp://www.rtd.com

Revision History

Rev. A New manual naming method

Published by:

RTD Embedded Technologies, Inc.103 Innovation Blvd.

State College, PA 16803-0906

Copyright 1999, 2002, 2003 by RTD Embedded Technologies, Inc.All rights reservedPrinted in U.S.A.

The RTD Logo is a registered trademark of RTD Embedded Technologies. cpuModule and utilityModule are trademarksof RTD Embedded Technologies. PhoenixPICO and PheonixPICO BIOS are trademarks of Phoenix Technologies Ltd. PS/2, PC/XT, PC/AT and IBM are trademarks of International Business Machines Inc. MS-DOS, Windows, Windows 95,Windows 98 and Windows NT are trademarks of Microsoft Corp. PC/104 is a registered trademark of PC/104 Consortium.All other trademarks appearing in this document are the property of their respective owners.

Table of Contents

i

INTRODUCTION .................................................................................................................................... i-1

Incremental Encoders .............................................................................................................................................. i-38254 Timer/Counters .............................................................................................................................................. i-3What Comes With Your Module ............................................................................................................................ i-3Module Accessories ................................................................................................................................................ i-3Using This Manual .................................................................................................................................................. i-3When You Need Help ............................................................................................................................................. i-4

CHAPTER 1 � MODULE SETTINGS ............................................................................................... 1-1

Factory-Configured Switch and Jumper Settings .................................................................................................. 1-3JP1, JP2 � Interrupt Channel Select (Factory Setting: Jumper installed on G; IRQ Disabled) ..................... 1-4JP3 � 8254 Clock and Gate Source Select (Factory Settings: See Figure 1-4) .............................................. 1-6JP5 � Not Used ................................................................................................................................................ 1-7JP4 � Interrupt Source Select (Factory Setting: OT2) .................................................................................... 1-7SW1 � Base Address (Factory Setting: 300 hex (768 decimal)) ..................................................................... 1-8

JP6 through JP11, Pull-up/Pull-down Resistors on Digital I/O Lines ................................................................... 1-9

CHAPTER 2 � MODULE INSTALLATION .................................................................................... 2-1

Module Installation ................................................................................................................................................ 2-3External I/O Connections ....................................................................................................................................... 2-3

Connecting an Incremental Encoder .................................................................................................................. 2-3Connecting the Digital I/O ................................................................................................................................. 2-3Connecting the Timer/Counter I/O .................................................................................................................... 2-3Connecting the External Interrupt ..................................................................................................................... 2-3

Running the 6914DIAG Diagnostics Program ...................................................................................................... 2-4

CHAPTER 3 � HARDWARE DESCRIPTION................................................................................. 3-1

Incremental Encoders ............................................................................................................................................. 3-3Timer/Counters ...................................................................................................................................................... 3-3

CHAPTER 4 � I/O MAPPING ............................................................................................................ 4-1

Defining the I/O Map ............................................................................................................................................. 4-3BA + 0: Incremental Encoder 1 MSB (Read/Write) ......................................................................................... 4-4BA + 1: Incremental Encoder 1 MSB (Read/Write) .......................................................................................... 4-4BA + 2: Incremental Encoder 1 Clear/Hold/Digital I/O (Read/Write) ............................................................. 4-4BA + 3: Incremental Encoder 1 Chip Mode Register (Read/Write) ................................................................. 4-5BA + 4: Incremental Encoder 2 MSB (Read/Write) ......................................................................................... 4-6BA + 5: Incremental Encoder 2 MSB (Read/Write) .......................................................................................... 4-6BA + 6: Incremental Encoder 2 Clear/Hold/Digital I/O (Read/Write) ............................................................. 4-6BA + 7: Incremental Encoder 2 Chip Mode Register (Read/Write) ................................................................. 4-7BA + 8: Incremental Encoder 3 MSB (Read/Write) ......................................................................................... 4-8BA + 9: Incremental Encoder 3 MSB (Read/Write) .......................................................................................... 4-8BA + 10: Incremental Encoder 3 Clear/Hold/Digital I/O (Read/Write) ........................................................... 4-8BA + 11: Incremental Encoder 3 Chip Mode Register (Read/Write) ............................................................... 4-9BA + 12: 8254 Timer/Counter 0 (Read/Write) ............................................................................................... 4-10BA + 13: 8254 Timer/Counter 1 (Read/Write) ............................................................................................... 4-10BA + 14: 8254 Timer/Counter 2 (Read/Write) .............................................................................................. 4-10

ii

BA + 15: 8254 Timer/Counter Control Word (Write Only) .......................................................................... 4-10BA + 16: Clear IRQ/IRQ Enable (Read/Write) .............................................................................................. 4-10BA + 17: IRQ Status (Read Only) .................................................................................................................. 4-11BA + 18: Reserved.......................................................................................................................................... 4-11BA + 19: Reserved.......................................................................................................................................... 4-11

Programming the DM6914 .................................................................................................................................. 4-12Clearing and Setting Bits in a Port ....................................................................................................................... 4-12

CHAPTER 5 � DIGITAL I/O ............................................................................................................. 5-1

CHAPTER 6 � TIMER/COUNTERS ................................................................................................. 6-1

CHAPTER 7 � INTERRUPTS ............................................................................................................ 7-1

JP4: Jumper Selectable Interrupts .......................................................................................................................... 7-3Incremental Encoder Interrupts .............................................................................................................................. 7-3Selecting the Interrupt Channel .............................................................................................................................. 7-3Interrupt Sharing .................................................................................................................................................... 7-3Basic Programming For Interrupt Handling .......................................................................................................... 7-4

What Is an Interrupt? ......................................................................................................................................... 7-4Interrupt Request Lines ...................................................................................................................................... 7-48259 Programmable Interrupt Controller .......................................................................................................... 7-4

Interrupt Mask Register (IMR) ...................................................................................................................... 7-4End-of-Interrupt (EOI) Command ................................................................................................................. 7-4

What Exactly Happens When an Interrupt Occurs? .......................................................................................... 7-5Using Interrupts in Your Programs.................................................................................................................... 7-5Writing an Interrupt Service Routine (ISR) ....................................................................................................... 7-5Saving the Startup Interrupt Mask Register (IMR) and Interrupt Vector ......................................................... 7-6Restoring the Startup IMR and Interrupt Vector ............................................................................................... 7-7Common Interrupt Mistakes .............................................................................................................................. 7-7

APPENDIX A � DM6914 SPECIFICATIONS .................................................................................. A-1

APPENDIX B � CONNECTOR PIN ASSIGNMENTS .................................................................... B-1

APPENDIX C � COMPONENT DATA SHEETS ............................................................................ C-1

APPENDIX D � WARRANTY............................................................................................................ D-1

List of Illustrations

1-1 Module Layout Showing Factory-Configured Settings ........................................................................... 1-41-2 Interrupt Channel Select Jumper, JP1 and JP2 ........................................................................................ 1-51-3 Pulling Down the Interrupt Request Lines ............................................................................................... 1-51-4 8254 Clock and Gate Sources Jumpers, JP3 ............................................................................................ 1-61-5 8254 Circuit Diagram ............................................................................................................................... 1-61-6 Interrupt Source Select Jumper, JP4 ........................................................................................................ 1-71-7 Base Address Switch, SW1 ...................................................................................................................... 1-81-8 Port 0 Pull-up/Pull-down Resistor Connections, JP6............................................................................... 1-92-1 CN3 I/O Connector Pin Assignments ...................................................................................................... 2-43-1 DM6914 Block Diagram .......................................................................................................................... 3-33-2 Timer/Counter Circuit Block Diagram ..................................................................................................... 3-46-1 8254 Timer/Counter Circuit Block Diagram ............................................................................................ 6-3

iii

i-1

INTRODUCTION

i-3

The DM6914 incremental encoder dataModule® turns your IBM PC-compatible cpuModule� or other PC/104computer into a high-performance control system. Ultra-compact for embedded and portable applications, the modulefeatures:

� Three 16-bit incremental encoder up/down counters,� Three 16-bit timer/counters and on-board 8 MHz clock,� Operation from single +5V supply,� DOS example programs with source code in BASIC and C,� Diagnostics software.

The following paragraphs briefly describe the major functions of the module. A detailed discussion of modulefunctions is included in subsequent chapters.

Incremental Encoders

Depending on your specifications when ordering your DM6914, your module will have up to three incrementalencoder circuits. Each of these circuits has one 16-bit up/down counter for incremental encoding applications suchas position encoding and velocity detection, and eight digital I/O lines available for control functions. Six lines areinput only, and two are input/output.

The body of this manual is written for a DM6914 configured with three incremental encoder circuits on board.Your module can have one, two, or three such circuits, depending on your specifications to the factory at the time ofyour order. If you have less than three encoder circuits, the remaining circuits each consist of 16 programmabledigital I/O lines.

8254 Timer/Counters

An 8254 programmable interval timer provides three 16-bit, 8 MHz timer/counters to support a wide range of usertiming and counting functions.

What Comes With Your Module

You receive the following items in your module package:

� DM6914 module with stackthrough bus header� Mounting hardware� Example programs in BASIC and C with source code & diagnostics software� User�s manual

If any item is missing or damaged, please call RTD Embedded Technologies, Inc. Customer Service Departmentat (814) 234-8087. If you require service outside the U.S., contact your local distributor.

Module Accessories

In addition to the items included in your module package, Real Time Devices offers a full line of software andhardware accessories. Call your local distributor or our main office for more information about these accessories andfor help in choosing the best items to support your module�s application.

Using This Manual

This manual is intended to help you install your new module and get it running quickly, while also providingenough detail about the module and its functions so that you can enjoy maximum use of its features even in the mostcomplex applications. We assume that you already have an understanding of data acquisition principles and that youcan customize the example software or write your own application programs.

i-4

When You Need Help

This manual and the example programs in the software package included with your module provide enoughinformation to properly use all of the module�s features. If you have any problems installing or using thisdataModule, contact our Technical Support Department, (814) 234-8087, during regular business hours, easternstandard time or eastern daylight time, or send a FAX requesting assistance to (814) 234-5218. When sending a FAXrequest, please include your company�s name and address, your name, your telephone number, and a brief descrip-tion of the problem. You can also contact us through our E-mail address [email protected].

1-1

CHAPTER 1

MODULE SETTINGS

The DM6914 has jumper and switch settings you can change ifnecessary for your application. The module is factory-configuredas listed in the table and shown on the layout diagram in the begin-ning of this chapter. Should you need to change these settings, usethese easy-to-follow instructions before you stack the module withyour computer system.

Also note that by setting the jumpers as desired on headerconnectors JP6 through JP11 for digital I/O lines on the module, youcan configure each digital I/O line to be pulled up or pulled down. Thisprocedure is explained at the end of this chapter.

1-3

Factory-Configured Switch and Jumper Settings

Table 1-1 lists the factory settings of the user-configurable jumpers and switch on the DM6914 module. Fig-ure 1-1 shows the module layout and the locations of the factory-set jumpers. The following paragraphs explain howto change the factory settings. Pay special attention to the setting of S1, the base address switch, to avoid addresscontention when you first use your module in your system.

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1-4

Fig. 1-1 � Module Layout Showing Factory-Configured Settings

JP1, JP2 � Interrupt Channel Select (Factory Setting: Jumper installed on G; IRQ Disabled)

These header connectors, shown in Figure 1-2, lets you connect any one of four jumper selectable (JP4) interruptsources or any of the Incremental Encoder interrupts to an interrupt channel, IRQ2 through IRQ15. XT channels 2through 7 are jumpered on JP1 and AT channels 10 through 15 are jumpered on JP2. In AT computers channels 2 and9 are the same channel. To activate a channel, you must install a jumper vertically across the desired IRQ channel�spins. Only one channel on either JP1 or JP2 should be jumpered at any time. Figure 1-2a shows the factory settings.

This module supports an interrupt sharing mode where the pins labeled G connect a 1 kilohm pull-down resistorto the output of a high-impedance tri-state driver which carries the interrupt request signal. This pull-down resistordrives the interrupt request line low whenever interrupts are not active. Whenever an interrupt request is made, thetri-state buffer is enabled, forcing the output high and generating an interrupt. There are four IRQ circuits, one for theP14 jumper selectable interrupts and one each for the incremental encoder channels. Their outputs are tied togetherthrough an "OR" gate, allowing all interrupt sources to share the same IRQ channel. To determine which circuit hasgenerated an interrupt on the selected IRQ channel, read the status byte (I/O address location BA + 17) and checkthe status of bits 0 through 3, as described in Chapter 4. After the interrupt has been serviced, you must return theIRQ line low, disabling the tri-state buffer and pulling the output low again. This is done by clearing the IRQ for thesource which generated the interrupt. You also can have two or more modules that share the same IRQ channel. Youcan tell which module issued the interrupt request by monitoring each module�s IRQ status bit(s). If you are notplanning on sharing interrupts or if you are not sure that your CPU supports interrupt sharing, it is best to disablethis feature and use the interrupts in the normal mode. This will insure compatibility with all CPUs. See chapter 4 fordetails on disabling the interrupt sharing circuit.

NOTE: When using multiple modules sharing the same interrupt, only one module should have the Gjumper installed. The rest should be disconnected. Whenever you operate a single module, the G jumper should beinstalled. Whenever you operate the module with interrupt sharing disabled, the G jumper should be removed.

1-5

Fig. 1-2 � Interrupt Channel Select Jumpers, JP1 and JP2

Fig. 1-3 � Pulling Down the Interrupt Request Lines

10 11 12 14 15

JP1

JP2

INTERRUPT

+5 VINTERRUPTREGISTER

JP4INTERRUPT

SOURCE

CLR

JP4IRQ STATUS

(BA+17, BIT 3)

JP1G

CLR

CLK

INTERRUPTREGISTER

CLR

INCREMENTALENCODER CH-1

IRQ STATUS(BA+17, BIT 0)

CLR

CLKINCREMENTAL

ENCODER CH-1INTERRUPT

INTERRUPTREGISTER


INTERRUPT

CLR



CLR

CLK

INTERRUPTREGISTER

CLR



CLR

CLKINCREMENTAL

ENCODER CH-3INTERRUPT

PROGRAMMABLEINVERT

234567G

1-6

Fig. 1-5 � 8254 Circuit Diagram

CLK1

CLK2

CLK0

ON-BOARDI/O CONNECTOR

CN3

PIN 62

PIN 59

PIN 58

8254

TIMER/COUNTER

0CLK

GATE

OUT

TIMER/COUNTER

1CLK

GATE

OUT

TIMER/COUNTER

2CLK

GATE

OUT

PIN 55

PIN 63

XTAL (8 MHz)

JP3

+5 V

+5 V

+5 V

PIN 56

PIN 57

PIN 60

PIN 61

T/C OUT 0

OUT0

OUT1

EXT CLK 0

T/C OUT 1

EXT CLK 1

EXT GATE 2

T/C OUT 2

EXT CLK 2

EXT GATE 0

EXT GATE 1

JP3 � 8254 Clock and Gate Source Select (Factory Settings: See Figure 1-4)

This header connector, shown in Figure 1-4, lets you select the clock sources for the three 8254 16-bit timer/counters. Figure 1-5 shows a block diagram of the timer/counter circuitry to help you in making these connections.

The clock source for Counter 0 is selected by placing a jumper on one of the two leftmost pairs of pins on theheader, OSC or EC0. OSC is the on-board 8 MHz clock, and EC0 is an external clock source which can be connectedthrough I/O connector CN3, pin 55. Counter 1 has three clock sources: OT0, which cascades it to Counter 0; OSC,which is the on-board 8 MHz clock; and EC1, which is an external clock source connected through I/O connectorCN3, pin 59. Counter 2 has three clock sources: OT1, which cascades it to Counter 1; OSC, which is the on-board 8MHz clock; and EC2, which is an external clock source connected through I/O connector CN3, pin 61.

The gate of Counter 2 can be connected to the output of Counter 1 (OT1) or to an external gate source (EG2)connected through I/O connector CN3, pin 62. When no external gate source is connected, this line is tied high.

OSC

EC0

OT0

OSC

EC1

OT1

OSC

EC2

OT1

EG2

GT

2C

LK2

CLK

0

JP3

CLK

1

Fig. 1-4 � 8254 Clock and Gate Sources Jumpers, JP3

1-7

JP5 � Not Used

This header connector is not used on the DM6914 and should have no jumpers installed.

JP4 � Interrupt Source Select (Factory Setting: OT2)

This header connector, shown in Figure 1-6, lets you select one of four interrupt sources for interrupt generation.These sources are not part of the EPLD digital interrupt circuitry. The four sources are: EI1, external interrupt 1, CN3-64; EI2, external interrupt 2, CN3-54; OT1, the output of timer/counter 1; and OT2, the output of timer/counter 2. Toconnect an interrupt source, place the jumper across the desired set of pins.

Fig. 1-6 � Interrupt Source Select Jumper, JP4

EI2

EI1

OT

1

OT

2

JP4

1-8

SW1 � Base Address (Factory Setting: 300 hex (768 decimal))

One of the most common causes of failure when you are first trying your module is address contention. Some ofyour computer�s I/O space is already occupied by internal I/O and other peripherals. When the module attempts touse I/O address locations already used by another device, contention results and the module does not work.

To avoid this problem, the DM6914 has an easily accessible DIP switch, SW1, which lets you select any one of16 starting addresses in the computer�s I/O. Should the factory setting of 300 hex (768 decimal) be unsuitable for yoursystem, you can select a different base address simply by setting the switches to any one of the values listed inTable 1-2. The table shows the switch settings and their corresponding decimal and hexadecimal (in parentheses)values. Make sure that you verify the order of the switch numbers on the switch (1 through 4) before setting them.When the switches are pulled forward, they are OPEN, or set to logic 1, as labeled on the DIP switch package. Whenyou set the base address for your module, record the value in the table inside the back cover. Figure 1-7 shows theDIP switch set for a base address of 300 hex (768 decimal).

Fig. 1-7 � Base Address Switch, SW1

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1-9

JP6 through JP11, Pull-up/Pull-down Resistors on Digital I/O Lines

The DM6914 has 24 TTL/CMOS compatible digital I/O lines which can be interfaced with external devices. Theselines are grouped into eight lines each per encoder circuit. Six lines are input only and two are I/O lines. You canconnect pull-up or pull-down resistors to any or all of these lines on a bit by bit basis. You may want to pull lines upfor connection to switches. This will pull the line high when the switch is disconnected. Or, you may want to pulllines down for connection to relays which control turning motors on and off. These motors turn on when the digitallines controlling them are high. By pulling these lines down, you can ensure that when the data acquisition system isfirst turned on, the motors will not switch on before the port is initialized.

Pull-up/pull-down resistors have been factory installed on the module, and jumpers have been provided for JP6through JP11, bits 0 through 3, for all 24 digital lines. Bits 4 through 7 on all six connectors are not used and shouldnot be jumpered. Each port and bit is labeled on the module. JP6 connects to the resistors for Port 0 (P0.0-P0.3), JP7connects to the resistors for Port 1 (P1.0-P1.3), and so on. The pins are labeled G (for ground) on one end and V (for+5V) on the other end. The middle pin is common. Figure 1-8 shows JP6 with the factory-installed jumpers placedbetween the common pin (middle pin of the three) and the V pin. For pull-downs, install the jumper across thecommon pin (middle pin) and G pin. To disable the pull-up/pull-down resistor, remove the jumper.

Fig. 1-8 � Port 0 Pull-up/Pull-down Resistor Connections, JP6

0

1

2

3

4

5

6

7

V G

JP6 PORT 0

2-1

CHAPTER 2

MODULE INSTALLATION

The DM6914 is easy to install in your cpuModule� or otherPC/104 based system. This chapter tells you step-by-step how toinstall and connect the module.

After you have installed the module and made all of yourconnections, you can turn your system on and run the 6914DIAGboard diagnostics program included on your example software diskto verify that your module is working.

2-3

Module Installation

Keep the module in its antistatic bag until you are ready to install it in your cpuModule� or other PC/104 basedsystem. When removing it from the bag, hold the module at the edges and do not touch the components or connec-tors.

Before installing the module in your system, check the jumper and switch settings. Chapter 1 reviews the factorysettings and how to change them. If you need to change any settings, refer to the appropriate instructions in Chapter1. Note that incompatible jumper settings can result in unpredictable module operation and erratic response.

The DM6914 comes with a stackthrough bus connector. The stackthrough connector lets you stack anothermodule on top of your DM6914.

To install the module, follow the procedures described in the computer manual and the steps below:

1. Turn OFF the power to your system.

2. Touch a metal rack to discharge any static buildup and then remove the module from its antistatic bag.

3. Select the appropriate standoffs for your application to secure the module when you install it in your system(two sizes are included with the module).

4. Holding the module by its edges, orient it so that the CN1 bus connector�s pin 1 lines up with pin 1 of theexpansion connector onto which you are installing the module.

5. After carefully positioning the module so that the pins are lined up and resting on the expansion connector,gently and evenly press down on the module until it is secured on the connector.

NOTE: Do not force the module onto the connector. If the module does not readily press into place, remove itand try again. Wiggling the module or exerting too much pressure can result in damage to the DM6910 or tothe mating module.

6. After the module is installed, connect the cable to I/O connector CN3 on the module.

7. Make sure all connections are secure.

Connecting an Incremental Encoder

Connect the A and B outputs from the Incremental Encoder to the appropriate A and B inputs on CN3. Power forthe Encoder can be connected to one of the +5 volt pins and ground can be connected to any Digital Ground pin.The Overflow output generates a pulse if the up/down counter overflows or underflows. This can be connected tothe IRQIN pin to generate an interrupt.

Connecting the Digital I/O

For all digital I/O connections, the high side of an external signal source or destination device is connected tothe appropriate signal pin on the I/O connector, and the low side is connected to the DIGITAL GND.

Connecting the Timer/Counter I/O

External connections to the timer/counters on the DM6910 can be made by connecting the high side of theexternal device to the appropriate signal pin on I/O connector CN3 and the low side to a DIGITAL GND.

Connecting the External Interrupt

The DM6910 can receive externally generated interrupt signals � EXT INT1, through I/O connector CN3, pin 64,and EXT INT2, through I/O connector CN3, pin 54 � and route them to an IRQ channel through on-board headerconnectors JP4, JP1 and JP2. Interrupt generation is enabled through software. When interrupts are enabled, a risingor falling edge on the EXT INT line will cause the selected IRQ line to go high, depending on the setting of BA + 16,bit 1, and the IRQ status bit will change from 0 to 1. The pulse applied to the EXT INT pin should have a duration ofat least 100 nanoseconds.

2-4

Fig. 2-1 � CN3 I/O Connector Pin Assignments

Running the 6914DIAG Diagnostics Program

Now that your module is ready to use, you will want to try it out. An easy-to-use, menu-driven diagnosticsprogram, 6914DIAG, is included with your example software to help you verify your module�s operation. You can alsouse this program to make sure that your current base address setting does not contend with another device.

39 40

37 38

35 36

33 34

31 32

29 30

27 28

25 26

23 24

21 22

19 20

17 18

15 16

13 14

11 12

9 10

7 8

5 6

3 4

1 2

49 50

47 48

45 46

43 44

41 42

INC ENC-3 IRQ IN

OVERFLOW-3 OUT

INC ENC-3 CH-B

INC ENC-3 CH-A

P4.3

P4.2

P4.1

P4.0

DIGITAL GND

INC ENC-2 IRQ IN

OVERFLOW-2 OUT

INC ENC-2 CH-B

INC ENC-2 CH-A

P2.3

P2.2

P2.1

P2.0

DIGITAL GND

INC ENC-1 IRQ IN

OVERFLOW-1 OUT

INC ENC-1 CH-B

INC ENC-1 CH-A

P0.3

P0.2

P0.1

P0.0

DIGITAL GND

EXT CLK 0

T/C OUT 0

EXT CLK 1

EXT CLK 2

T/C OUT 2

+5 VOLTS

+5 VOLTS

N. C.

N. C.

N. C.

N. C.

P5.3

P5.2

P5.1

P5.0

DIGITAL GND

N. C.

N. C.

N. C.

N. C.

P3.3

P3.2

P3.1

P3.0

DIGITAL GND

N. C.

N. C.

N. C.

N. C.

P1.3

P1.2

P1.1

P1.0

EXT INT 2

EXT GATE 0

T/C OUT 1

EXT GATE 1

EXT GATE 2

EXT INT 1

DIGITAL GND

DIGITAL GND

57 58

55 56

53 54

51 52

67 68

65 66

63 64

61 62

59 60

External I/O Connections

Figure 2-1 shows I/O connector pinout for CN3. Refer to this diagram as you make your I/O connections.

3-1

CHAPTER 3

HARDWARE DESCRIPTION

This chapter describes the features of the DM6914 hardware.The major circuits are the incremental encoders and the timer/counters.

3-3

Fig. 3-1 � DM6914 Block Diagram

Incremental Encoders

The DM6914 has three incremental encoder circuits. Each circuit has one 16-bit up/down counter for incremen-tal encoding applications such as position encoding and velocity detection, and eight digital I/O lines available forcontrol functions. Six lines are input only and two lines are input/output (see I/O connector pinout diagrams inAppendix B).

Timer/Counters

An 8254 programmable interval timer provides three 16-bit, 8-MHz timer/counters to support a wide range oftiming and counting functions. Figure 3-2 shows the timer/counter circuitry.

Each 16-bit timer/counter has two inputs, CLK in and GATE in, and one output, timer/counter OUT. Each canbe programmed as binary or BCD down counters by writing the appropriate data to the command word, as describedin Chapter 4. The command word also lets you set up the mode of operation. The six programmable modes are:

Mode 0 Event Counter (Interrupt on Terminal Count)Mode 1 Hardware-Retriggerable One-ShotMode 2 Rate GeneratorMode 3 Square Wave ModeMode 4 Software-Triggered StrobeMode 5 Hardware Triggered Strobe (Retriggerable)

These modes are detailed in the 8254 Data Sheet, reprinted from Intel in Appendix C.

The DM6914 has two major circuits, the incremental encoders and the timer/counters. Figure 3-1 shows theblock diagram of the module. This chapter describes the hardware which makes up the major circuits.

+5 VOLTS

ADDRESSDECODE

INTERRUPTCONTROL

ADDRESS

DATA

CONTROL

PC

BU

S

8254PIT

8 MHzOSC

9

INCREMENTALENCODER

1

2

INCREMENTALENCODER

3

INCREMENTALENCODER

2

12

12

12

EXTERNAL INTERRUPTS

2

I/O

CO

NN

EC

TO

R

3-4

Fig. 3-2 � Timer/Counter Circuit Block Diagram

CLK1

CLK2

CLK0


CN3

PIN 62

PIN 59

PIN 58

8254

TIMER/COUNTER

0CLK

GATE

OUT

TIMER/COUNTER

1CLK

GATE

OUT

TIMER/COUNTER

2CLK

GATE

OUT

PIN 55

PIN 63

XTAL (8 MHz)

JP3

+5 V

+5 V

+5 V

PIN 56

PIN 57

PIN 60

PIN 61

T/C OUT 0

OUT0

OUT1

EXT CLK 0

T/C OUT 1

EXT CLK 1

EXT GATE 2

T/C OUT 2

EXT CLK 2

EXT GATE 0

EXT GATE 1

4-1

CHAPTER 4

I/O MAPPING

This chapter provides a complete description of the I/O map for theDM6914, general programming information, and how to set and clearbits in a port.

4-3

Defining the I/O Map

The I/O map for the DM6914 is shown in Table 4-1 below. As shown, the module occupies 20 consecutive I/Oport locations.

The base address (designated as BA) can be selected using DIP switch S1, located on the edge of the module,as described in Chapter 1, Module Settings. This switch can be accessed without removing the module from thestack. The following sections describe the register contents of each address used in the I/O map.

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4-4

D7 D6 D5 D4 D3 D2 D1 D0Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

BA + 1: Incremental Encoder 1 MSB (Read/Write)

This port accesses the top eight bits of the Incremental Encoder 1 16-bit up/down counter. A read provides thecurrent MSB value in the counter. A write loads the top eight bits of a starting value into the counter. When writingan initial value to the counter, you must first disable the Incremental Encoder input by setting BA + 3, bits 6 and 5 to00.

Note that before doing a read of this register, you should first issue a hold command (at BA + 2) to ensure thatyou do not read the chip in the middle of a count. Also, when reading the count, be sure to read the LSB first,followed by the MSB.

BA + 2: Incremental Encoder 1 Clear/Hold/Digital I/O (Read/Write)

This port controls three different functions of the Incremental Encoder 1 chip. The function performed at thisaddress depends on the setting of bits 1 and 0 at BA + 3.

If BA +3, bits 1 and 0 are 00, a read clears the Incremental Encoder 1 IRQ status flag, and a write at this addressclears the chip. Clearing the IRQ status flag simply resets the flag to 0. Clearing the entire chip resets the IRQ statusflag to 0, sets all digital I/O lines for input, and clears the contents of the 16-bit Incremental Encoder 1 counter.

If BA + 3, bits 1 and 0 are 01, a write at this address commands the Incremental Encoder 1 counter to latch itscurrent count value in a hold register. A read is ignored.

If BA + 3, bits 1 and 0 are 10, a read at this address returns the value of the six digital input lines plus P0.0 andP0.1 if they are set up as digital input lines, and a write sends a value out to P0.0 and P0.1 if they are set up as digitaloutput lines.

Digital I/O Register (BA + 3, bits 1 and 0 = 10):


D7 D6 D5 D4 D3 D2 D1 D0P1.3 P1.2 P1.1 P1.0 P0.3 P0.2 P0.1 P0.0Input Input Input Input Input Input Input/ Input/only only only only only only Output Output


This port accesses the bottom eight bits of the Incremental Encoder 1 16-bit up/down counter. A read providesthe current LSB value in the counter. A write loads the bottom eight bits of a starting value into the counter. Whenwriting an initial value to the counter, you must first disable the Incremental Encoder input by setting BA + 3, bits 6and 5 to 00.


4-5

Bits 0 and 1 � Select clear mode, hold mode, or digital I/O mode for operations performed at BA + 2.Bit 2 � Sets the direction of the P0.0 digital line.Bit 3 � Sets the direction of the P0.1 digital line.Bit 4 � Disables/enables the interrupt circuit on the Incremental Encoder 1 chip. The IRQ channel is determined

by the jumper setting on P4.Bits 5 and 6 � Disables/enables the Incremental Encoder 1 input pulse.Bit 7 � This bit is used to enable digital input P0.2 as a signal that can be used to clear the incremental

encoder counter. When this bit is high and the P0.2 input is held high, the counter is held in reset.When the P0.2 line is low, the counters count normally. If this bit is kept low, the P0.2 line has noaffect on the counter. This function is normally connected to the index pulse from the incrementalencoder.

A read returns the current settings of the bits.

D7 D6 D5 D4 D3 D2 D1 D0

BA + 2Register Select00 = clear mode01 = hold mode10 = digital I/O11 = reserved

P0.0Direction0 = input1 = output


IRQ Enable0 = disabled1 = enabled

EncoderInput00 = disabled01 = reserved10 = reserved11 = enabled

Counter Clear0 = disabled1 = enabled

BA + 3: Incremental Encoder 1 Chip Mode Register (Read/Write)

4-6


This port accesses the bottom eight bits of the Incremental Encoder 2 16-bit up/down counter. A readprovides the current LSB value in the counter. A write loads the bottom eight bits of a starting value into thecounter. When writing an initial value to the counter, you must first disable the Incremental Encoder input bysetting BA + 7, bits 6 and 5 to 00.

Note that before doing a read of this register, you should first issue a hold command (at BA + 6) to ensurethat you do not read the chip in the middle of a count. Also, when reading the count, be sure to read the LSBfirst, followed by the MSB.





This port accesses the top eight bits of the Incremental Encoder 2 16-bit up/down counter. A read provides thecurrent MSB value in the counter. A write loads the top eight bits of a starting value into the counter. When writingan initial value to the counter, you must first disable the Incremental Encoder input by setting BA + 7, bits 6 and 5 to00.



This port controls three different functions of the Incremental Encoder 2 chip. The function performed at thisaddress depends on the setting of bits 1 and 0 at BA + 7.

If BA +7, bits 1 and 0 are 00, a read clears the Incremental Encoder 2 IRQ status flag, and a write at this addressclears the chip. Clearing the IRQ status flag simply resets the flag to 0. Clearing the entire chip resets the IRQ statusflag to 0, sets all digital I/O lines for input, and clears the contents of the 16-bit Incremental Encoder 2 counter.


If BA + 7, bits 1 and 0 are 10, a read at this address returns the value of the six digital input lines plus P2.0 andP2.1 if they are set up as digital input lines, and a write sends a value out to P2.0 and P2.1 if they are set up as digitaloutput lines.


4-7


D7 D6 D5 D4 D3 D2 D1 D0







Bits 0 and 1 � Select clear mode, hold mode, or digital I/O mode for operations performed at BA + 6.Bit 2 � Sets the direction of the P2.0 digital line.Bit 3 � Sets the direction of the P2.1 digital line.Bit 4 � Disables/enables the interrupt circuit on the Incremental Encoder 2 chip. The IRQ channel is

determined by the jumper setting on P4.Bits 5 and 6 � Disables/enables the Incremental Encoder 2 input pulse.Bit 7 � This bit is used to enable digital input P2.2 as a signal that can be used to clear the incremental



4-8


This port accesses the bottom eight bits of the Incremental Encoder 3 16-bit up/down counter. A readprovides the current LSB value in the counter. A write loads the bottom eight bits of a starting value into thecounter. When writing an initial value to the counter, you must first disable the Incremental Encoder input bysetting BA + 11, bits 6 and 5 to 00.

Note that before doing a read of this register, you should first issue a hold command (at BA + 10) toensure that you do not read the chip in the middle of a count. Also, when reading the count, be sure to read theLSB first, followed by the MSB.




This port accesses the top eight bits of the Incremental Encoder 3 16-bit up/down counter. A read pro-vides the current MSB value in the counter. A write loads the top eight bits of a starting value into the counter.When writing an initial value to the counter, you must first disable the Incremental Encoder input by settingBA + 11, bits 6 and 5 to 00.

Note that before doing a read of this register, you should first issue a hold command (at BA + 10) toensure that you do not read the chip in the middle of a count. Also, when reading the count, be sure to read theLSB first, followed by the MSB.


This port controls three different functions of the Incremental Encoder 3 chip. The function performed atthis address depends on the setting of bits 1 and 0 at BA + 11.

If BA +11, bits 1 and 0 are 00, a read clears the Incremental Encoder 3 IRQ status flag, and a write at thisaddress clears the chip. Clearing the IRQ status flag simply resets the flag to 0. Clearing the entire chip resets theIRQ status flag to 0, sets all digital I/O lines for input, and clears the contents of the 16-bit Incremental Encoder 3counter.


If BA + 11, bits 1 and 0 are 10, a read at this address returns the value of the six digital input lines plusP4.0 and P4.1 if they are set up as digital input lines, and a write sends a value out to P4.0 and P4.1 if they areset up as digital output lines.



4-9


Bits 0 and 1 � Select clear mode, hold mode, or digital I/O mode for operations performed at BA + 10.Bit 2 � Sets the direction of the P4.0 digital line.Bit 3 � Sets the direction of the P4.1 digital line.Bit 4 � Disables/enables the interrupt circuit on the Incremental Encoder 3 chip. The IRQ channel is determined

by the jumper setting on P4.Bits 5 and 6 � Disables/enables the Incremental Encoder 3 input pulse.Bit 7 � This bit is used to enable digital input P4.2 as a signal that can be used to clear the incremental



D7 D6 D5 D4 D3 D2 D1 D0







4-10

BA + 12: 8254 Timer/Counter 0 (Read/Write)

This address is used to read/write timer/counter 0. A read shows the count in the counter, and a writeloads the counter with a new value. Counting begins as soon as the count is loaded.





BA + 15: 8254 Timer/Counter Control Word (Write Only)

D7 D6 D5 D4 D3 D2 D1 D0

Counter Select00 = Counter 001 = Counter 110 = Counter 211 = read back setting

BCD/Binary0 = binary1 = BCD

Counter Mode Select000 = Mode 0, event count001 = Mode 1, programmable 1-shot010 = Mode 2, rate generator011 = Mode 3, square wave rate generator100 = Mode 4, software-triggered strobe101 = Mode 5, hardware-triggered strobe

Read/Load00 = latching operation01 = read/load LSB only10 = read/load MSB only11 = read/load LSB, then MSB

D7 D6 D5 D4 D3 D2 D1 D0

JP4 IRQ Enable0 = disabled1 = enabled

IRQ Polarity0 = positive edge1 = negative edge

X X X X X

IRQ Sharing0 = enable1 = disable

This address is used to write to the control register for the 8254. The control word is defined above.

BA + 16: Clear IRQ/IRQ Enable (Read/Write)

A read clears the JP4 jumper-selectable IRQ status flag at BA + 17, bit 3.

IRQ Enable Register:

A write enables JP4 interrupts and selects whether the interrupt will occur on the positive (rising) edge ornegative (falling) edge of the pulse. Bit 2 is used to enable and disable the interrupt sharing circuit. If you are notusing shared interrupts, it is best to disable this feature to ensure compatibility with all CPUs.

4-11

D7 D6 D5 D4 D3 D2 D1 D0 X X X X

Inc/Enc Chip 1IRQ Status0 = no IRQ1 = IRQ



JP4 IRQ Status0 = no IRQ1 = IRQ

BA + 17: IRQ Status (Read Only)

A read shows the status of the three Incremental Encoder interrupts and also the jumper-selectableinterrupt circuit.

BA + 18: Reserved

BA + 19: Reserved

4-12

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In addition to being able to read/write the I/O ports on the DM6914, you must be able to perform a variety ofoperations that you might not normally use in your programming. The table below shows you some of the operatorsdiscussed in this section, with an example of how each is used with C, Pascal, and BASIC. Note that the modulusoperator is used to retrieve the least significant byte (LSB) of a two-byte word, and the integer division operator isused to retrieve the most significant byte (MSB).

Many compilers have functions that can read/write either 8 or 16 bits from/to an I/O port. For example, TurboPascal uses Port for 8-bit port operations and PortW for 16 bits, Turbo C uses inportb for an 8-bit read of a portand inport for a 16-bit read. Be sure to use only 8-bit operations with the DM6914!

Clearing and Setting Bits in a Port

When you clear or set one or more bits in a port, you must be careful that you do not change the status of theother bits. You can preserve the status of all bits you do not wish to change by proper use of the AND and ORbinary operators. Using AND and OR, single or multiple bits can be easily cleared in one operation. Note that mostregisters in the DM6914 cannot be read back; therefore, you must save the value in your program.

To clear a single bit in a port, AND the current value of the port with the value b, where b = 255 - 2bit.

Example: Clear bit 5 in a port. Read in the current value of the port, AND it with 223(223 = 255 - 25), and then write the resulting value to the port. In BASIC, this is programmed as:

V_SAVE = V_SAVE AND 223OUT PortAddress, V

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Programming the DM6914

This section gives you some general information about programming and the DM6914.

The module is programmed by reading from and writing to the correct I/O port locations. These I/O ports weredefined in the previous section. Most high-level languages such as BASIC, Pascal, C, and C++, and of courseassembly language, make it very easy to read/write these ports. The table below shows you how to read from andwrite to I/O ports using some popular programming languages.

4-13

To set a single bit in a port, OR the current value of the port with the value b, where b = 2bit.

Example: Set bit 3 in a port. Read in the current value of the port, OR it with 8 (8 = 23), and thenwrite the resulting value to the port. In Pascal, this is programmed as:

V_Save = V_Save OR 8;Port[PortAddress] := V_Save;

Setting or clearing more than one bit at a time is accomplished just as easily. To clear multiple bits in a port,AND the current value of the port with the value b, where b = 255 - (the sum of the values of the bits to be cleared).Note that the bits do not have to be consecutive.

Example: Clear bits 2, 4, and 6 in a port. Read in the current value of the port, AND it with 171(171 = 255 - 22 - 24 - 26), and then write the resulting value to the port. In C, this is programmedas:

v_save = v_save & 171;outportb(port_address, v_save);

To set multiple bits in a port, OR the current value of the port with the value b, where b = the sum of theindividual bits to be set. Note that the bits to be set do not have to be consecutive.

Example: Set bits 3, 5, and 7 in a port. Read in the current value of the port, OR it with 168(168 = 23 + 25 + 27), and then write the resulting value back to the port. In assembly language, thisis programmed as:

mov al, v_saveor al, 168mov dx, PortAddressout dx, al

Often, assigning a range of bits is a mixture of setting and clearing operations. You can set or clear each bitindividually or use a faster method of first clearing all the bits in the range then setting only those bits that must beset using the method shown above for setting multiple bits in a port. The following example shows how this two-step operation is done.

Example: Assign bits 3, 4, and 5 in a port to 101 (bits 3 and 5 set, bit 4 cleared). First, read in theport and clear bits 3, 4, and 5 by ANDing them with 199. Then set bits 3 and 5 by ORing themwith 40, and finally write the resulting value back to the port. In C, this is programmed as:

v_save = v_save & 199;v_save = v_save | 40;outportb(port_address, v_save);

A final note: Don�t be intimidated by the binary operators AND and OR and try to use operators for which youhave a better intuition. For instance, if you are tempted to use addition and subtraction to set and clear bits in placeof the methods shown above, DON�T! Addition and subtraction may seem logical, but they will not work if you tryto clear a bit that is already clear or set a bit that is already set. For example, you might think that to set bit 5 of aport, you simply need to read in the port, add 32 (25) to that value, and then write the resulting value back to the port.This works fine if bit 5 is not already set. But, what happens when bit 5 is already set? Bits 0 to 4 will be unaffectedand we can�t say for sure what happens to bits 6 and 7, but we can say for sure that bit 5 ends up cleared instead ofbeing set. A similar problem happens when you use subtraction to clear a bit in place of the method shown above.

5-1

CHAPTER 5

DIGITAL I/O

This chapter explains the digital I/O circuitry on the DM6914.

5-3

The DM6914 has eight TTL/CMOS digital I/O lines available for digital control applications on each of thethree Incremental Encoder chips. Six lines can be programmed as input only, and two lines can be programmed asinput/output. Chapter 4 shows how to program these lines.

6-1

CHAPTER 6

TIMER/COUNTERS

This chapter explains the 8254 timer/counter circuit on theDM6914.

6-3

Fig. 9-1 � 8254 Timer/Counter Circuit Block Diagram

Each timer/counter has two inputs, CLK in and GATE in, and one output, timer/counter OUT. They can beprogrammed as binary or BCD down counters by writing the appropriate data to the command word, as described inthe I/O map discussion in Chapter 4.

The timer/counter outputs are available at P6 where they can be used for interrupt generation, as an A/D trigger,or for timing and counting functions.

The timers can be programmed to operate in one of six modes, depending on your application. The followingparagraphs briefly describe each mode.

Mode 0, Event Counter (Interrupt on Terminal Count). This mode is typically used for event counting.While the timer/counter counts down, the output is low, and when the count is complete, it goes high. The outputstays high until a new Mode 0 control word is written to the timer/counter.

Mode 1, Hardware-Retriggerable One-Shot. The output is initially high and goes low on the clock pulsefollowing a trigger to begin the one-shot pulse. The output remains low until the count reaches 0, and then goes highand remains high until the clock pulse after the next trigger.

Mode 2, Rate Generator. This mode functions like a divide-by-N counter and is typically used to generate areal-time clock interrupt. The output is initially high, and when the count decrements to 1, the output goes low forone clock pulse. The output then goes high again, the timer/counter reloads the initial count, and the process isrepeated. This sequence continues indefinitely.

Mode 3, Square Wave Mode. Similar to Mode 2 except for the duty cycle output, this mode is typically usedfor baud rate generation. The output is initially high, and when the count decrements to one-half its initial count, theoutput goes low for the remainder of the count. The timer/counter reloads and the output goes high again. Thisprocess repeats indefinitely.

An 8254 programmable interval timer provides three 16-bit, 8-MHz timers for timing and counting functionssuch as frequency measurement, event counting, and interrupts. These timer/counters can be configured in a numberof ways to support your application. Figure 6-1 shows a block diagram of the timer/counter circuitry.

CLK1

CLK2

CLK0


CN3

PIN 62

PIN 59

PIN 58

8254

TIMER/COUNTER

0CLK

GATE

OUT

TIMER/COUNTER

1CLK

GATE

OUT

TIMER/COUNTER

2CLK

GATE

OUT

PIN 55

PIN 63

XTAL (8 MHz)

JP3

+5 V

+5 V

+5 V

PIN 56

PIN 57

PIN 60

PIN 61

T/C OUT 0

OUT0

OUT1

EXT CLK 0

T/C OUT 1

EXT CLK 1

EXT GATE 2

T/C OUT 2

EXT CLK 2

EXT GATE 0

EXT GATE 1

6-4

Mode 4, Software-Triggered Strobe. The output is initially high. When the initial count expires, the outputgoes low for one clock pulse and then goes high again. Counting is �triggered� by writing the initial count.

Mode 5, Hardware Triggered Strobe (Retriggerable). The output is initially high. Counting is triggered bythe rising edge of the gate input. When the initial count has expired, the output goes low for one clock pulse andthen goes high again.

Appendix C provides the 8254 data sheet.

7-1

CHAPTER 7

INTERRUPTS

This chapter explains JP4 jumper selectable interrupts and basicinterrupt programming techniques.

7-3

The DM6914 has four interrupt circuits which can generate interrupts on any IRQ channel 2 through 7, depend-ing on the setting of the jumper on P4.

JP4: Jumper Selectable Interrupts

The DM6914 circuitry has four jumper selectable interrupt sources which can be set by installing a jumper acrossthe desired pair of pins at JP4.

To use these interrupts, an interrupt source must be jumpered on JP4, an interrupt channel must be jumpered onJP1 or JP2, and the IRQ enable must be set high (BA + 16, bit 0). BA + 16, bit 1 sets the polarity of the interrupt.

Incremental Encoder Interrupts

Each Incremental Encoder chip is capable of also generating an interrupt. The interrupt source for each chip isconnected through the I/O connector CN3 on pins 33, 17 and 1.

To use these interrupts, an interrupt source must be connected to CN3, an interrupt channel must be jumperedon JP1 or JP2, and the IRQ enable for the corresponding chip must be set high (BA + 3, bit 4; BA + 7, bit 4; BA + 11,bit 4). You can read the status byte at BA + 17 to determine which circuit caused the interrupt and issue the properclear interrupt command.

Each chip also has an overflow/underflow output on CN3 pins 39, 21, 3. This output will generate a pulse eachtime the Incremental Encoder counts past 65535 or below 0. This pin can be connected back to the interrupt input togenerate an interrupt on overflow/underflow.

Selecting the Interrupt Channel

The IRQ channel is selected by installing a jumper on header connector JP1 or JP2 across the desired pair ofpins, as described in Chapter 1. A jumper is also installed across the G pins if you are using the interrupt sharingfeature. The jumper selectable interrupt source and the Incremental Encoder interrupt sources are "OR'd" togetherand can use the same interrupt channel.

To determine which interrupt source has generated an interrupt, you must check bits 0 through 3 of the statusbyte read at BA + 17. Then service the interrupt that has occurred and clear the interrupt (the jumper selectableinterrupt is cleared by reading BA + 16, and the digital interrupts are cleared by setting bits 1 and 0 in the corre-sponding Inc/Enc Control Register and performing a read at the Clear/Hold Register address).

Interrupt Sharing

This module is capable of sharing interrupts with multiple modules. This circuit is described in chapter 1. Ifyou are not planning on using shared interrupts or you are not sure that your CPU can support shared interrupts,you should disable this sharing circuit by setting bit 2 at BA + 16 to a "1". By doing this the board works innormal interrupt mode and is compatible with all CPUs.

7-4

- End-of-Interrupt (EOI) Command

After an interrupt service routine is complete, the 8259 interrupt controller must be notified. This is done bywriting the value 20H to I/O port 20H.

For all bits:0 = IRQ unmasked (enabled)1 = IRQ masked (disabled)

I/O Port 21H,54� ,54� ,54� ,54� ,54� ,54� ,54� ,54�

Basic Programming For Interrupt Handling

What Is an Interrupt?

An interrupt is an event that causes the processor in your computer to temporarily halt its current process andexecute another routine. Upon completion of the new routine, control is returned to the original routine at the pointwhere its execution was interrupted.

Interrupts are very handy for dealing with asynchronous events (events that occur at less than regular intervals).Keyboard activity is a good example; your computer cannot predict when you might press a key and it would be awaste of processor time for it to do nothing while waiting for a keystroke to occur. Thus, the interrupt scheme isused and the processor proceeds with other tasks. Then, when a keystroke does occur, the keyboard �interrupts� theprocessor, and the processor gets the keyboard data, places it in memory, and then returns to what it was doingbefore it was interrupted. Other common devices that use interrupts are modems, disk drives, and mice.

Your DM6914 can interrupt the processor when a variety of conditions are met. By using these interrupts, youcan write software that effectively deals with real world events.

Interrupt Request Lines

To allow different peripheral devices to generate interrupts on the same computer, the PC bus has eight differentinterrupt request (IRQ) lines. A transition from low to high on one of these lines generates an interrupt requestwhich is handled by the PC�s interrupt controller. The interrupt controller checks to see if interrupts are to beacknowledged from that IRQ and, if another interrupt is already in progress, it decides if the new request shouldsupersede the one in progress or if it has to wait until the one in progress is done. This prioritizing allows aninterrupt to be interrupted if the second request has a higher priority. The priority level is based on the number of theIRQ; IRQ0 has the highest priority, IRQ1 is second-highest, and so on through IRQ7, which has the lowest. Many ofthe IRQs are used by the standard system resources. IRQ0 is used by the system timer, IRQ1 is used by the key-board, IRQ3 by COM2, IRQ4 by COM1, and IRQ6 by the disk drives. Therefore, it is important for you to knowwhich IRQ lines are available in your system for use by the module.

8259 Programmable Interrupt Controller

The chip responsible for handling interrupt requests in the PC is the 8259 Programmable Interrupt Controller.To use interrupts, you need to know how to read and set the 8259�s interrupt mask register (IMR) and how to sendthe end-of-interrupt (EOI) command to the 8259.

- Interrupt Mask Register (IMR)

Each bit in the interrupt mask register (IMR) contains the mask status of an IRQ line; bit 0 is for IRQ0, bit 1 isfor IRQ1, and so on. If a bit is set (equal to 1), then the corresponding IRQ is masked and it will not generate aninterrupt. If a bit is clear (equal to 0), then the corresponding IRQ is unmasked and can generate interrupts. TheIMR is programmed through port 21H.

7-5

What Exactly Happens When an Interrupt Occurs?

Understanding the sequence of events when an interrupt is triggered is necessary to properly write softwareinterrupt handlers. When an interrupt request line is driven high by a peripheral device (such as the DM6914), theinterrupt controller checks to see if interrupts are enabled for that IRQ, and then checks to see if other interrupts areactive or requested and determines which interrupt has priority. The interrupt controller then interrupts the proces-sor. The current code segment (CS), instruction pointer (IP), and flags are pushed on the stack for storage, and a newCS and IP are loaded from a table that exists in the lowest 1024 bytes of memory. This table is referred to as theinterrupt vector table and each entry is called an interrupt vector. Once the new CS and IP are loaded from theinterrupt vector table, the processor begins executing the code located at CS:IP. When the interrupt routine iscompleted, the CS, IP, and flags that were pushed on the stack when the interrupt occurred are now popped from thestack and execution resumes from the point where it was interrupted.

Using Interrupts in Your Programs

Adding interrupts to your software is not as difficult as it may seem, and what they add in terms of performanceis often worth the effort. Note, however, that although it is not that hard to use interrupts, the smallest mistake willoften lead to a system hang that requires a reboot. This can be both frustrating and time-consuming. But, after a fewtries, you�ll get the bugs worked out and enjoy the benefits of properly executed interrupts. In addition to reading thefollowing paragraphs, study the INTRPTS source code included on your DM6914 program disk for a better under-standing of interrupt program development.

Writing an Interrupt Service Routine (ISR)

The first step in adding interrupts to your software is to write the interrupt service routine (ISR). This is theroutine that will automatically be executed each time an interrupt request occurs on the specified IRQ. An ISR isdifferent than standard routines that you write. First, on entrance, the processor registers should be pushed onto thestack BEFORE you do anything else. Second, just before exiting your ISR, you must clear the interrupt status flagof the DM6914 and write an end-of-interrupt command to the 8259 controller. Finally, when exiting the ISR, in additionto popping all the registers you pushed on entrance, you must use the IRET instruction and not a plain RET. TheIRET automatically pops the flags, CS, and IP that were pushed when the interrupt was called.

If you find yourself intimidated by interrupt programming, take heart. Most Pascal and C compilers allow you toidentify a procedure (function) as an interrupt type and will automatically add these instructions to your ISR, withone important exception: most compilers do not automatically add the end-of-interrupt command to the procedure;you must do this yourself. Other than this and the few exceptions discussed below, you can write your ISR just likeany other routine. It can call other functions and procedures in your program and it can access global data. If you arewriting your first ISR, we recommend that you stick to the basics; just something that will convince you that itworks, such as incrementing a global variable.

NOTE: If you are writing an ISR using assembly language, you are responsible for pushing and poppingregisters and using IRET instead of RET.

There are a few cautions you must consider when writing your ISR. The most important is, do not use anyDOS functions or routines that call DOS functions from within an ISR. DOS is not reentrant; that is, a DOSfunction cannot call itself. In typical programming, this will not happen because of the way DOS is written. Butwhat about when using interrupts? Then, you could have a situation such as this in your program. If DOS function Xis being executed when an interrupt occurs and the interrupt routine makes a call to DOS function X, then functionX is essentially being called while it is already active. Such a reentrancy attempt spells disaster because DOSfunctions are not written to support it. This is a complex concept and you do not need to understand it. Just makesure that you do not call any DOS functions from within your ISR. The one wrinkle is that, unfortunately, it is notobvious which library routines included with your compiler use DOS functions. A rule of thumb is that routineswhich write to the screen, or check the status of or read the keyboard, and any disk I/O routines use DOS and shouldbe avoided in your ISR.

The same problem of reentrancy exists for many floating point emulators as well, meaning you may have toavoid floating point (real) math in your ISR.

7-6

Note that the problem of reentrancy exists, no matter what programming language you are using. Even if you arewriting your ISR in assembly language, DOS and many floating point emulators are not reentrant. Of course, there areways around this problem, such as those which involve checking to see if any DOS functions are currently activewhen your ISR is called, but such solutions are well beyond the scope of this discussion.

The second major concern when writing your ISR is to make it as short as possible in terms of execution time.Spending long periods of time in your ISR may mean that other important interrupts are being ignored. Also, if youspend too long in your ISR, it may be called again before you have completed handling the first run. This often leadsto a hang that requires a reboot.

Your ISR should have this structure:

� Push any processor registers used in your ISR. Most C and Pascal interrupt routines automatically do this foryou.

� Put the body of your routine here.

� Clear the interrupt status flag.� Issue the EOI command to the 8259 interrupt controller by writing 20H to port 20H.� Pop all registers pushed on entrance. Most C and Pascal interrupt routines automatically do this for you.

The following C and Pascal examples show what the shell of your ISR should be like. Only the clear interruptcommand sequence for the source which caused the interrupt needs to be included:

In C:

void interrupt ISR(void){

/* Your code goes here. Do not use any DOS functions! */inportb(BaseAddress + 16); /* Clear jumper selectable interrupt */outportb(0x20, 0x20); /* Send EOI command to 8259 */

}

In Pascal:

Procedure ISR; Interrupt;begin

{ Your code goes here. Do not use any DOS functions! }c := Port[BaseAddress + 16]; { Clear jumper selectable interrupt }Port[$20] := $20; { Send EOI command to 8259 }

end;

Saving the Startup Interrupt Mask Register (IMR) and Interrupt Vector

The next step after writing the ISR is to save the startup state of the interrupt mask register and the interruptvector that you will be using. The IMR is located at I/O port 21H. The interrupt vector you will be using is locatedin the interrupt vector table which is simply an array of 256-bit (4-byte) pointers and is located in the first 1024bytes of memory (Segment = 0, Offset = 0). You can read this value directly, but it is a better practice to use DOSfunction 35H (get interrupt vector). Most C and Pascal compilers provide a library routine for reading the value of avector. The vectors for the hardware interrupts are vectors 8 through 15, where IRQ0 uses vector 8, IRQ1 usesvector 9, and so on. Thus, if the DM6914 will be using IRQ3, you should save the value of interrupt vector 11.

Before you install your ISR, temporarily mask out the IRQ you will be using. This prevents the IRQ from request-ing an interrupt while you are installing and initializing your ISR. To mask the IRQ, read in the current IMR at I/O port21H and set the bit that corresponds to your IRQ (remember, setting a bit disables interrupts on that IRQ whileclearing a bit enables them). The IMR is arranged so that bit 0 is for IRQ0, bit 1 is for IRQ1, and so on. See theparagraph entitled Interrupt Mask Register (IMR) earlier in this chapter for help in determining your IRQ�s bit. Aftersetting the bit, write the new value to I/O port 21H.

With the startup IMR saved and the interrupts on your IRQ temporarily disabled, you can assign the interruptvector to point to your ISR. Again, you can overwrite the appropriate entry in the vector table with a direct memory

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write, but this is a bad practice. Instead, use either DOS function 25H (set interrupt vector) or, if your compilerprovides it, the library routine for setting an interrupt vector. Remember that vector 8 is for IRQ0, vector 9 is forIRQ1, and so on.

If you need to program the source of your interrupts, do that next. For example, if you are using the program-mable interval timer to generate interrupts, you must program it to run in the proper mode and at the proper rate.

Finally, clear the bit in the IMR for the IRQ you are using. This enables interrupts on the IRQ.

Restoring the Startup IMR and Interrupt Vector

Before exiting your program, you must restore the interrupt mask register and interrupt vectors to the state theywere in when your program started. To restore the IMR, write the value that was saved when your program startedto I/O port 21H. Restore the interrupt vector that was saved at startup with either DOS function 35H (get interruptvector), or use the library routine supplied with your compiler. Performing these two steps will guarantee that theinterrupt status of your computer is the same after running your program as it was before your program startedrunning.

Common Interrupt Mistakes

� Remember that hardware interrupts are numbered 8 through 15, even though the corresponding IRQs arenumbered 0 through 7.

� Two of the most common mistakes when writing an ISR are forgetting to clear the interrupt status of theDM6914 and forgetting to issue the EOI command to the 8259 interrupt controller before exiting the ISR.

A-1

APPENDIX A

DM6914 SPECIFICATIONS

A-3

DM6914 Characteristics Typical @ 25° C

InterfaceSwitch-selectable base address, I/O mappedJumper-selectable interrupts

Incremental Encoder InterfaceNumber of channels .................................................................................................... 3Counter size ........................................................................................................16-bitsInput rate ............................................................................................................. 1 MHzInput type ................................................................................................................ TTLInput level .................................................................................................... 0 - +5 volts

Digital I/ONumber of lines .............................................................................. 6 bit programmableI/O type.................................................................................................................... TTLInput/Output levels ...................................................................................... 0 - +5 voltsIsource ............................................................................................................... -12 mAIsink ..................................................................................................................... 24 mA

Digital InputsNumber of lines ......................................................................................................... 18Input levels .................................................................................................. 0 - +5 volts

Timer/Counters .............................................................................. CMOS 82C54Three 16-bit down counters6 programmable operating modesCounter input source ................................................... External clock (8 MHz, max) or

on-board 8-MHz clockCounter outputs ........................................ Available externally; used as PC interruptsCounter gate source ..................................................External gate or always enabled

Miscellaneous Inputs/Outputs (PC bus-sourced)+5 volts, ground

Power Requirements+5V @ 238 mA = 1.18W typical

ConnectorsP2 and P3: 50-pin right angle headerP6: 12-pin box header

Environmental Operating temperature ................................................................................ 0 to +70°CStorage temperature ................................................................................. -40 to +85°CHumidity ................................................................................ 0 to 90% non-condensing

Size 3.55"L x 3.775"W x 0.6"H (90mm x 96mm x 15mm)

B-1

APPENDIX B

CONNECTOR PIN ASSIGNMENTS

B-3

CN3 Connector:

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0DQXIDFWXUHU 3DUW�1XPEHU

�0 ��

PIN 1PIN 2

PIN 68PIN 67

39 40

37 38

35 36

33 34

31 32

29 30

27 28

25 26

23 24

21 22

19 20

17 18

15 16

13 14

11 12

9 10

7 8

5 6

3 4

1 2

49 50

47 48

45 46

43 44

41 42

INC ENC-3 IRQ IN

OVERFLOW-3 OUT

INC ENC-3 CH-B

INC ENC-3 CH-A

P4.3

P4.2

P4.1

P4.0

DIGITAL GND

INC ENC-2 IRQ IN

OVERFLOW-2 OUT

INC ENC-2 CH-B

INC ENC-2 CH-A

P2.3

P2.2

P2.1

P2.0

DIGITAL GND

INC ENC-1 IRQ IN

OVERFLOW-1 OUT

INC ENC-1 CH-B

INC ENC-1 CH-A

P0.3

P0.2

P0.1

P0.0

DIGITAL GND

EXT CLK 0

T/C OUT 0

EXT CLK 1

EXT CLK 2

T/C OUT 2

+5 VOLTS

+5 VOLTS

N. C.

N. C.

N. C.

N. C.

P5.3

P5.2

P5.1

P5.0

DIGITAL GND

N. C.

N. C.

N. C.

N. C.

P3.3

P3.2

P3.1

P3.0

DIGITAL GND

N. C.

N. C.

N. C.

N. C.

P1.3

P1.2

P1.1

P1.0

EXT INT 2

EXT GATE 0

T/C OUT 1

EXT GATE 1

EXT GATE 2

EXT INT 1

DIGITAL GND

DIGITAL GND

57 58

55 56

53 54

51 52

67 68

65 66

63 64

61 62

59 60

APPENDIX C

COMPONENT DATA SHEETS

C-1

Intel 82C54 Programmable Interval TimerData Sheet Reprint

D-1

APPENDIX D

WARRANTY AND RETURN POLICY

Return PolicyIf you wish to return a product to the factory for service, please follow this procedure:

Read the Limited Warranty to familiarize yourself with our warranty policy.

Contact the factory for a Return Merchandise Authorization (RMA) number.

Please have the following available:

� Complete board name� Board serial number� A detailed description of the board�s behavior

List the name of a contact person, familiar with technical details of the problem or situation,

along with their phone and fax numbers, address, and e-mail address (if

available).

List your shipping address!!

Indicate the shipping method you would like used to return the product to you.

We will not ship by next-day service without your pre-approval.

Carefully package the product, using proper anti-static packaging.

Write the RMA number in large (1") letters on the outside of the package.

Return the package to:

RTD Embedded Technologies, Inc.

103 Innovation Blvd.

State College PA 16803-0906 USA

D-3

LIMITED WARRANTY

RTD Embedded Technologies, Inc. warrants the hardware and software products it manufac-tures and produces to be free from defects in materials and workmanship for one year followingthe date of shipment from RTD Embedded Technologies, INC. This warranty is limited to theoriginal purchaser of product and is not transferable.

During the one year warranty period, RTD Embedded Technologies will repair or replace, at itsoption, any defective products or parts at no additional charge, provided that the product isreturned, shipping prepaid, to RTD Embedded Technologies. All replaced parts and productsbecome the property of RTD Embedded Technologies. Before returning any product for repair,customers are required to contact the factory for an RMA number.

THIS LIMITED WARRANTY DOES NOT EXTEND TO ANY PRODUCTS WHICH HAVEBEEN DAMAGED AS A RESULT OF ACCIDENT, MISUSE, ABUSE (such as: use of incorrectinput voltages, improper or insufficient ventilation, failure to follow the operating instructionsthat are provided by RTD Embedded Technologies, �acts of God� or other contingencies beyondthe control of RTD Embedded Technologies), OR AS A RESULT OF SERVICE OR MODIFICA-TION BY ANYONE OTHER THAN RTD Embedded Technologies. EXCEPT AS EXPRESSLYSET FORTH ABOVE, NO OTHER WARRANTIES ARE EXPRESSED OR IMPLIED, INCLUD-ING, BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF MERCHANTABILITY ANDFITNESS FOR A PARTICULAR PURPOSE, AND RTD Embedded Technologies EXPRESSLYDISCLAIMS ALL WARRANTIES NOT STATED HEREIN. ALL IMPLIED WARRANTIES,INCLUDING IMPLIED WARRANTIES FOR MECHANTABILITY AND FITNESS FOR APARTICULAR PURPOSE, ARE LIMITED TO THE DURATION OF THIS WARRANTY. INTHE EVENT THE PRODUCT IS NOT FREE FROM DEFECTS AS WARRANTED ABOVE,THE PURCHASER�S SOLE REMEDY SHALL BE REPAIR OR REPLACEMENT AS PROVID-ED ABOVE. UNDER NO CIRCUMSTANCES WILL RTD Embedded Technologies BE LIABLETO THE PURCHASER OR ANY USER FOR ANY DAMAGES, INCLUDING ANY INCIDENTALOR CONSEQUENTIAL DAMAGES, EXPENSES, LOST PROFITS, LOST SAVINGS, OROTHER DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE PRODUCT.

SOME STATES DO NOT ALLOW THE EXCLUSION OR LIMITATION OF INCIDENTAL ORCONSEQUENTIAL DAMAGES FOR CONSUMER PRODUCTS, AND SOME STATES DONOT ALLOW LIMITATIONS ON HOW LONG AN IMPLIED WARRANTY LASTS, SO THEABOVE LIMITATIONS OR EXCLUSIONS MAY NOT APPLY TO YOU.

THIS WARRANTY GIVES YOU SPECIFIC LEGAL RIGHTS, AND YOU MAY ALSO HAVEOTHER RIGHTS WHICH VARY FROM STATE TO STATE.

D-4

RTD Embedded Technologies, Inc.

103 Innovation Blvd.

State College PA 16803-0906

USA

Our website: www.rtd.com

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dm6914 user™s manual - rtd.com · dm6914 user™s manual rtd embedded technologies, inc. 103...

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