diodes of electric circuits

Diode Characteristics 30

CHAPTER (3)

P-N JUNCTION DIODE CHARACTERISTICS

(3-1) I-V Relationship

The first subject to be studied in electronic devices courses is the p-n

junction diode characteristics. The p-n junction is the basic structure of

all bipolar devices. The proof of the p-n junction current is beyond the

scope of this chapter. We focus here on the device applications rather

than the p-n junction detailed physics. The I-V relationship of a p-n

junction is given by

I = IO(T) { exp (V/VT) - 1 } (3-1)

where

IO is the reverse saturation current and it is a function of

temperature,

V is the voltage applied across p-n junction,

VT is the thermal voltage (25 mV) at room temperature

( T =300OK), and

is a constant depends on the p-n junction material. =1

for Ge and = 2 for silicon.

(a) (b)

Fig. (3-1) I-V characteristics of p-n junction (a) at different

temperatures and for different materials.

Electronic Engineering 31

Fig. (3-1a) shows a plot for the I-V characteristics given by Eq. (3-1). It

is seen that for positive values of V, (forward biased), the current

increases exponentially with the applied forward voltage. On the other

hand, for a reverse applied voltage, the diode current is almost constant

at I = - IO because the exponential term will be negative and large so it is

negligible with respect to unity. This is shown in Fig. 1(a).

(3-2) Temperature Effect

The I-V characteristics is temperature dependent because both thermal

temperature VT and reverse saturation current IO depend on T. VT is given

by

VT = k T / q (3-2)

where

k is Boltzmann constant, (= 1.381 * 10-23 J/ o K)

T is the junction absolute temperature in OK, and

q is the electronic charge (= 1.6 * 10-19 Column)

The reverse saturation current IO is related to temperature through the

relationship

IO(T) = AO T3/2 exp {-VG / ( VT)} (3-3)

where AO is a constant. Differentiating Eq. (3) with respect to

temperature and taking into account that VT is given by Eq. (2) one

obtains

dIO / dT = AO T3/2 (1/T VT) exp {-VG / ( VT)}

+ (3/2) AO T1/2 exp { -VG / ( VT)}

= AO T3/2 exp { -VG / ( VT)} {[VG / ( T VT)] + (3 /2 T )}

= IO {[VG / ( T VT)] + (3 / 2T )}

or (dIO/IO)/ dT = [VG / ( T VT)] + (3 / 2T ) (3-4)

Substituting for T = 300OK, VT = 26 mV, VG = 1.21 V and = 2 into Eq.

(3-4) one finds


(dIO/IO)/ dT = 0.08 = 8 % (3-5)

Eq. (3-5) means that the percentage change of IO (reverse saturation

current) is 8 % per degree Kelvin. For example if IO is 1 A at 300OK, it

will be 1.08 A at 301OK and (1.08*1.08) A at 302 OK and so on. But

since (1.08)9 = 2 then one can approximately write

IO(T2) = IO(T1) * 2T/9 (3-6)

where T = T2 - T1 (3-7)

where IO(T1) and IO(T2) are the reverse saturation currents at

temperatures T1 and T2 respectively. The approximation in Eq. (3-6) is

that it assumes constant reverse saturation current temperature rate for

the range between T1 and T2 equal to that at T = 300OK.

If the temperature increased, then VT increases - Eq.(2)- and

consequently the exponential term in Eq. (3-1), decreases. On the other

hand, as T increases IO increases rapidly as given by Eq. (3-3) or its

approximate relation given by Eq. (3-7).

The effect of the increase of IO due to temperature is larger than the effect

of the decrease of the exponential term due to the increase of T. Thus, the

diode current increases as temperature increases. This behavior is

illustrated in Fig. (3-1a). The sensitivity of diode current to temperature

is sometimes used as a temperature sensor. Thus the diode current (which

is passed through a resistor) is used to measure the temperature by

measuring the voltage across the resistor. The diode (when used as a

temperature sensor) should be placed in the spot where the temperature is

to be measured.

Let us now turn our attention to the effect of temperature on the voltage

applied across p-n junction V. Substituting for VT and IO from Eqs. (3-2)


and (3-3) into Eq. (3-1) and differentiating Eq. (3-1) with respect to

temperature when the current I is kept constant yields

dV

dT

V

T

d

dT

V

TTO

O G T

VI

I V V

( )

( ( / ) )1 3 2 (3-8)

Substituting for T = 300oK, VG = 1.21 V, VT = 26 mV, = 2 (Si) and V =

V= 0.6V into Eq. (3-8) one finds

dV/dT = - 2.3 mV/ 0C (3-9)

The diode material (either Ge or Si) affects the diode I-V characteristics

because the constant in Eq. (3-1) varies according to diode material. As

increases, the exponential term decreases and consequently, diode

current decreases. Since is 1 for Ge and 2 for Si then, the current is

larger for Ge diode if the applied voltage is kept constant. This is

illustrated in Fig. (3-1b).

(3-3) Piecewise Linear Model

For the diode characteristics shown in Fig. (3-2a), one can define static

resistance R which is defined at point P as

R = (V / I)at point P = V1 / I1 (3-10)

While the dynamic resistance r is determined by the relationship

r = (dV/dI)at point P (3-11)

For forward voltages, the exponential term in Eq. (3-1), is much larger

unity so one may approximate Eq. (3-1) as follows,

I = IO { exp (V/ VT)} (3-12)

Differentiating Eq. (12) with respect to V, then

dI/dV = I / VT

or

r = VT / I (3-13)

The piecewise linear model of the I-V characteristics of p-n junction is a

simplified I-V relationship. The break point is not the origin, but it is the


cut-in voltage V as shown in Fig. (3-2b). For piecewise model, the diode

is considered open circuited, for negative voltages and forward voltage

less than the cut-in voltage V. For voltages larger than V ,the diode is

considered a constant resistance Rf. The resistance Rf is relatively a small

resistance about 100 Ohms.

(a) (b)

Fig. 2 (a) Static and dynamic resistance and

(b) piecewise linear model.

The diode is said to be ideal if it is short circuited when it is forward

biased and open circuited when reverse biased. This means that an ideal

diode has V = 0 and Rf = 0. Of course such an ideal diode doesnt exist

in real world, but, sometimes such assumption is made if the applied

voltage is much larger than V and so it may be neglected. Also when

circuit resistors are much larger than Rf , one can neglect Rf.

(3-4) Transition Capacitance

When a reverse bias voltage is applied across the p-n junction, a space

charge (or depletion region) is formed around the junction. The depletion

region is a layer where there is no mobile charges. This is caused by the

reverse bias applied across the junction. This causes the majority carriers

to be away from the junction. The depletion region includes only positive

ions in the n-type region and negative ions in the p-type region as shown

in Fig. 3(a). As the reverse bias voltage increases in magnitude, the


depletion region expands on both sides of the junction. To explain this

phenomenon, assume a larger positive voltage is applied on n-type, this

(a) (b)

Fig. (3-3) (a) Depletion region when a reverse voltage V is applied

across p-n junction and (b) charge and voltage across

depletion region.

will attract more electrons towards the edge of the n-type region causing

the depletion region to expand on the n-type side. The same is applied

when a negative voltage is applied on p-type. Thus the charge Q on both

sides of the junction increases with the reverse applied voltage V. Since

Q is proportional to V, then there is a capacitance called the transition

capacitance CT defined as

CT = dQ/dV (3-14)

Thus the reverse biased p-n junction equivalent circuit is simply a

capacitance CT . This transition capacitance CT is voltage dependent. To

find this relation, one can apply Poissons equation for the depletion

region. Consider the charge density as a function of distance from an

alloy junction in which the acceptor impurity density is assumed to be

much smaller than donor concentration. Since the net charge in the

depletion region shown in Fig. (3-3b) must be zero, then

q NA WP = q ND Wn (3-15)


If NA > Wn . For simplicity, Wn is neglected and as a

result depletion region width W (= WP + Wn) will be approximately WP.

So the potential will appear across p-type region across the uncovered

acceptor ions. The relationship between potential and charge density is

given by Poissons equation,

2

2

dx

NVd

qA

O r

(3-16)

where r is the relative permittivity of the semiconductor (= 12 for Si)

and O is free space permittivity (= 8.85*10-12 F/m). The electric field is

zero outside the depletion region so, one can write

dV

dx 0 at x = 0 and at x = W WP

Also

V = 0 at x = 0

and V = VJ at x = WP

where VJ is the voltage across the p-n junction which is the difference

between the applied reverse voltage V and the built in voltage VO.

Usually V >> VO so V-VO V. Integrating Eq. (3-16) yields

dV

dx

qA

O r

N

x + k1

where k1 is a constant. But since dV/dx = 0 at x = 0, then k1 = 0. Thus

Vx = q

A

O r

N

(x2 / 2) + k2

where k2 is a constant. But since V = 0 at x = 0, then k2 = 0. As discussed

above Vx = V at x = W WP so

V = (1/2) q

A

O r

N

W2 (3-17)

The charge on the p-type region (uncovered ions) Q is given by


Q = q NA W A (3-18)

where A is the cross sectional area of the p-n junction. The transition

capacitance CT is defined as

CT = dQ / dV = q NA A (dW / dV) (3-19)

Using Eq. (3-17) one finds

dV / dW = q

A

O r

N

W (3-20)

Combining Eqs. (3-19) and (3-20) yields

CT = O r

W

A (3-21)

Substituting for W from Eq. (3-17) into Eq. (3-21) gives

CT = A q

V

A O rN 2

(3-22)

Eq. (3-22) may be rewritten as

CT = OkV

(3-23)

where kO is a constant depends on the diode manufacturing parameters

NA and area A. Thus for a given diode, kO is constant. Eq. (3-23) shows

that the diode transition capacitance CT is inversely proportional to the

square root of the reverse applied voltage. Note that CT exists only if the

applied voltage is reverse biased.

According to above mentioned analysis, a diode may be used as a

capacitor CT if a reverse biased voltage is applied across the diode. The

diode acts as a VARiable reACTOR (VARACTOR) when a reverse

biased voltage is applied across the diode. Fig. (3-4a) shows the circuit

symbol of a varactor while Fig. (3-4b) shows the dependence of CT on

the reverse applied voltage.


(a) (b)

Fig. (3-4) Varactor (a) circuit symbol and (b) C-V characteristics.

(3-5) Zener Diode

The reverse voltage characteristics of a p-n junction diode, including the

breakdown region, is plotted in Fig. (3-5a). Zener diodes are designed

with capability of enough power consumption in the breakdown region.

This device is used as voltage reference. A typical application circuit of

Zener diode is indicated in Fig. (3-5b). The source voltage V and resistor

R are selected so that, initially, the Zener diode is almost open circuited

when the voltage V is less than the Zener voltage VZ. When V exceeds

VZ the voltage across RL will remain constant at VZ while the difference

between V and VZ will be across the series resistor R. The VO - V

relationship is indicated in Fig. (3-5c). An important note is that the

Zener diode requires a minimum current IZ is required so that Zener

diode is operating at a constant voltage VZ. The output voltage remains

constant at VZ if the

(a) (b) (c)

Fig. (3-5) Zener diode (a) characteristics, (b) application circuit and

(c) input - output voltage relation of the application circuit.


input voltage V exceeds VZ. Thus Zener diode protects the load against

over voltage.

(3-6) Rectifier Circuits

Fig. (3-6) shows the basic half and full wave rectifier circuits. For the

half wave circuit, only the positive half cycle passes because of the diode

which passes only the forward current. For the bridge full

Fig. (3-6) Half wave and full wave rectifier circuits.

wave rectifier circuit, the positive half cycle passes through two opposite

diodes while the negative half cycle passes through the other opposite

two diodes. As a result the output is a rectified full wave as indicated in

Fig. (3-6).

(3-7) Clipping and Clamping Circuits

Fig. (3-7a) shows typical positive voltage clipping circuit while, Fig. (3-

7b) illustrates the output voltage of this circuit. Let us now explain the how

this circuit works?. It is assumed that the diode is ideal i.e. it is short

circuited when it is forward biased and open circuited when reverse biased.

(a) (b)

Fig. (3-7) Positive voltage clipping circuit (a) circuit and (b)

waveform.


The source voltage VS is a sinusoidal one given by

VS = Vm sin ( t) (3-24)

Since the potential at the cathode of the diode D is V -as shown in Fig.

(3-7a)- then the diode will conduct if and only if the anode voltage is

greater than V. If this condition is fulfilled, VO = V. VO cant exceed V

because the voltage across the diode is assumed zero. The difference

between VS and V will appear as a voltage across the resistor R. The

output voltage is said to be clipped at V. On the other hand, if VS is

smaller than V, diode D is reverse biased -i.e. open circuited- and

consequently no current flows in the circuit. Under this condition, the

voltage across R is zero and VO = VS as shown in Fig. (3-7b). The

maximum current Imax passes through R is

Imax. = (Vm - V) / R (3-25)

If a circuit such as that shown in Fig. 8(a) is used, a clipped output

voltage in both positive and negative sides of the sine wave is

(a) (b)

Fig. (3-8) Positive and negative voltage clipping circuit (a) circuit

diagram and (b) output voltage waveform.

obtained. The output voltage will be as shown in Fig. (3-8b). The

maximum resistor currents in both positive and negative half cycles are

[(Vm - V1) / R] and [(Vm - V2) / R] respectively.

Fig. (3-9a) shows a positive clamping circuit where the output voltage is

exactly like the input voltage but shifted by +Vm. The source voltage is a

sinusoidal one where VS is given by Eq. (3-24). Let us see


(a) (b) (c)

Fig. (3-9) Positive clamping circuit (a) circuit diagram

(b) output waveform and (c) capacitor voltage.

this circuit works?. During the first positive half cycle, the diode is

reverse biased and so no current flows in the circuit and capacitor is not

charged. During the first negative half cycle, the diode is forward biased

and the capacitor C is charged to the voltage Vm in the direction shown in

Fig. (3-9a). The capacitor charging is done through the diode forward

resistance Rf which is neglected. Thus the capacitor voltage will follow

the source voltage during charging as indicated in Fig. (3-9c). The output

voltage VO - taking into account the voltage polarities shown in Fig. (3-

9a)- may be written as

VO = VS + Vm = Vm {sin( t) + 1} (3-26)

The plot of the waveform given by Eq. (3-26), is illustrated in Fig. (3-

9b). Since sin ( t) lies between +1 and -1 then, according to Eq.(3-26)

the maximum value of VO is 2Vm , while, the minimum value of VO is

zero. The output voltage is said to be clamped at 2Vm. A negative

clamped circuit is indicated in Fig. (3-10a). In this circuit, the output

voltage is clamped at -2Vm rather than +2Vm. The output voltage

waveform is indicated in Fig. (3-10b). For the circuit in Fig. (3-10a), VO

may be written as

VO = VS - Vm = Vm {sin( t) - 1} (3-27)


It can be easily seen that VO -according to Eq. (3-27)- lies between zero

and -2Vm. The output voltage is said to be clamped at zero voltage.

Logic Gates

The diodes are used to implement the basic logic gates known as OR and

AND gates shown in Fig. (3-10a) and (3-10b) respectively. The logic

gates are characterized by two levels 5 V denoted by logic "1" and

zero voltage denoted by zero "0" and not any other level. The Tables

below are called the truth tables of OR and AND gates.

(a) (b)

Fig. (3-10) Logic gates using diodes.

A B Y

0 0 0

1 0 1

0 1 1

1 1 1

Table-1 Truth table of OR gate.

A B Y

0 0 0

1 0 0

0 1 0

1 1 1

Table-1 Truth table of AND gate.


EXERCISE (3)

Hint for all problems assume that = 8.85 * 10-12 F/m , r (Silicon) =

11.9, diode reverse saturation current (IO)= 1 A, = 2 and all diodes are

operating at room temperature (T = 3000 K) where VT = 25 mV.

1. Calculate the diode current when

a- V = 100 mV,

b- V = 250 mV and

c- V = - 150 mV.

2. (a) Calculate the reverse saturation current IO at 70O C.

(b) Calculate the temperature at which IO = 3 A.

3. If the area of a p-n junction is 10 m by 10 m and NA = 1017 cm-3 , find

(a) Transition capacitance CT if the reverse voltage is 2 V.

(b) The reverse voltage at which CT is half that of part (a).

4. Find (a) The static and dynamic resistance of a diode at V = 0.7V.

(b) Repeat part (a) if V = - 0.7V.

5. Find (a) diode current I at V = 0.7 V,

(b) diode reverse saturation current IO at T = 3500K and

(c) the temperature at which IO = 2 A.

6. For the circuit shown, R = 1 k and the current is 10 mA. Find

(a) Battery voltage V.

(b) Voltage across diode.


7. For the circuit shown, V = 3 V and CT = 25 pF when S1 is opened and S2

closed. If VS = 2 sin (t) and S1 is closed while S2 is opened

find (a) Maximum value of CT and

(Two) Minimum value of CT .

8. For the circuit shown VS = Vm sin (t). Draw VO if

(a) Vm = 10 V and V = 6V.

(b) Vm = 6 V and V = - 3 V.

(c) Find the maximum resistor current when Vm = 6 V and V = -3 V.

9. For the circuits shown draw VO if VS = 12 sin (t), R1 = 1 k, R2 = 2 k if

(a) V = 3 V and

(b) V = 6 V.

10. For the circuit shown if VS = 10 sin( t) find

(a) Maximum output voltage and

(b) Minimum output voltage.


11. Repeat problem (10) if the diode D is reversed.

12. For the circuit shown, the diodes are represented by their piecewise

linear model where V = 0.6 V, V = 10V and Rf = 20 Ohms. Find the

current in each diode if R = 1 k.

13. For the circuit shown if V = 5 V determine

(a) The current passing in the circuit I,

(b) The voltage across D1 and

(c) The voltage across D2.

14. For the circuit shown, VZ = 20 V, and R = RL = 1 k.

(a) Draw VO versus V if V varies between 0 and 20 V and

(b) Find the maximum current through R.

15. For the circuit shown in problem (14), find VO if

(a) V = 6 V,

(b) V = 10 V and

(c) V = 18 V.

diodes of electric circuits

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