digital signal processing -...

VLSI Digital Signal Processing Systems

Introduction to Digital Signal Processing Systems

Lan-Da Van (), Ph. D.Department of Computer ScienceNational Chiao Tung University

Taiwan, R.O.C.Spring, 2007

[email protected]

http://www.cs.nctu.edu.tw/~ldvan/


Lan-Da Van VLSI-DSP-1-2

Outlines

IntroductionDSP AlgorithmsDSP Applications and CMOS ICsRepresentations of DSP AlgorithmsConclusionReferences



Why Use Digital Signal Processing?

Robust to temperature and process variations Controlled better to accuracyNoise/interference tolerancesMathematical representationProgramming capability



Common System Configuration

Multimedia-Communication Applications

VLSI Signal Processing Library Processor Software



VLSI Signal Processing System Design Spectrum

Computer arithmeticAdderMultiplier

Digital filterAdaptive digital filter

LMS/DLMS (Delay LMS) basedRLS based

TransformMultiplier-accumulator basedRecursive-filter basedROM-based: DA, CORDICButterfly based

ProcessorGeneral purposed processorDSP processorReconfigurable computing processor

Non-numerical operationError control coding

Viterbi DecoderTurbo Code

Polynomial computationDynamic programmableEtc..



VLSI Signal Processing System Publication Area (But not limited)

IEEE Journal of Solid-State CircuitsIEEE Journal on Selected Areas in CommunicationsIEEE MicroIEEE Trans. on Biomedical EngineeringIEEE Trans. on Circuits and Systems I: Regular PapersIEEE Trans. on Circuits and Systems II: Express BriefsIEEE Trans. on Circuits and Systems for Video TechnologyIEEE Trans. on CommunicationsIEEE Trans. on Computer-Aided Design of Integrated CircuitsIEEE Trans. on ComputersIEEE Trans. on Image ProcessingIEEE Trans. on Information TheoryIEEE Trans. on MultimediaIEEE Trans. on NanotechnologyIEEE Trans. on Neural NetworksIEEE Trans. on Signal ProcessingIEEE Trans. on VLSI SystemsProceedings of the IEEEThe Journal of VLSI Signal Processing SystemsElsevier Integration - The VLSI Journal



VLSI Signal Processing System Design Space



Outlines

Features:DSP AlgorithmsDSP Applications and CMOS ICsRepresentations of DSP Algorithms



DSP Algorithms

ConvolutionCorrelationDigital filtersAdaptive filtersDiscrete Fourier transformSource Coding Algorithms

Discrete cosine transform Motion estimationHuffman codingVector quantization

Decimator and expanderWavelet and filter banksViterbi algorithm and dynamic programming

Algorithm: A set of rules for solving a problem in a finite number of steps.



Signals

Analog signalt->y: y=f(t), y:C, n:C

Discrete-time signaln->y: y=f(nT), y:C, n:Z

Digital signaln->y: y=D{f(nT)}, y:Z,n:Z

2)1110(

2)1000(2)1011( 2)1000(

y y y)3()1(

)2()1(

t n nAnalog Signal Digital SignalDiscrete-Time Signal



LTI Systems

Linear systemsAssume x1(n)->y1(n) and x2(n)->y2(n), where -> denotes lead to. If ax1(n)+bx2(n)->ay1(n)+by2(n), then the systems is referred to as Linear System.Homogenous and additive properties

Time-invariant (TI) systemsx(n-n0)->y(n-n0)

LTI systemsy(n)=h(n)*x(n)

Causal systemsy(n0) depends only on x(n), where n



Sampling of Analog Signals

Nyquist sampling theoremThe analog signal must be band-limitedSample rate must be larger than twice the bandwidth



System-Equation Representation

Impulse/unit sample response

Transfer function / frequency response

Difference equations

State equations

11

0

1)()()( ==

zab

zXzYzH

)()1()( 01 nxbnyany +=

][)( 10 nuabnhn=



Convolution & Correlation

Convolution

=

==k

knhkxnhnxny )()()()()(

)()()()( nxnaknxkak

==

=

=

+=k

knxkany )()()(

Correlation

)()( knxkhk

=

=



Linear Phase FIR Digital Filters

Digital filters are an important class of LTI systems.Linear phase FIR filter

)()( nMhnh =

0)6()0( bhh ==1)5()1( bhh ==

2)4()2( bhh ==

3)3( bh =

)4()5()6()3()2()1()()(

210

3210

++++++=

nxbnxbnxbnxbnxbnxbnxbny



IIR Filter Structures

22

11

22

110

1)(

++

=zazazbzbbzH

1z

2a

1a

1z

0b

1b

2b

)(nx )(ny



Introduction to an Adaptive Algorithm

Widely used in communication, DSP, and control systemDeterministic gradient / least square algorithm

Steepest descent algorithmRLS algorithm

Stochastic gradient algorithmLMS algorithm, DLMS algorithmBlock LMS algorithmGradient Lattice algorithm



Adaptive Applications

Channel equalizerSystem identificationImage enhancementEcho cancellerNoise cancellationPredictorLine enhancementBeamformer



Notation

)Error: e(n Factor: Adaptationtor: W(n)Weight Vectput: d(n)Desired Ou

al: X(n)Input Sign

.5

.4

.3

.2.1

: .10.9.8.7

.6

MatrixDiagonal:Eigenvalue

ix: Ration MatrAutocorrel: NTap Number

ent: MMisadjustm adj



Steepest Descent Algorithm

)()()( nXnWny T=TNnxnxnxnXwhere )]1( ... )1( )([)( +=

TN nwnwnwnW )]( ... )( )([)( 110 =

)()()( )()()(

)()()(

nWnXndnXnWnd

nyndne

T

T

=

=

=The error at the n-th time is



LMS Algorithm

))((21)()1( nJnWnW +=+

)()(2)( nXnenJ =

An efficient implementation in software of steepest descent using measured or estimated gradientsThe gradient of the square of a single error sample

e(n)X(n)W(n))W(n +=+=> 1 Cost

w0, w1, w0



Summary of LMS Adaptive Algorithm (1960)

)()()( nnny T xw=

)()()( nyndne =

)()( )()1( nnenn xww +=+



Block Diagram of an Adaptive FIR Filter Driven by the LMS Algorithm

1z)(nx 1z 1z

)(0 nw )(2 nw)(1 nw )(1 nwN

)1( nx )2( nx )1( + Nnx

)(nd)(ny

)(ne



Unitary/Orthogonal Transform (1/4)

Definition: (from Linear Algebra)

Let A be nn matrix that satisfies IAAAA == .

We call A as an unitary matrix if Ahas complex entries, and we call A an orthogonal matrix if A has real number.



Why Orthogonal Transformation? (2/4)

Energy conservationEnergy compaction

Most unitary transforms tend to pack a large fraction of the average energy of signals into a relatively few components of the transform coefficients.

DecorrelationWhen signals are highly correlated, the transform coefficients tend to be uncorrected (or less correlated).

Information preservationThe information carried by signals are preserved under a unitary transform.




0 1 0 0 2 0 0 3 0 0 4 0 0 5 0 0 6 0 05 0

1 0 0

1 5 0

2 0 0

2 5 0T h e o r i g i n a l s i g n a l

0 1 0 0 2 0 0 3 0 0 4 0 0 5 0 0 6 0 0- 2 0 0 0

0

2 0 0 0

4 0 0 0T h e D C T c o e f f i c i e n ts

Source: Lecture of Prof. Dennis Deng




0 5 1 0 1 5 2 0 2 5

0 .9 8

1

T h e a u to c o r r e la t i o n o f o r i g i n a l s i g n a l

0 5 1 0 1 5 2 0 2 5- 0 .5

0

0 .5

1T h e a u to c o r r e la t i o n o f D C T c o e f f i c i e n ts

Source: Lecture of Prof. Dennis Deng



Discrete Fourier Transform (1/9)

DFT

IDFT

1,...,1,0,)()(1

0

==

=

NnWnxkXN

n

nkN

1,...,1,0,)(1)(1

0

==

=

NnWkXN

nxN

k

nkN

nkN

jnkN

Nj

N eWeW 22

,

==



Fast Fourier Transform (2/9)

The radix-2 algorithm is the most widely used fast algorithm to compute the DFT.Let us use an 8-point DFT (N=8) to illustrate the development of the fast algorithm

))7()5()3()1((

)6()4()2()0(

)7()5()3()1(

)6()4()2()0(

)()(

642

642

753

642

7

0

kN

kN

kN

kN

kN

kN

kN

kN

kN

kN

kN

kN

kN

kN

knN

n

WxWxWxxW

WxWxWxx

WxWxWxWx

WxWxWxx

WnxkX

++++

+++=

++++

+++=

==




Since

8-point DFT => Nearly two 4-point DFT

where represent the DFT of two sequences

kN

kN

jkN

jkN WeeW 2/

)2/(2

222 ===

1,...2,1,0 where),()(

))7()5()3()1((

)6()4()2()0()(

21

32/

22/2/

32/

22/2/

=+=

++++

+++=

NkkFWkF

WxWxWxxW

WxWxWxxkX

kN

kN

kN

kN

kN

kN

kN

kN

)()( 21 kFandkF

)12()()2()( 21 +== nxnfandnxnf




One step further: (=>Two 4-point DFT)

An N-point DFT requires N2 complex multiplications. The number of complex multiplications required by the above algorithm

An 8-point DFT requires 64 complex multiplications

12/,...,1,0 ),()()( 21 =+= NkkFWkFkXk

N

12/,...,1,0 ),()()2/( 21 ==+ NkkFWkFNkXkN

kN

jkNjNk

NjNk

N WeeeW ===++

2)2/(22/

)8( 40)2/(2 2 ==+ NNN

kN

NkN WW 2/

2/2/ =+and




The 4-point DFT can be decomposed into two 2-point DFT in a similar way

where represent the DFT of two sequencesAs before,

)()(

))6()2(()4()0(

)6()2()4()0()(

122/11

4/2/4/

32/2/

22/1

kVWkV

WxxWWxx

WxWxWxxkF

kN

kN

kN

kN

kN

kN

kN

+=

+++=

+++=

)()( 1211 kVandkV

)12()()2()( 112111 +== nfnvandnfnv

14/,...,1,0),()()( 122/111 =+= NkkVWkVkFk

N

14/,...,1,0),()()2/( 122/111 ==+ NkkVWkVNkFkN




A 2-point FFT, such as involves only real addition

)()( 1211 kVandkV

1,1),4()0()( 120

211 2 ==+= WWxWxkVk

V x W x

V x W xN

N

110

110

0 0 4

1 0 4

( ) ( ) ( )

( ) ( ) ( )

= +

=

a

b

A

B-1

WN

Each butterfly requires one complex multiplication and two complex addition




After decimation, the sequence is in a bit-reversed orderoriginal order decimation1 decimation 2

n2n1n0 n0n2n1 n0n1n20 000 0 000 0 0001 001 2 010 4 1002 010 4 100 2 0103 011 6 110 6 1104 100 1 001 1 0015 101 3 011 5 1016 110 5 101 3 0117 111 7 111 7 111




This FFT algorithm is generally true for any data sequence of There are N/2 butterflies per stage and stages The number of operations required for an FFT: (Before simplifying)

Complex multiplication:

Complex addition:

vN 2=

NN 2log

NN 2log

N2log



Image/Video Compression

Where coding?Source codingChannel coding

Source coding benefitsLower bit rateLess transmission timeFewer storage data

What kind of loss?Lossless data compressionLossy data compression

Why can we do compression?Coding redundancyInter-sample redundancy (Spatial redundancy)Inter-frame redundancy (Temporal redundancy)



Source Coding Spectrum

Image Compression

Lossless Loss

Huffman Coding

Shannon Coding

ArithmeticCoding

Predictive Coding

Transform Coding

VQ Coding

Subband Coding



Image Measurement and Evaluation

)/(log10SNR(dB) 2210 nx =

)/255(log10PSNR(dB) 2210 n=

2

1 12 ]),(),([

1 = =

=

N

i

N

jn jixjixN

valules.image tedreconstruc and image orignal theare and where (i,j)xx(i,j)



Discrete Cosine Transform (DCTII)

10 , ]2

)12(cos[)()()(1

0

N-kN

knnxkkXN

n

+

=

=

1 1for ,2 )( = NkN

kN1)0( =



2-D DCT-II and IDCT-II

)2

)12(cos()2

)12(cos(),()()(2),(1

0

1

0 Nln

Nkmnmxlk

NlkZ

N

m

N

n

++=

=

=

DCT-II

TAXAZ =

IDCT-II

)2

)12(cos()2

)12(cos(),()()(2),(1

0

1

0 Nln

NkmlkZlk

Nnmx

N

k

N

l

++=

=

=

ZAAX T=

.0for 1 and 210 where

and 1 to0 from range and , where

== j(j)/)(

N-nk, l, m



How to Decide the Coefficients?

Orthogonal Property

IAAAA TT ==Parsevals Theorem: Energy Conservation

=

=

=1

0

21

0

2 )(1)(N

k

N

n

kXN

nx



2-D DCT/IDCT Processor

1D DCT/IDCTUnit

TransposeMemory

1D DCT/IDCTUnit

X Y Z

TransposeMemory

1D DCT/IDCTUnit

DMUX1:2

MUX2:1X

Z

Y

(a)

(b)



Block-Matching Algorithm

=

=

++=1

0

1

0

),(),(),(N

i

N

j

njmiyjixnms pnmpfor ,

)},({min ),( nmsu nm= pnmpfor , unmv ),(=

Rule:



Huffman Coding (1/3)

EntropyInformation MeasurementUncertainty MeasurementSurprise Measurement

=

=q

iii ppP

12 )/1(log)H(

Compression Ratio

bits codingbits uncodingCr =



Huffman Coding (2/3)

1x

2x

6x

5x

4x

3x

8x

7x

Input Probability

21

1

641

1618141

641

641

641 0

1

0

1

0

1

0

1

0

1

0

1

0



Huffman Coding (3/3)Data Huffman Code Natural Code

1x 1 000

2x 01 001

3x 001 010

4x 0001 011

5x 000001 100

6x 000000 101

7x 000011 110

8x 000010 111

bit 2(4x6)641x4

161x3

81x2

41x1

21

AvLen deHuffman_Co

=++++=

bit 3AvLen deNatural_Co =

bit 264)(4xlog64116log

1618log

814log

412log

21

)(

22222 =++++=

EntropyxH

bits codingbits uncodingCr =

5.123==



Vector Quantization

=

==1

0

22 )(),(k

iii yxyxyxd



Outlines




Moores Law

Microns

Source: Sematech

Tr. # (Complexity) Tr. # (Productivity)

10

1

0.01

0.1

10G

100M

10M

1M

100K

10K

1K

1G

1980 1985 1990 20001995 20102005

10

100M

10M

1M

100K

10K

1K

100xx x

x x xx

x

Gate LengthDevice Complexity

Design Productivity21%/ year

58% / year

GapIncreases

The number of transistors per chip doubles every 18 months.* Cordon Moore: One of the founders of Intel



Common DSP Algorithms and Their Applications



Evolution of Applications



Chronological Table of Video Coding Standards

ITU-TVCEG

H.263(1995/96)

H.261(1990)

MPEG-1(1993)

H.263++(2000)H.263+

(1997/98) H.264( MPEG-4Part 10 )(2002)

MPEG-2(H.262)

(1994/95)ISO/IECMPEG

MPEG-4 v1(1998/99)

MPEG-4 v2(1999/00)

MPEG-4 v3(2001)

1990 1992 1994 1996 1998 2000 2002 2003



Block Diagram of MPEG-2 Encoder



MPEG-2 / H.262: High Bit Rate, High Quality

MPEG-2 contains 10 partsMPEG-2 Visual = H.262Not especially useful below 2 Mbps (range of use normally 2-20 Mbps)Applications: SDTV (2-5Mbps), DVD (6-8Mbps), HDTV (20Mbps), VODSupport for interlaced scan picturesPSNR, temporal, and spatial scalability Profile and Level10-bit precision video sampling



Position of H.264



Block Diagram of H.2264/AVC Encoder

EntropyCoding

Scaling & Inv. Transform

Motion-Compensation

ControlData

Quant.Transf. coeffs

MotionData

Intra/Inter

CoderControl

Decoder

MotionEstimation

Transform/Scal./Quant.-

InputVideoSignal

Split intoMacroblocks16x16 pixels

Intra-frame Prediction

De-blockingFilter

OutputVideoSignal



New Features of H.264

Multi-mode, multi-reference MCMotion vector can point out of image border1/4-, 1/8-pixel motion vector precisionB-frame prediction weighting44 integer transformMulti-mode intra-predictionIn-loop de-blocking filterUVLC (Uniform Variable Length Coding)NAL (Network Abstraction Layer)SP-slices



Digital Communications SystemEnabling the transmitted signal to withstand the effects of various channel impairments, such as noise, interference, and fading.

Error Control Decoder

InformationSource

Source Encoder

EncrypterError Control

Encoder Modulator

Channel

Demodulator

InformationSink Decrypter

Source Decoder



Multiple Access Techniques

Source: IEEE Spectrum



Comparisons of Various Cellular Standards (1/2)



Comparisons of WLAN Standards



Outlines


Block DiagramsSignal-Flow GraphData-Flow GraphDependence Graph



Block Diagram of a 3-Tap FIR Filter

Def: A block diagram consists of functional blocks connected with directed edges.



SFG of a 3-Tap FIR Filter

Def: A signal flow graph (SGF) is a collection of nodes and directed edges. The nodes represent computations or tasks. In digital networks, the edges are usually restricted to constant gain multipliers or delay elements.



DFG of a 3-Tap FIR Filter

Def: A data flow graph (DFG) is a collection of nodes and directed edges. The nodes represent computations (or functions or subtasks) and the directed edges represent data path and each edge has a nonnegative number of delays associated with it.



DG of a 3-Tap FIR Filter

Def: A dependence graph is a direct graph that shows the dependence of the computations in an algorithm. The node in a DG represent computations and the edges represent precedence constraints among nodes. DG contains computations for all iterations in an algorithm and does not contain delay elements.



Conclusions

Briefly introduced the following:DSP design issue and design viewDSP algorithmsOverview of DSP applicationsRepresentations of DSP algorithms



Self-Test Exercises

STE1: Whats difference between the convolution and digital filter?STE2: i) Please check the functionality of inverted form FIR filter structure using timing table. ii) Which one has higher speed between direct form and inverted form FIR filter?STE3: i) Derive the radix-2 algorithm to compute a 16-point FFT and draw a block diagram (using the butterfly) to illustrate its implementation. ii) Calculate the number of complex multiplication and addition operations required.STE4: If the length of the data sequence is not then zeros can be appended to the data sequence. How do you relate the DFT coefficients calculated with zero padding to those calculated without zero padding ? (use the Matlab fftfunction)

vN 2=



Self-Test Exercise

STE5: According the following figure, calculate Code 2, l2 (sk), as well as the average code length using huffman code. Also compare the above average code length with that using Entropy Theorem.



References (1/2)

[1] K. K. Parhi, VLSI Digital Signal Processing Systems: Design and Implementation. NY: Wiley, 1999.

[2] P. Pirsch, Architectures for Digital Signal Processing. NY: Wiley, 1998. [3] A. V. Oppenheim and R. W. Schafer, Discrete-Time Signal Processing. Englewood Cliffs, NJ: Prentice-Hall, 1989.

[4] S. Haykin, Adaptive Filter Theory, 3rd ed. Englewood Cliffs, NJ: Prentice-Hall, 1996. [5] ,, 1992.

[6] L. D. Van, S. S. Wang, and W. S. Feng, "Design of the lower-error fixed-width multiplier and its application", IEEE

Trans. Circuits Syst. II, vol. 47, pp. 1112-1118, Oct. 2000.

[7] L. D. Van, C. C. Yang, Generalized low-error area-efficient fixed-width multipliers, IEEE Trans. Circuits Syst. I,

vol. 52, pp. 1608-1619, Aug. 2005.

[8] M. A. Song, L. D. Van, T. C. Huang, and S. Y. Kuo, "A generalized methodology for low-error and area-time

efficient fixed-width Booth multipliers", IEEE Int. Midwest Symp. Circuits Syst. (MWSCAS), Accepted, 2004.

[9] M. A. Song, L. D. Van, T. C. Huang and S. Y. Kuo, "A low-error and area-time efficient fixed-width Booth

multiplier," IEEE Int. Midwest Symp. Circuits Syst. (MWSCAS), Accepted, 2003.

[10] L. D. Van and S. H. Lee, "A generalized methodology for lower-error area-efficient fixed-width multipliers," in

Proc. IEEE Int. Symp. Circuits Syst. (ISCAS), May 2002, vol. 1, pp. 65-68, Phoenix , Arizona .

[11] L. D. Van, S. S. Wang, S. Tenqchen, W. S. Feng, and B. S. Jeng, "Design of a lower error fixed-width multiplier for

speech processing application," in Proc. IEEE Int. Symp. Circuits Syst. (ISCAS), May 1999, vol. 3, pp. 130-133, Orlando

Florida .



References (2/2)[12] L. D. Van, "A new 2-D systolic digital filter architecture without global broadcast," IEEE Trans. VLSI Systs., vol. 10, pp.

477-486, Aug. 2002.

[13] L. D. Van, C. C. Tang, S. Tenqchen, and W. S. Feng, "A new VLSI architecture without global broadcast for 2-D systolic

digital filters ," in Proc. IEEE Int. Symp. Circuits Syst. (ISCAS), May 2000, vol. 1, pp. 547-550, Geneva , Switzerland.

[14] L. D. Van, S. Tenqchen, C. H. Chang, and W. S. Feng,A new 2-D digital filter using a locally broadcast scheme and its

cascade form, in Proc. IEEE Asia Pacific Conf. on Circuits Syst. (APCCAS), Dec. 2000, pp. 579-582, Tianjin, China.

[15] L. D. Van and W. S. Feng, "An efficient systolic architecture for the DLMS adaptive filter and its applications," IEEE Trans.

Circuits Syst. II, vol. 48, pp. 359-366, April 2001.

[16] L. D. Van, S. Tenqchen, C. H. Chang, and W. S. Feng, "A tree-systolic array of DLMS adaptive filter," in Proc. IEEE Int. Conf

on Acoustics, Speech and Signal Processing (ICASSP), Mar. 1999, vol. 3, pp. 1253-1256, Phoenix, Arizona.

[17] L. D. Van and W. S. Feng,Efficient systolic architectures for 1-D and 2-D DLMS adaptive digital filters, in Proc. IEEE Asia

Pacific Conf. on Circuits Syst. (APCCAS), Dec. 2000, pp. 399-402, Tianjin, China.

[18] L. D. Van and C. H. Chang, "Pipelined RLS adaptive architecture using relaxed Givens rotations (RGR)," in Proc. IEEE Int.

Symp. Circuits Syst. (ISCAS), May 2002, vol. 1, pp. 37-40, Phoenix , Arizona.

[19] L. D. Van and C. C. Yang, "High-speed area-efficient recursive DFT/IDFT architectures," in Proc. IEEE Int. Symp. Circuits

Syst. (ISCAS), May 2004, vol. 3, pp. 357-360, Vancuover , Canada..

[20] L. D. Van, Y. C. Yu, C. M. Huang, C. T. Lin, "Low computation cycle and high speed recursive DFT/IDFTVLSI algorithm and architecture," in Proc. IEEE Workshop on Signal Processing Systems (SiPS), Nov. 2005, pp. 579-584, Athens, Greece. [21] L. D. Van, H. F. Luo, C. M. Wu, W. S. Hu, C. M. Huang, and W. C. Tsai, "A high-performance area-aware DSP processor

architecture for video codecs," in Proc. IEEE Int. Conf. Multimedia and Expo. (ICME), Jun. 2004, vol. 3, pp. 1499-1502, Taipei, Taiwan.

Introduction to Digital Signal Processing SystemsOutlinesWhy Use Digital Signal Processing?Common System ConfigurationVLSI Signal Processing System Design SpectrumVLSI Signal Processing System Publication Area (But not limited)VLSI Signal Processing System Design SpaceOutlinesDSP AlgorithmsSignalsLTI SystemsSampling of Analog SignalsSystem-Equation RepresentationConvolution & CorrelationLinear Phase FIR Digital FiltersIIR Filter StructuresIntroduction to an Adaptive AlgorithmAdaptive ApplicationsNotationSteepest Descent AlgorithmLMS AlgorithmSummary of LMS Adaptive Algorithm (1960)Block Diagram of an Adaptive FIR Filter Driven by the LMS AlgorithmUnitary/Orthogonal Transform (1/4)Why Orthogonal Transformation? (2/4)Why Orthogonal Transformation? (3/4)Why Orthogonal Transformation? (4/4)Discrete Fourier Transform (1/9)Fast Fourier Transform (2/9)Fast Fourier Transform (3/9)Fast Fourier Transform (4/9)Fast Fourier Transform (5/9)Fast Fourier Transform (6/9)Fast Fourier Transform (7/9)Fast Fourier Transform (8/9)Fast Fourier Transform (9/9)Image/Video CompressionSource Coding SpectrumImage Measurement and EvaluationDiscrete Cosine Transform (DCTII)2-D DCT-II and IDCT-IIHow to Decide the Coefficients?2-D DCT/IDCT ProcessorBlock-Matching AlgorithmHuffman Coding (1/3)Huffman Coding (2/3)Huffman Coding (3/3)Vector QuantizationOutlinesMoores LawCommon DSP Algorithms and Their ApplicationsEvolution of ApplicationsChronological Table of Video Coding StandardsBlock Diagram of MPEG-2 EncoderMPEG-2 / H.262: High Bit Rate, High QualityPosition of H.264Block Diagram of H.2264/AVC EncoderNew Features of H.264Digital Communications SystemMultiple Access TechniquesComparisons of Various Cellular Standards (1/2)Comparisons of WLAN StandardsOutlinesBlock Diagram of a 3-Tap FIR FilterSFG of a 3-Tap FIR FilterDFG of a 3-Tap FIR FilterDG of a 3-Tap FIR FilterConclusionsSelf-Test ExercisesSelf-Test ExerciseReferences (1/2)References (2/2)

digital signal processing -...

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