Development of a High-Speed Multi-Channel Analog Data Acquisitioning Architecture

L. Björk, S. Persyn, B. Walls, M. EpperlySouthwest Research Institute

September 2005

Introduction

As the measurement techniques in the space science community rapidly evolve, the demand for multi-channeled, high-speed, radiation tolerant data acquisitioning systems get increasingly higher. The high volume and resolution of data, and the complexity of the in-situ processing and analysis requirements have triggered the need for faster, smaller, and easily reconfigurable DSP designs.

Historically, these types of systems have been burdened with the use of multi-channels through multiplexers and the use of slow analog to digital converters. Because of that, these older systems have been forced to perform all the required processing in the initial analog stage and later in a CPU calculation, reducing reconfigurability and adding overhead.

 Björk 2 MAPLD 2005

New Demands - Highlights

• Multiple detector input channels• High-speed data acquisition and conversion• High radiation tolerance• Smaller systems• Easily reconfigurable/ high versatility• Higher resolution • Greater volume of data• Increased complexity of in-situ processing

Björk 3 MAPLD 2005

SwRI’s Response

In response, Southwest Research Institute, SwRI, has developed a high-speed, multi-channel, versatile data acquisitioning architecture. This new architecture can perform reconfigurable DSP algorithms and subsequent data processing on instrument analog input signals. The overall architecture and topology was developed as part of a SwRI science instrumentation trade study and then implemented on the NASA Gamma-ray Large Area Space Telescope (GLAST) Data Processing Unit (DPU) and can easily be reconfigured for other space missions and instrument applications.

Björk 4 MAPLD 2005

Typical Applications

Typical applications:

• High-Energy Particle Detectors • Video Input• Sound Input

In general, any type of instrument whose output is an analogwaveform where the science is related to the characteristic of

theanalog waveform, such as:

• Pulse Height• Rise Time• Area (Integration) of the pulse

Björk 5 MAPLD 2005

Heritage Sample and Hold Shortcomings

• Data from multi-channel systems went through multiplexers before being converted in an ADC.

• Radiation tolerant, high-speed ADCs were not readily available.

• Processing had to be done in analog stage or in CPU, slowing the system down.

• Could not process real-time, raw data.

• Led to non-reconfigurable, slow systems.

Björk 6 MAPLD 2005

High-Speed Multi-Channel Architectural Solution

Björk 7 MAPLD 2005

Analog Input Flow

• Accepts single ended or differential input.

• Signal conditioning circuitryAmplificationAttenuationFiltering (low pass, band pass)

• Clipping diodes for input voltage protection

• Analog to Digital Conversion14-bit flash-based, pipelinedOne ADC per channel

Björk 8 MAPLD 2005

Digital Signal Processing FPGA• Easily reconfigurable state-machine

• Examples of algorithms

Pulse height detection (Radiation detectors i.e. sodium iodide, NaI, or bismuth germanate,

BGO)

Discrete Fourier Transform calculations, DFT (Wave analysis)

Area integration (High-energy particle detection with Solid State Detectors, SSD)

Ramp detection/calculations (Langmuir probes)

Time delay measurements (Mass spectrometry)

• Algorithms developed in VHDL or Verilog

Björk 9 MAPLD 2005

Pulse Height Detection Example

Björk 10 MAPLD 2005

Event Controller FPGA

• Drives data through compression hardware. Lossy compression - LUT compression, i.e. 12 bit to 8 bit Lossless compression - Rice compression

• Supplies data to CPU for processing. Software compression Algorithms

• Drives data to transmission interfaces. LVDS/MLVDS RS-422/RS-485 MIL-STD-1553B SpaceWire

• Controls mission elapsed timer or vehicle time code

Björk 11 MAPLD 2005

Example of Datatypes

• Data can be processed in a compressed or non-compressed format

Raw dataTime-tagged events

Timer controlled accumulated dataMax value detectionMin value detectionTotal counts

Björk 12 MAPLD 2005

Diagram of a Full System

Björk 13 MAPLD 2005

Example of a Full System

• 14 detector inputs

• 1 ADC per channel

• DSP FPGA

• EC LUT compression

• 4 timer based data types

• 1 time tagged data type

• Some raw data sent directly to processor for processing and transmitted via serial data stream

• SPARC TSC 32 bit RISC processor 20MIPS 5MFLOPS

• 1553 bus, RS-422, LVDS (source packets)

Björk 14 MAPLD 2005

Data Processing Unit (DPU) for the NASA Gamma-Ray Large Area Space Telescope (GLAST).

Example of a Small System

MOPS is an example of a miniaturized implementation of the SwRI DSP architecture. MOPS clearly demonstrates the versatility this architecture can deliver in size as well as implementation.

A typical small system could consist of a scaled down version of a full system’s sub-sections, or only selected parts of it. For example, it may have fewer channels and/or ADCs. All processing may be done in the DSP FPGA and it may or may not be redundant or utilize compression. The data storage and interfaces may differ drastically.

Björk 15 MAPLD 2005

Miniaturized Optimized Processor for Space (MOPS)

Conclusion

Björk 16 MAPLD 2005

The SwRI developed, reconfigurable DSP architecture for space applications has many advantages compared to the traditional approach of designing a DSP system. This architecture is more efficient, faster, more compact, requires fewer resources and support circuitry, and provides a considerably reduced design cycle.

The reconfigurable DSP FPGA algorithm is the core of the architecture. By processing most or all accumulated data in the FPGA, the CPU can be used for other tasks. This used to be one of the limiting factors on previous systems. Also, since very little mission specific data is processed in the analog front end, the design does not have to be altered much, if at all, between different implementations. There is a multitude of options available for data processing, compression and storage, and physical interfaces.

So far, no implementation has proven to be too small or too big for this architecture. Heritage designs lead to proven, safer systems, limiting risk and increasing chance of mission success.